1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * amd_freq_sensitivity.c: AMD frequency sensitivity feedback powersave bias
4*4882a593Smuzhiyun * for the ondemand governor.
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Copyright (C) 2013 Advanced Micro Devices, Inc.
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Author: Jacob Shin <jacob.shin@amd.com>
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <linux/kernel.h>
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/types.h>
14*4882a593Smuzhiyun #include <linux/pci.h>
15*4882a593Smuzhiyun #include <linux/percpu-defs.h>
16*4882a593Smuzhiyun #include <linux/init.h>
17*4882a593Smuzhiyun #include <linux/mod_devicetable.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #include <asm/msr.h>
20*4882a593Smuzhiyun #include <asm/cpufeature.h>
21*4882a593Smuzhiyun #include <asm/cpu_device_id.h>
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #include "cpufreq_ondemand.h"
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun #define MSR_AMD64_FREQ_SENSITIVITY_ACTUAL 0xc0010080
26*4882a593Smuzhiyun #define MSR_AMD64_FREQ_SENSITIVITY_REFERENCE 0xc0010081
27*4882a593Smuzhiyun #define CLASS_CODE_SHIFT 56
28*4882a593Smuzhiyun #define POWERSAVE_BIAS_MAX 1000
29*4882a593Smuzhiyun #define POWERSAVE_BIAS_DEF 400
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun struct cpu_data_t {
32*4882a593Smuzhiyun u64 actual;
33*4882a593Smuzhiyun u64 reference;
34*4882a593Smuzhiyun unsigned int freq_prev;
35*4882a593Smuzhiyun };
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun static DEFINE_PER_CPU(struct cpu_data_t, cpu_data);
38*4882a593Smuzhiyun
amd_powersave_bias_target(struct cpufreq_policy * policy,unsigned int freq_next,unsigned int relation)39*4882a593Smuzhiyun static unsigned int amd_powersave_bias_target(struct cpufreq_policy *policy,
40*4882a593Smuzhiyun unsigned int freq_next,
41*4882a593Smuzhiyun unsigned int relation)
42*4882a593Smuzhiyun {
43*4882a593Smuzhiyun int sensitivity;
44*4882a593Smuzhiyun long d_actual, d_reference;
45*4882a593Smuzhiyun struct msr actual, reference;
46*4882a593Smuzhiyun struct cpu_data_t *data = &per_cpu(cpu_data, policy->cpu);
47*4882a593Smuzhiyun struct policy_dbs_info *policy_dbs = policy->governor_data;
48*4882a593Smuzhiyun struct dbs_data *od_data = policy_dbs->dbs_data;
49*4882a593Smuzhiyun struct od_dbs_tuners *od_tuners = od_data->tuners;
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun if (!policy->freq_table)
52*4882a593Smuzhiyun return freq_next;
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun rdmsr_on_cpu(policy->cpu, MSR_AMD64_FREQ_SENSITIVITY_ACTUAL,
55*4882a593Smuzhiyun &actual.l, &actual.h);
56*4882a593Smuzhiyun rdmsr_on_cpu(policy->cpu, MSR_AMD64_FREQ_SENSITIVITY_REFERENCE,
57*4882a593Smuzhiyun &reference.l, &reference.h);
58*4882a593Smuzhiyun actual.h &= 0x00ffffff;
59*4882a593Smuzhiyun reference.h &= 0x00ffffff;
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun /* counter wrapped around, so stay on current frequency */
62*4882a593Smuzhiyun if (actual.q < data->actual || reference.q < data->reference) {
63*4882a593Smuzhiyun freq_next = policy->cur;
64*4882a593Smuzhiyun goto out;
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun d_actual = actual.q - data->actual;
68*4882a593Smuzhiyun d_reference = reference.q - data->reference;
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun /* divide by 0, so stay on current frequency as well */
71*4882a593Smuzhiyun if (d_reference == 0) {
72*4882a593Smuzhiyun freq_next = policy->cur;
73*4882a593Smuzhiyun goto out;
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun sensitivity = POWERSAVE_BIAS_MAX -
77*4882a593Smuzhiyun (POWERSAVE_BIAS_MAX * (d_reference - d_actual) / d_reference);
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun clamp(sensitivity, 0, POWERSAVE_BIAS_MAX);
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun /* this workload is not CPU bound, so choose a lower freq */
82*4882a593Smuzhiyun if (sensitivity < od_tuners->powersave_bias) {
83*4882a593Smuzhiyun if (data->freq_prev == policy->cur)
84*4882a593Smuzhiyun freq_next = policy->cur;
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun if (freq_next > policy->cur)
87*4882a593Smuzhiyun freq_next = policy->cur;
88*4882a593Smuzhiyun else if (freq_next < policy->cur)
89*4882a593Smuzhiyun freq_next = policy->min;
90*4882a593Smuzhiyun else {
91*4882a593Smuzhiyun unsigned int index;
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun index = cpufreq_table_find_index_h(policy,
94*4882a593Smuzhiyun policy->cur - 1);
95*4882a593Smuzhiyun freq_next = policy->freq_table[index].frequency;
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun data->freq_prev = freq_next;
99*4882a593Smuzhiyun } else
100*4882a593Smuzhiyun data->freq_prev = 0;
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun out:
103*4882a593Smuzhiyun data->actual = actual.q;
104*4882a593Smuzhiyun data->reference = reference.q;
105*4882a593Smuzhiyun return freq_next;
106*4882a593Smuzhiyun }
107*4882a593Smuzhiyun
amd_freq_sensitivity_init(void)108*4882a593Smuzhiyun static int __init amd_freq_sensitivity_init(void)
109*4882a593Smuzhiyun {
110*4882a593Smuzhiyun u64 val;
111*4882a593Smuzhiyun struct pci_dev *pcidev;
112*4882a593Smuzhiyun unsigned int pci_vendor;
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
115*4882a593Smuzhiyun pci_vendor = PCI_VENDOR_ID_AMD;
116*4882a593Smuzhiyun else if (boot_cpu_data.x86_vendor == X86_VENDOR_HYGON)
117*4882a593Smuzhiyun pci_vendor = PCI_VENDOR_ID_HYGON;
118*4882a593Smuzhiyun else
119*4882a593Smuzhiyun return -ENODEV;
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun pcidev = pci_get_device(pci_vendor,
122*4882a593Smuzhiyun PCI_DEVICE_ID_AMD_KERNCZ_SMBUS, NULL);
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun if (!pcidev) {
125*4882a593Smuzhiyun if (!boot_cpu_has(X86_FEATURE_PROC_FEEDBACK))
126*4882a593Smuzhiyun return -ENODEV;
127*4882a593Smuzhiyun }
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun if (rdmsrl_safe(MSR_AMD64_FREQ_SENSITIVITY_ACTUAL, &val))
130*4882a593Smuzhiyun return -ENODEV;
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun if (!(val >> CLASS_CODE_SHIFT))
133*4882a593Smuzhiyun return -ENODEV;
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun od_register_powersave_bias_handler(amd_powersave_bias_target,
136*4882a593Smuzhiyun POWERSAVE_BIAS_DEF);
137*4882a593Smuzhiyun return 0;
138*4882a593Smuzhiyun }
139*4882a593Smuzhiyun late_initcall(amd_freq_sensitivity_init);
140*4882a593Smuzhiyun
amd_freq_sensitivity_exit(void)141*4882a593Smuzhiyun static void __exit amd_freq_sensitivity_exit(void)
142*4882a593Smuzhiyun {
143*4882a593Smuzhiyun od_unregister_powersave_bias_handler();
144*4882a593Smuzhiyun }
145*4882a593Smuzhiyun module_exit(amd_freq_sensitivity_exit);
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun static const struct x86_cpu_id __maybe_unused amd_freq_sensitivity_ids[] = {
148*4882a593Smuzhiyun X86_MATCH_FEATURE(X86_FEATURE_PROC_FEEDBACK, NULL),
149*4882a593Smuzhiyun {}
150*4882a593Smuzhiyun };
151*4882a593Smuzhiyun MODULE_DEVICE_TABLE(x86cpu, amd_freq_sensitivity_ids);
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun MODULE_AUTHOR("Jacob Shin <jacob.shin@amd.com>");
154*4882a593Smuzhiyun MODULE_DESCRIPTION("AMD frequency sensitivity feedback powersave bias for "
155*4882a593Smuzhiyun "the ondemand governor.");
156*4882a593Smuzhiyun MODULE_LICENSE("GPL");
157