1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Rockchip timer support
4 *
5 * Copyright (C) Daniel Lezcano <daniel.lezcano@linaro.org>
6 */
7 #include <linux/clk.h>
8 #include <linux/clockchips.h>
9 #include <linux/init.h>
10 #include <linux/interrupt.h>
11 #include <linux/module.h>
12 #include <linux/sched_clock.h>
13 #include <linux/slab.h>
14 #include <linux/of.h>
15 #include <linux/of_address.h>
16 #include <linux/of_irq.h>
17 #include <linux/platform_device.h>
18
19 #define TIMER_NAME "rk_timer"
20
21 #define TIMER_LOAD_COUNT0 0x00
22 #define TIMER_LOAD_COUNT1 0x04
23 #define TIMER_CURRENT_VALUE0 0x08
24 #define TIMER_CURRENT_VALUE1 0x0C
25 #define TIMER_CONTROL_REG3288 0x10
26 #define TIMER_CONTROL_REG3399 0x1c
27 #define TIMER_INT_STATUS 0x18
28
29 #define TIMER_DISABLE 0x0
30 #define TIMER_ENABLE 0x1
31 #define TIMER_MODE_FREE_RUNNING (0 << 1)
32 #define TIMER_MODE_USER_DEFINED_COUNT (1 << 1)
33 #define TIMER_INT_UNMASK (1 << 2)
34
35 struct rk_timer {
36 void __iomem *base;
37 void __iomem *ctrl;
38 struct clk *clk;
39 struct clk *pclk;
40 u32 freq;
41 int irq;
42 };
43
44 struct rk_clkevt {
45 struct clock_event_device ce;
46 struct rk_timer timer;
47 };
48
49 static struct rk_clkevt *rk_clkevt;
50 #ifndef MODULE
51 static struct rk_timer *rk_clksrc;
52 #endif
53
rk_timer(struct clock_event_device * ce)54 static inline struct rk_timer *rk_timer(struct clock_event_device *ce)
55 {
56 return &container_of(ce, struct rk_clkevt, ce)->timer;
57 }
58
rk_timer_disable(struct rk_timer * timer)59 static inline void rk_timer_disable(struct rk_timer *timer)
60 {
61 writel_relaxed(TIMER_DISABLE, timer->ctrl);
62 }
63
rk_timer_enable(struct rk_timer * timer,u32 flags)64 static inline void rk_timer_enable(struct rk_timer *timer, u32 flags)
65 {
66 writel_relaxed(TIMER_ENABLE | flags, timer->ctrl);
67 }
68
rk_timer_update_counter(unsigned long cycles,struct rk_timer * timer)69 static void rk_timer_update_counter(unsigned long cycles,
70 struct rk_timer *timer)
71 {
72 writel_relaxed(cycles, timer->base + TIMER_LOAD_COUNT0);
73 writel_relaxed(0, timer->base + TIMER_LOAD_COUNT1);
74 }
75
rk_timer_interrupt_clear(struct rk_timer * timer)76 static void rk_timer_interrupt_clear(struct rk_timer *timer)
77 {
78 writel_relaxed(1, timer->base + TIMER_INT_STATUS);
79 }
80
rk_timer_set_next_event(unsigned long cycles,struct clock_event_device * ce)81 static inline int rk_timer_set_next_event(unsigned long cycles,
82 struct clock_event_device *ce)
83 {
84 struct rk_timer *timer = rk_timer(ce);
85
86 rk_timer_disable(timer);
87 rk_timer_update_counter(cycles, timer);
88 rk_timer_enable(timer, TIMER_MODE_USER_DEFINED_COUNT |
89 TIMER_INT_UNMASK);
90 return 0;
91 }
92
rk_timer_shutdown(struct clock_event_device * ce)93 static int rk_timer_shutdown(struct clock_event_device *ce)
94 {
95 struct rk_timer *timer = rk_timer(ce);
96
97 rk_timer_disable(timer);
98 return 0;
99 }
100
rk_timer_set_periodic(struct clock_event_device * ce)101 static int rk_timer_set_periodic(struct clock_event_device *ce)
102 {
103 struct rk_timer *timer = rk_timer(ce);
104
105 rk_timer_disable(timer);
106 rk_timer_update_counter(timer->freq / HZ - 1, timer);
107 rk_timer_enable(timer, TIMER_MODE_FREE_RUNNING | TIMER_INT_UNMASK);
108 return 0;
109 }
110
rk_timer_interrupt(int irq,void * dev_id)111 static irqreturn_t rk_timer_interrupt(int irq, void *dev_id)
112 {
113 struct clock_event_device *ce = dev_id;
114 struct rk_timer *timer = rk_timer(ce);
115
116 rk_timer_interrupt_clear(timer);
117
118 if (clockevent_state_oneshot(ce))
119 rk_timer_disable(timer);
120
121 ce->event_handler(ce);
122
123 return IRQ_HANDLED;
124 }
125
126 #ifndef MODULE
rk_timer_sched_read(void)127 static u64 notrace rk_timer_sched_read(void)
128 {
129 return ~readl_relaxed(rk_clksrc->base + TIMER_CURRENT_VALUE0);
130 }
131 #endif
132
133 static int __init
rk_timer_probe(struct rk_timer * timer,struct device_node * np)134 rk_timer_probe(struct rk_timer *timer, struct device_node *np)
135 {
136 struct clk *timer_clk;
137 struct clk *pclk;
138 int ret = -EINVAL, irq;
139 u32 ctrl_reg = TIMER_CONTROL_REG3288;
140
141 timer->base = of_iomap(np, 0);
142 if (!timer->base) {
143 pr_err("Failed to get base address for '%s'\n", TIMER_NAME);
144 return -ENXIO;
145 }
146
147 if (of_device_is_compatible(np, "rockchip,rk3399-timer"))
148 ctrl_reg = TIMER_CONTROL_REG3399;
149
150 timer->ctrl = timer->base + ctrl_reg;
151
152 pclk = of_clk_get_by_name(np, "pclk");
153 if (IS_ERR(pclk)) {
154 ret = PTR_ERR(pclk);
155 pr_err("Failed to get pclk for '%s'\n", TIMER_NAME);
156 goto out_unmap;
157 }
158
159 ret = clk_prepare_enable(pclk);
160 if (ret) {
161 pr_err("Failed to enable pclk for '%s'\n", TIMER_NAME);
162 goto out_unmap;
163 }
164 timer->pclk = pclk;
165
166 timer_clk = of_clk_get_by_name(np, "timer");
167 if (IS_ERR(timer_clk)) {
168 ret = PTR_ERR(timer_clk);
169 pr_err("Failed to get timer clock for '%s'\n", TIMER_NAME);
170 goto out_timer_clk;
171 }
172
173 ret = clk_prepare_enable(timer_clk);
174 if (ret) {
175 pr_err("Failed to enable timer clock\n");
176 goto out_timer_clk;
177 }
178 timer->clk = timer_clk;
179
180 timer->freq = clk_get_rate(timer_clk);
181
182 irq = irq_of_parse_and_map(np, 0);
183 if (!irq) {
184 ret = -EINVAL;
185 pr_err("Failed to map interrupts for '%s'\n", TIMER_NAME);
186 goto out_irq;
187 }
188 timer->irq = irq;
189
190 rk_timer_interrupt_clear(timer);
191 rk_timer_disable(timer);
192 return 0;
193
194 out_irq:
195 clk_disable_unprepare(timer_clk);
196 out_timer_clk:
197 clk_disable_unprepare(pclk);
198 out_unmap:
199 iounmap(timer->base);
200
201 return ret;
202 }
203
rk_timer_cleanup(struct rk_timer * timer)204 static void __init rk_timer_cleanup(struct rk_timer *timer)
205 {
206 clk_disable_unprepare(timer->clk);
207 clk_disable_unprepare(timer->pclk);
208 iounmap(timer->base);
209 }
210
rk_clkevt_init(struct device_node * np)211 static int __init rk_clkevt_init(struct device_node *np)
212 {
213 struct clock_event_device *ce;
214 int ret = -EINVAL;
215
216 rk_clkevt = kzalloc(sizeof(struct rk_clkevt), GFP_KERNEL);
217 if (!rk_clkevt) {
218 ret = -ENOMEM;
219 goto out;
220 }
221
222 ret = rk_timer_probe(&rk_clkevt->timer, np);
223 if (ret)
224 goto out_probe;
225
226 ce = &rk_clkevt->ce;
227 ce->name = TIMER_NAME;
228 ce->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT |
229 CLOCK_EVT_FEAT_DYNIRQ;
230 ce->set_next_event = rk_timer_set_next_event;
231 ce->set_state_shutdown = rk_timer_shutdown;
232 ce->set_state_periodic = rk_timer_set_periodic;
233 ce->irq = rk_clkevt->timer.irq;
234 ce->cpumask = cpu_possible_mask;
235 ce->rating = 250;
236
237 ret = request_irq(rk_clkevt->timer.irq, rk_timer_interrupt, IRQF_TIMER,
238 TIMER_NAME, ce);
239 if (ret) {
240 pr_err("Failed to initialize '%s': %d\n",
241 TIMER_NAME, ret);
242 goto out_irq;
243 }
244
245 clockevents_config_and_register(&rk_clkevt->ce,
246 rk_clkevt->timer.freq, 1, UINT_MAX);
247 return 0;
248
249 out_irq:
250 rk_timer_cleanup(&rk_clkevt->timer);
251 out_probe:
252 kfree(rk_clkevt);
253 out:
254 /* Leave rk_clkevt not NULL to prevent future init */
255 rk_clkevt = ERR_PTR(ret);
256 return ret;
257 }
258
259 #ifndef MODULE
rk_clksrc_init(struct device_node * np)260 static int __init rk_clksrc_init(struct device_node *np)
261 {
262 int ret = -EINVAL;
263
264 rk_clksrc = kzalloc(sizeof(struct rk_timer), GFP_KERNEL);
265 if (!rk_clksrc) {
266 ret = -ENOMEM;
267 goto out;
268 }
269
270 ret = rk_timer_probe(rk_clksrc, np);
271 if (ret)
272 goto out_probe;
273
274 rk_timer_update_counter(UINT_MAX, rk_clksrc);
275 rk_timer_enable(rk_clksrc, 0);
276
277 ret = clocksource_mmio_init(rk_clksrc->base + TIMER_CURRENT_VALUE0,
278 TIMER_NAME, rk_clksrc->freq, 250, 32,
279 clocksource_mmio_readl_down);
280 if (ret) {
281 pr_err("Failed to register clocksource\n");
282 goto out_clocksource;
283 }
284
285 sched_clock_register(rk_timer_sched_read, 32, rk_clksrc->freq);
286 return 0;
287
288 out_clocksource:
289 rk_timer_cleanup(rk_clksrc);
290 out_probe:
291 kfree(rk_clksrc);
292 out:
293 /* Leave rk_clksrc not NULL to prevent future init */
294 rk_clksrc = ERR_PTR(ret);
295 return ret;
296 }
297 #endif
298
rk_timer_init(struct device_node * np)299 static int __init rk_timer_init(struct device_node *np)
300 {
301 if (!rk_clkevt)
302 return rk_clkevt_init(np);
303
304 #ifndef MODULE
305 if (!rk_clksrc)
306 return rk_clksrc_init(np);
307 #endif
308
309 pr_err("Too many timer definitions for '%s'\n", TIMER_NAME);
310 return -EINVAL;
311 }
312
313 TIMER_OF_DECLARE(rk3288_timer, "rockchip,rk3288-timer", rk_timer_init);
314 TIMER_OF_DECLARE(rk3399_timer, "rockchip,rk3399-timer", rk_timer_init);
315
316 #ifdef MODULE
rk_timer_driver_probe(struct platform_device * pdev)317 static int __init rk_timer_driver_probe(struct platform_device *pdev)
318 {
319 return rk_timer_init(pdev->dev.of_node);
320 }
321
322 static const struct of_device_id rk_timer_match_table[] = {
323 { .compatible = "rockchip,rk3288-timer" },
324 { .compatible = "rockchip,rk3399-timer" },
325 { /* sentinel */ },
326 };
327
328 static struct platform_driver rk_timer_driver = {
329 .driver = {
330 .name = TIMER_NAME,
331 .of_match_table = rk_timer_match_table,
332 },
333 };
334 module_platform_driver_probe(rk_timer_driver, rk_timer_driver_probe);
335
336 MODULE_LICENSE("GPL");
337 #endif
338