1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2006 Jim Cromie
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * This is a clocksource driver for the Geode SCx200's 1 or 27 MHz
6*4882a593Smuzhiyun * high-resolution timer. The Geode SC-1100 (at least) has a buggy
7*4882a593Smuzhiyun * time stamp counter (TSC), which loses time unless 'idle=poll' is
8*4882a593Smuzhiyun * given as a boot-arg. In its absence, the Generic Timekeeping code
9*4882a593Smuzhiyun * will detect and de-rate the bad TSC, allowing this timer to take
10*4882a593Smuzhiyun * over timekeeping duties.
11*4882a593Smuzhiyun *
12*4882a593Smuzhiyun * Based on work by John Stultz, and Ted Phelps (in a 2.6.12-rc6 patch)
13*4882a593Smuzhiyun */
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #include <linux/clocksource.h>
16*4882a593Smuzhiyun #include <linux/init.h>
17*4882a593Smuzhiyun #include <linux/module.h>
18*4882a593Smuzhiyun #include <linux/ioport.h>
19*4882a593Smuzhiyun #include <linux/scx200.h>
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #define NAME "scx200_hrt"
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun static int mhz27;
24*4882a593Smuzhiyun module_param(mhz27, int, 0); /* load time only */
25*4882a593Smuzhiyun MODULE_PARM_DESC(mhz27, "count at 27.0 MHz (default is 1.0 MHz)");
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun static int ppm;
28*4882a593Smuzhiyun module_param(ppm, int, 0); /* load time only */
29*4882a593Smuzhiyun MODULE_PARM_DESC(ppm, "+-adjust to actual XO freq (ppm)");
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun /* HiRes Timer configuration register address */
32*4882a593Smuzhiyun #define SCx200_TMCNFG_OFFSET (SCx200_TIMER_OFFSET + 5)
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun /* and config settings */
35*4882a593Smuzhiyun #define HR_TMEN (1 << 0) /* timer interrupt enable */
36*4882a593Smuzhiyun #define HR_TMCLKSEL (1 << 1) /* 1|0 counts at 27|1 MHz */
37*4882a593Smuzhiyun #define HR_TM27MPD (1 << 2) /* 1 turns off input clock (power-down) */
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun /* The base timer frequency, * 27 if selected */
40*4882a593Smuzhiyun #define HRT_FREQ 1000000
41*4882a593Smuzhiyun
read_hrt(struct clocksource * cs)42*4882a593Smuzhiyun static u64 read_hrt(struct clocksource *cs)
43*4882a593Smuzhiyun {
44*4882a593Smuzhiyun /* Read the timer value */
45*4882a593Smuzhiyun return (u64) inl(scx200_cb_base + SCx200_TIMER_OFFSET);
46*4882a593Smuzhiyun }
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun static struct clocksource cs_hrt = {
49*4882a593Smuzhiyun .name = "scx200_hrt",
50*4882a593Smuzhiyun .rating = 250,
51*4882a593Smuzhiyun .read = read_hrt,
52*4882a593Smuzhiyun .mask = CLOCKSOURCE_MASK(32),
53*4882a593Smuzhiyun .flags = CLOCK_SOURCE_IS_CONTINUOUS,
54*4882a593Smuzhiyun /* mult, shift are set based on mhz27 flag */
55*4882a593Smuzhiyun };
56*4882a593Smuzhiyun
init_hrt_clocksource(void)57*4882a593Smuzhiyun static int __init init_hrt_clocksource(void)
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun u32 freq;
60*4882a593Smuzhiyun /* Make sure scx200 has initialized the configuration block */
61*4882a593Smuzhiyun if (!scx200_cb_present())
62*4882a593Smuzhiyun return -ENODEV;
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun /* Reserve the timer's ISA io-region for ourselves */
65*4882a593Smuzhiyun if (!request_region(scx200_cb_base + SCx200_TIMER_OFFSET,
66*4882a593Smuzhiyun SCx200_TIMER_SIZE,
67*4882a593Smuzhiyun "NatSemi SCx200 High-Resolution Timer")) {
68*4882a593Smuzhiyun pr_warn("unable to lock timer region\n");
69*4882a593Smuzhiyun return -ENODEV;
70*4882a593Smuzhiyun }
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun /* write timer config */
73*4882a593Smuzhiyun outb(HR_TMEN | (mhz27 ? HR_TMCLKSEL : 0),
74*4882a593Smuzhiyun scx200_cb_base + SCx200_TMCNFG_OFFSET);
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun freq = (HRT_FREQ + ppm);
77*4882a593Smuzhiyun if (mhz27)
78*4882a593Smuzhiyun freq *= 27;
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun pr_info("enabling scx200 high-res timer (%s MHz +%d ppm)\n", mhz27 ? "27":"1", ppm);
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun return clocksource_register_hz(&cs_hrt, freq);
83*4882a593Smuzhiyun }
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun module_init(init_hrt_clocksource);
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun MODULE_AUTHOR("Jim Cromie <jim.cromie@gmail.com>");
88*4882a593Smuzhiyun MODULE_DESCRIPTION("clocksource on SCx200 HiRes Timer");
89*4882a593Smuzhiyun MODULE_LICENSE("GPL");
90