1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright (C) 2015 Numascale AS. All rights reserved.
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <linux/clockchips.h>
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <asm/irq.h>
10*4882a593Smuzhiyun #include <asm/numachip/numachip.h>
11*4882a593Smuzhiyun #include <asm/numachip/numachip_csr.h>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun static DEFINE_PER_CPU(struct clock_event_device, numachip2_ced);
14*4882a593Smuzhiyun
numachip2_timer_read(struct clocksource * cs)15*4882a593Smuzhiyun static cycles_t numachip2_timer_read(struct clocksource *cs)
16*4882a593Smuzhiyun {
17*4882a593Smuzhiyun return numachip2_read64_lcsr(NUMACHIP2_TIMER_NOW);
18*4882a593Smuzhiyun }
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun static struct clocksource numachip2_clocksource = {
21*4882a593Smuzhiyun .name = "numachip2",
22*4882a593Smuzhiyun .rating = 295,
23*4882a593Smuzhiyun .read = numachip2_timer_read,
24*4882a593Smuzhiyun .mask = CLOCKSOURCE_MASK(64),
25*4882a593Smuzhiyun .flags = CLOCK_SOURCE_IS_CONTINUOUS,
26*4882a593Smuzhiyun .mult = 1,
27*4882a593Smuzhiyun .shift = 0,
28*4882a593Smuzhiyun };
29*4882a593Smuzhiyun
numachip2_set_next_event(unsigned long delta,struct clock_event_device * ced)30*4882a593Smuzhiyun static int numachip2_set_next_event(unsigned long delta, struct clock_event_device *ced)
31*4882a593Smuzhiyun {
32*4882a593Smuzhiyun numachip2_write64_lcsr(NUMACHIP2_TIMER_DEADLINE + numachip2_timer(),
33*4882a593Smuzhiyun delta);
34*4882a593Smuzhiyun return 0;
35*4882a593Smuzhiyun }
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun static const struct clock_event_device numachip2_clockevent __initconst = {
38*4882a593Smuzhiyun .name = "numachip2",
39*4882a593Smuzhiyun .rating = 400,
40*4882a593Smuzhiyun .set_next_event = numachip2_set_next_event,
41*4882a593Smuzhiyun .features = CLOCK_EVT_FEAT_ONESHOT,
42*4882a593Smuzhiyun .mult = 1,
43*4882a593Smuzhiyun .shift = 0,
44*4882a593Smuzhiyun .min_delta_ns = 1250,
45*4882a593Smuzhiyun .min_delta_ticks = 1250,
46*4882a593Smuzhiyun .max_delta_ns = LONG_MAX,
47*4882a593Smuzhiyun .max_delta_ticks = LONG_MAX,
48*4882a593Smuzhiyun };
49*4882a593Smuzhiyun
numachip_timer_interrupt(void)50*4882a593Smuzhiyun static void numachip_timer_interrupt(void)
51*4882a593Smuzhiyun {
52*4882a593Smuzhiyun struct clock_event_device *ced = this_cpu_ptr(&numachip2_ced);
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun ced->event_handler(ced);
55*4882a593Smuzhiyun }
56*4882a593Smuzhiyun
numachip_timer_each(struct work_struct * work)57*4882a593Smuzhiyun static __init void numachip_timer_each(struct work_struct *work)
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun unsigned local_apicid = __this_cpu_read(x86_cpu_to_apicid) & 0xff;
60*4882a593Smuzhiyun struct clock_event_device *ced = this_cpu_ptr(&numachip2_ced);
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun /* Setup IPI vector to local core and relative timing mode */
63*4882a593Smuzhiyun numachip2_write64_lcsr(NUMACHIP2_TIMER_INT + numachip2_timer(),
64*4882a593Smuzhiyun (3 << 22) | (X86_PLATFORM_IPI_VECTOR << 14) |
65*4882a593Smuzhiyun (local_apicid << 6));
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun *ced = numachip2_clockevent;
68*4882a593Smuzhiyun ced->cpumask = cpumask_of(smp_processor_id());
69*4882a593Smuzhiyun clockevents_register_device(ced);
70*4882a593Smuzhiyun }
71*4882a593Smuzhiyun
numachip_timer_init(void)72*4882a593Smuzhiyun static int __init numachip_timer_init(void)
73*4882a593Smuzhiyun {
74*4882a593Smuzhiyun if (numachip_system != 2)
75*4882a593Smuzhiyun return -ENODEV;
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun /* Reset timer */
78*4882a593Smuzhiyun numachip2_write64_lcsr(NUMACHIP2_TIMER_RESET, 0);
79*4882a593Smuzhiyun clocksource_register_hz(&numachip2_clocksource, NSEC_PER_SEC);
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun /* Setup per-cpu clockevents */
82*4882a593Smuzhiyun x86_platform_ipi_callback = numachip_timer_interrupt;
83*4882a593Smuzhiyun schedule_on_each_cpu(&numachip_timer_each);
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun return 0;
86*4882a593Smuzhiyun }
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun arch_initcall(numachip_timer_init);
89