1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright 2012 Simon Arlott
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun #include <linux/bitops.h>
7*4882a593Smuzhiyun #include <linux/clockchips.h>
8*4882a593Smuzhiyun #include <linux/clocksource.h>
9*4882a593Smuzhiyun #include <linux/interrupt.h>
10*4882a593Smuzhiyun #include <linux/irqreturn.h>
11*4882a593Smuzhiyun #include <linux/kernel.h>
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/of_address.h>
14*4882a593Smuzhiyun #include <linux/of_irq.h>
15*4882a593Smuzhiyun #include <linux/of_platform.h>
16*4882a593Smuzhiyun #include <linux/slab.h>
17*4882a593Smuzhiyun #include <linux/string.h>
18*4882a593Smuzhiyun #include <linux/sched_clock.h>
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #include <asm/irq.h>
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #define REG_CONTROL 0x00
23*4882a593Smuzhiyun #define REG_COUNTER_LO 0x04
24*4882a593Smuzhiyun #define REG_COUNTER_HI 0x08
25*4882a593Smuzhiyun #define REG_COMPARE(n) (0x0c + (n) * 4)
26*4882a593Smuzhiyun #define MAX_TIMER 3
27*4882a593Smuzhiyun #define DEFAULT_TIMER 3
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun struct bcm2835_timer {
30*4882a593Smuzhiyun void __iomem *control;
31*4882a593Smuzhiyun void __iomem *compare;
32*4882a593Smuzhiyun int match_mask;
33*4882a593Smuzhiyun struct clock_event_device evt;
34*4882a593Smuzhiyun };
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun static void __iomem *system_clock __read_mostly;
37*4882a593Smuzhiyun
bcm2835_sched_read(void)38*4882a593Smuzhiyun static u64 notrace bcm2835_sched_read(void)
39*4882a593Smuzhiyun {
40*4882a593Smuzhiyun return readl_relaxed(system_clock);
41*4882a593Smuzhiyun }
42*4882a593Smuzhiyun
bcm2835_time_set_next_event(unsigned long event,struct clock_event_device * evt_dev)43*4882a593Smuzhiyun static int bcm2835_time_set_next_event(unsigned long event,
44*4882a593Smuzhiyun struct clock_event_device *evt_dev)
45*4882a593Smuzhiyun {
46*4882a593Smuzhiyun struct bcm2835_timer *timer = container_of(evt_dev,
47*4882a593Smuzhiyun struct bcm2835_timer, evt);
48*4882a593Smuzhiyun writel_relaxed(readl_relaxed(system_clock) + event,
49*4882a593Smuzhiyun timer->compare);
50*4882a593Smuzhiyun return 0;
51*4882a593Smuzhiyun }
52*4882a593Smuzhiyun
bcm2835_time_interrupt(int irq,void * dev_id)53*4882a593Smuzhiyun static irqreturn_t bcm2835_time_interrupt(int irq, void *dev_id)
54*4882a593Smuzhiyun {
55*4882a593Smuzhiyun struct bcm2835_timer *timer = dev_id;
56*4882a593Smuzhiyun void (*event_handler)(struct clock_event_device *);
57*4882a593Smuzhiyun if (readl_relaxed(timer->control) & timer->match_mask) {
58*4882a593Smuzhiyun writel_relaxed(timer->match_mask, timer->control);
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun event_handler = READ_ONCE(timer->evt.event_handler);
61*4882a593Smuzhiyun if (event_handler)
62*4882a593Smuzhiyun event_handler(&timer->evt);
63*4882a593Smuzhiyun return IRQ_HANDLED;
64*4882a593Smuzhiyun } else {
65*4882a593Smuzhiyun return IRQ_NONE;
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun }
68*4882a593Smuzhiyun
bcm2835_timer_init(struct device_node * node)69*4882a593Smuzhiyun static int __init bcm2835_timer_init(struct device_node *node)
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun void __iomem *base;
72*4882a593Smuzhiyun u32 freq;
73*4882a593Smuzhiyun int irq, ret;
74*4882a593Smuzhiyun struct bcm2835_timer *timer;
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun base = of_iomap(node, 0);
77*4882a593Smuzhiyun if (!base) {
78*4882a593Smuzhiyun pr_err("Can't remap registers\n");
79*4882a593Smuzhiyun return -ENXIO;
80*4882a593Smuzhiyun }
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun ret = of_property_read_u32(node, "clock-frequency", &freq);
83*4882a593Smuzhiyun if (ret) {
84*4882a593Smuzhiyun pr_err("Can't read clock-frequency\n");
85*4882a593Smuzhiyun goto err_iounmap;
86*4882a593Smuzhiyun }
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun system_clock = base + REG_COUNTER_LO;
89*4882a593Smuzhiyun sched_clock_register(bcm2835_sched_read, 32, freq);
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun clocksource_mmio_init(base + REG_COUNTER_LO, node->name,
92*4882a593Smuzhiyun freq, 300, 32, clocksource_mmio_readl_up);
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun irq = irq_of_parse_and_map(node, DEFAULT_TIMER);
95*4882a593Smuzhiyun if (irq <= 0) {
96*4882a593Smuzhiyun pr_err("Can't parse IRQ\n");
97*4882a593Smuzhiyun ret = -EINVAL;
98*4882a593Smuzhiyun goto err_iounmap;
99*4882a593Smuzhiyun }
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun timer = kzalloc(sizeof(*timer), GFP_KERNEL);
102*4882a593Smuzhiyun if (!timer) {
103*4882a593Smuzhiyun ret = -ENOMEM;
104*4882a593Smuzhiyun goto err_iounmap;
105*4882a593Smuzhiyun }
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun timer->control = base + REG_CONTROL;
108*4882a593Smuzhiyun timer->compare = base + REG_COMPARE(DEFAULT_TIMER);
109*4882a593Smuzhiyun timer->match_mask = BIT(DEFAULT_TIMER);
110*4882a593Smuzhiyun timer->evt.name = node->name;
111*4882a593Smuzhiyun timer->evt.rating = 300;
112*4882a593Smuzhiyun timer->evt.features = CLOCK_EVT_FEAT_ONESHOT;
113*4882a593Smuzhiyun timer->evt.set_next_event = bcm2835_time_set_next_event;
114*4882a593Smuzhiyun timer->evt.cpumask = cpumask_of(0);
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun ret = request_irq(irq, bcm2835_time_interrupt, IRQF_TIMER | IRQF_SHARED,
117*4882a593Smuzhiyun node->name, timer);
118*4882a593Smuzhiyun if (ret) {
119*4882a593Smuzhiyun pr_err("Can't set up timer IRQ\n");
120*4882a593Smuzhiyun goto err_timer_free;
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun clockevents_config_and_register(&timer->evt, freq, 0xf, 0xffffffff);
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun pr_info("bcm2835: system timer (irq = %d)\n", irq);
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun return 0;
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun err_timer_free:
130*4882a593Smuzhiyun kfree(timer);
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun err_iounmap:
133*4882a593Smuzhiyun iounmap(base);
134*4882a593Smuzhiyun return ret;
135*4882a593Smuzhiyun }
136*4882a593Smuzhiyun TIMER_OF_DECLARE(bcm2835, "brcm,bcm2835-system-timer",
137*4882a593Smuzhiyun bcm2835_timer_init);
138