1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Clock driver for the ARM Integrator/IM-PD1 board
4*4882a593Smuzhiyun * Copyright (C) 2012-2013 Linus Walleij
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun #include <linux/clk-provider.h>
7*4882a593Smuzhiyun #include <linux/clkdev.h>
8*4882a593Smuzhiyun #include <linux/err.h>
9*4882a593Smuzhiyun #include <linux/io.h>
10*4882a593Smuzhiyun #include <linux/platform_device.h>
11*4882a593Smuzhiyun #include <linux/module.h>
12*4882a593Smuzhiyun #include <linux/mfd/syscon.h>
13*4882a593Smuzhiyun #include <linux/regmap.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #include "icst.h"
16*4882a593Smuzhiyun #include "clk-icst.h"
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #define IMPD1_OSC1 0x00
19*4882a593Smuzhiyun #define IMPD1_OSC2 0x04
20*4882a593Smuzhiyun #define IMPD1_LOCK 0x08
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun /*
23*4882a593Smuzhiyun * There are two VCO's on the IM-PD1
24*4882a593Smuzhiyun */
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun static const struct icst_params impd1_vco1_params = {
27*4882a593Smuzhiyun .ref = 24000000, /* 24 MHz */
28*4882a593Smuzhiyun .vco_max = ICST525_VCO_MAX_3V,
29*4882a593Smuzhiyun .vco_min = ICST525_VCO_MIN,
30*4882a593Smuzhiyun .vd_min = 12,
31*4882a593Smuzhiyun .vd_max = 519,
32*4882a593Smuzhiyun .rd_min = 3,
33*4882a593Smuzhiyun .rd_max = 120,
34*4882a593Smuzhiyun .s2div = icst525_s2div,
35*4882a593Smuzhiyun .idx2s = icst525_idx2s,
36*4882a593Smuzhiyun };
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun static const struct clk_icst_desc impd1_icst1_desc = {
39*4882a593Smuzhiyun .params = &impd1_vco1_params,
40*4882a593Smuzhiyun .vco_offset = IMPD1_OSC1,
41*4882a593Smuzhiyun .lock_offset = IMPD1_LOCK,
42*4882a593Smuzhiyun };
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun static const struct icst_params impd1_vco2_params = {
45*4882a593Smuzhiyun .ref = 24000000, /* 24 MHz */
46*4882a593Smuzhiyun .vco_max = ICST525_VCO_MAX_3V,
47*4882a593Smuzhiyun .vco_min = ICST525_VCO_MIN,
48*4882a593Smuzhiyun .vd_min = 12,
49*4882a593Smuzhiyun .vd_max = 519,
50*4882a593Smuzhiyun .rd_min = 3,
51*4882a593Smuzhiyun .rd_max = 120,
52*4882a593Smuzhiyun .s2div = icst525_s2div,
53*4882a593Smuzhiyun .idx2s = icst525_idx2s,
54*4882a593Smuzhiyun };
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun static const struct clk_icst_desc impd1_icst2_desc = {
57*4882a593Smuzhiyun .params = &impd1_vco2_params,
58*4882a593Smuzhiyun .vco_offset = IMPD1_OSC2,
59*4882a593Smuzhiyun .lock_offset = IMPD1_LOCK,
60*4882a593Smuzhiyun };
61*4882a593Smuzhiyun
integrator_impd1_clk_spawn(struct device * dev,struct device_node * parent,struct device_node * np)62*4882a593Smuzhiyun static int integrator_impd1_clk_spawn(struct device *dev,
63*4882a593Smuzhiyun struct device_node *parent,
64*4882a593Smuzhiyun struct device_node *np)
65*4882a593Smuzhiyun {
66*4882a593Smuzhiyun struct regmap *map;
67*4882a593Smuzhiyun struct clk *clk = ERR_PTR(-EINVAL);
68*4882a593Smuzhiyun const char *name = np->name;
69*4882a593Smuzhiyun const char *parent_name;
70*4882a593Smuzhiyun const struct clk_icst_desc *desc;
71*4882a593Smuzhiyun int ret;
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun map = syscon_node_to_regmap(parent);
74*4882a593Smuzhiyun if (IS_ERR(map)) {
75*4882a593Smuzhiyun pr_err("no regmap for syscon IM-PD1 ICST clock parent\n");
76*4882a593Smuzhiyun return PTR_ERR(map);
77*4882a593Smuzhiyun }
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun if (of_device_is_compatible(np, "arm,impd1-vco1")) {
80*4882a593Smuzhiyun desc = &impd1_icst1_desc;
81*4882a593Smuzhiyun } else if (of_device_is_compatible(np, "arm,impd1-vco2")) {
82*4882a593Smuzhiyun desc = &impd1_icst2_desc;
83*4882a593Smuzhiyun } else {
84*4882a593Smuzhiyun dev_err(dev, "not a clock node %s\n", name);
85*4882a593Smuzhiyun return -ENODEV;
86*4882a593Smuzhiyun }
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun of_property_read_string(np, "clock-output-names", &name);
89*4882a593Smuzhiyun parent_name = of_clk_get_parent_name(np, 0);
90*4882a593Smuzhiyun clk = icst_clk_setup(NULL, desc, name, parent_name, map,
91*4882a593Smuzhiyun ICST_INTEGRATOR_IM_PD1);
92*4882a593Smuzhiyun if (!IS_ERR(clk)) {
93*4882a593Smuzhiyun of_clk_add_provider(np, of_clk_src_simple_get, clk);
94*4882a593Smuzhiyun ret = 0;
95*4882a593Smuzhiyun } else {
96*4882a593Smuzhiyun dev_err(dev, "error setting up IM-PD1 ICST clock\n");
97*4882a593Smuzhiyun ret = PTR_ERR(clk);
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun return ret;
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun
integrator_impd1_clk_probe(struct platform_device * pdev)103*4882a593Smuzhiyun static int integrator_impd1_clk_probe(struct platform_device *pdev)
104*4882a593Smuzhiyun {
105*4882a593Smuzhiyun struct device *dev = &pdev->dev;
106*4882a593Smuzhiyun struct device_node *np = dev->of_node;
107*4882a593Smuzhiyun struct device_node *child;
108*4882a593Smuzhiyun int ret = 0;
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun for_each_available_child_of_node(np, child) {
111*4882a593Smuzhiyun ret = integrator_impd1_clk_spawn(dev, np, child);
112*4882a593Smuzhiyun if (ret) {
113*4882a593Smuzhiyun of_node_put(child);
114*4882a593Smuzhiyun break;
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun return ret;
119*4882a593Smuzhiyun }
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun static const struct of_device_id impd1_syscon_match[] = {
122*4882a593Smuzhiyun { .compatible = "arm,im-pd1-syscon", },
123*4882a593Smuzhiyun {}
124*4882a593Smuzhiyun };
125*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, impd1_syscon_match);
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun static struct platform_driver impd1_clk_driver = {
128*4882a593Smuzhiyun .driver = {
129*4882a593Smuzhiyun .name = "impd1-clk",
130*4882a593Smuzhiyun .of_match_table = impd1_syscon_match,
131*4882a593Smuzhiyun },
132*4882a593Smuzhiyun .probe = integrator_impd1_clk_probe,
133*4882a593Smuzhiyun };
134*4882a593Smuzhiyun builtin_platform_driver(impd1_clk_driver);
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun MODULE_AUTHOR("Linus Walleij <linusw@kernel.org>");
137*4882a593Smuzhiyun MODULE_DESCRIPTION("Arm IM-PD1 module clock driver");
138*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
139