1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved.
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun #include <linux/clk-provider.h>
7*4882a593Smuzhiyun #include <linux/slab.h>
8*4882a593Smuzhiyun #include <linux/err.h>
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include "clk.h"
11*4882a593Smuzhiyun
clk_sync_source_recalc_rate(struct clk_hw * hw,unsigned long parent_rate)12*4882a593Smuzhiyun static unsigned long clk_sync_source_recalc_rate(struct clk_hw *hw,
13*4882a593Smuzhiyun unsigned long parent_rate)
14*4882a593Smuzhiyun {
15*4882a593Smuzhiyun struct tegra_clk_sync_source *sync = to_clk_sync_source(hw);
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun return sync->rate;
18*4882a593Smuzhiyun }
19*4882a593Smuzhiyun
clk_sync_source_round_rate(struct clk_hw * hw,unsigned long rate,unsigned long * prate)20*4882a593Smuzhiyun static long clk_sync_source_round_rate(struct clk_hw *hw, unsigned long rate,
21*4882a593Smuzhiyun unsigned long *prate)
22*4882a593Smuzhiyun {
23*4882a593Smuzhiyun struct tegra_clk_sync_source *sync = to_clk_sync_source(hw);
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun if (rate > sync->max_rate)
26*4882a593Smuzhiyun return -EINVAL;
27*4882a593Smuzhiyun else
28*4882a593Smuzhiyun return rate;
29*4882a593Smuzhiyun }
30*4882a593Smuzhiyun
clk_sync_source_set_rate(struct clk_hw * hw,unsigned long rate,unsigned long parent_rate)31*4882a593Smuzhiyun static int clk_sync_source_set_rate(struct clk_hw *hw, unsigned long rate,
32*4882a593Smuzhiyun unsigned long parent_rate)
33*4882a593Smuzhiyun {
34*4882a593Smuzhiyun struct tegra_clk_sync_source *sync = to_clk_sync_source(hw);
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun sync->rate = rate;
37*4882a593Smuzhiyun return 0;
38*4882a593Smuzhiyun }
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun const struct clk_ops tegra_clk_sync_source_ops = {
41*4882a593Smuzhiyun .round_rate = clk_sync_source_round_rate,
42*4882a593Smuzhiyun .set_rate = clk_sync_source_set_rate,
43*4882a593Smuzhiyun .recalc_rate = clk_sync_source_recalc_rate,
44*4882a593Smuzhiyun };
45*4882a593Smuzhiyun
tegra_clk_register_sync_source(const char * name,unsigned long max_rate)46*4882a593Smuzhiyun struct clk *tegra_clk_register_sync_source(const char *name,
47*4882a593Smuzhiyun unsigned long max_rate)
48*4882a593Smuzhiyun {
49*4882a593Smuzhiyun struct tegra_clk_sync_source *sync;
50*4882a593Smuzhiyun struct clk_init_data init;
51*4882a593Smuzhiyun struct clk *clk;
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun sync = kzalloc(sizeof(*sync), GFP_KERNEL);
54*4882a593Smuzhiyun if (!sync) {
55*4882a593Smuzhiyun pr_err("%s: could not allocate sync source clk\n", __func__);
56*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
57*4882a593Smuzhiyun }
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun sync->max_rate = max_rate;
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun init.ops = &tegra_clk_sync_source_ops;
62*4882a593Smuzhiyun init.name = name;
63*4882a593Smuzhiyun init.flags = 0;
64*4882a593Smuzhiyun init.parent_names = NULL;
65*4882a593Smuzhiyun init.num_parents = 0;
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun /* Data in .init is copied by clk_register(), so stack variable OK */
68*4882a593Smuzhiyun sync->hw.init = &init;
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun clk = clk_register(NULL, &sync->hw);
71*4882a593Smuzhiyun if (IS_ERR(clk))
72*4882a593Smuzhiyun kfree(sync);
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun return clk;
75*4882a593Smuzhiyun }
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