1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2015 Jens Kuske <jenskuske@gmail.com>
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Based on clk-simple-gates.c, which is:
6*4882a593Smuzhiyun * Copyright 2015 Maxime Ripard
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Maxime Ripard <maxime.ripard@free-electrons.com>
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <linux/clk-provider.h>
12*4882a593Smuzhiyun #include <linux/io.h>
13*4882a593Smuzhiyun #include <linux/of.h>
14*4882a593Smuzhiyun #include <linux/of_address.h>
15*4882a593Smuzhiyun #include <linux/slab.h>
16*4882a593Smuzhiyun #include <linux/spinlock.h>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun static DEFINE_SPINLOCK(gates_lock);
19*4882a593Smuzhiyun
sun8i_h3_bus_gates_init(struct device_node * node)20*4882a593Smuzhiyun static void __init sun8i_h3_bus_gates_init(struct device_node *node)
21*4882a593Smuzhiyun {
22*4882a593Smuzhiyun static const char * const names[] = { "ahb1", "ahb2", "apb1", "apb2" };
23*4882a593Smuzhiyun enum { AHB1, AHB2, APB1, APB2, PARENT_MAX } clk_parent;
24*4882a593Smuzhiyun const char *parents[PARENT_MAX];
25*4882a593Smuzhiyun struct clk_onecell_data *clk_data;
26*4882a593Smuzhiyun const char *clk_name;
27*4882a593Smuzhiyun struct property *prop;
28*4882a593Smuzhiyun struct resource res;
29*4882a593Smuzhiyun void __iomem *clk_reg;
30*4882a593Smuzhiyun void __iomem *reg;
31*4882a593Smuzhiyun const __be32 *p;
32*4882a593Smuzhiyun int number, i;
33*4882a593Smuzhiyun u8 clk_bit;
34*4882a593Smuzhiyun int index;
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun reg = of_io_request_and_map(node, 0, of_node_full_name(node));
37*4882a593Smuzhiyun if (IS_ERR(reg))
38*4882a593Smuzhiyun return;
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(names); i++) {
41*4882a593Smuzhiyun int idx = of_property_match_string(node, "clock-names",
42*4882a593Smuzhiyun names[i]);
43*4882a593Smuzhiyun if (idx < 0)
44*4882a593Smuzhiyun return;
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun parents[i] = of_clk_get_parent_name(node, idx);
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun clk_data = kmalloc(sizeof(struct clk_onecell_data), GFP_KERNEL);
50*4882a593Smuzhiyun if (!clk_data)
51*4882a593Smuzhiyun goto err_unmap;
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun number = of_property_count_u32_elems(node, "clock-indices");
54*4882a593Smuzhiyun of_property_read_u32_index(node, "clock-indices", number - 1, &number);
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun clk_data->clks = kcalloc(number + 1, sizeof(struct clk *), GFP_KERNEL);
57*4882a593Smuzhiyun if (!clk_data->clks)
58*4882a593Smuzhiyun goto err_free_data;
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun i = 0;
61*4882a593Smuzhiyun of_property_for_each_u32(node, "clock-indices", prop, p, index) {
62*4882a593Smuzhiyun of_property_read_string_index(node, "clock-output-names",
63*4882a593Smuzhiyun i, &clk_name);
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun if (index == 17 || (index >= 29 && index <= 31))
66*4882a593Smuzhiyun clk_parent = AHB2;
67*4882a593Smuzhiyun else if (index <= 63 || index >= 128)
68*4882a593Smuzhiyun clk_parent = AHB1;
69*4882a593Smuzhiyun else if (index >= 64 && index <= 95)
70*4882a593Smuzhiyun clk_parent = APB1;
71*4882a593Smuzhiyun else if (index >= 96 && index <= 127)
72*4882a593Smuzhiyun clk_parent = APB2;
73*4882a593Smuzhiyun else {
74*4882a593Smuzhiyun WARN_ON(true);
75*4882a593Smuzhiyun continue;
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun clk_reg = reg + 4 * (index / 32);
79*4882a593Smuzhiyun clk_bit = index % 32;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun clk_data->clks[index] = clk_register_gate(NULL, clk_name,
82*4882a593Smuzhiyun parents[clk_parent],
83*4882a593Smuzhiyun 0, clk_reg, clk_bit,
84*4882a593Smuzhiyun 0, &gates_lock);
85*4882a593Smuzhiyun i++;
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun if (IS_ERR(clk_data->clks[index])) {
88*4882a593Smuzhiyun WARN_ON(true);
89*4882a593Smuzhiyun continue;
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun }
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun clk_data->clk_num = number + 1;
94*4882a593Smuzhiyun of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun return;
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun err_free_data:
99*4882a593Smuzhiyun kfree(clk_data);
100*4882a593Smuzhiyun err_unmap:
101*4882a593Smuzhiyun iounmap(reg);
102*4882a593Smuzhiyun of_address_to_resource(node, 0, &res);
103*4882a593Smuzhiyun release_mem_region(res.start, resource_size(&res));
104*4882a593Smuzhiyun }
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun CLK_OF_DECLARE(sun8i_h3_bus_gates, "allwinner,sun8i-h3-bus-gates-clk",
107*4882a593Smuzhiyun sun8i_h3_bus_gates_init);
108*4882a593Smuzhiyun CLK_OF_DECLARE(sun8i_a83t_bus_gates, "allwinner,sun8i-a83t-bus-gates-clk",
109*4882a593Smuzhiyun sun8i_h3_bus_gates_init);
110