xref: /OK3568_Linux_fs/kernel/drivers/clk/sunxi-ng/ccu_sdm.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (c) 2017 Chen-Yu Tsai. All rights reserved.
4*4882a593Smuzhiyun  */
5*4882a593Smuzhiyun 
6*4882a593Smuzhiyun #ifndef _CCU_SDM_H
7*4882a593Smuzhiyun #define _CCU_SDM_H
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #include <linux/clk-provider.h>
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #include "ccu_common.h"
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun struct ccu_sdm_setting {
14*4882a593Smuzhiyun 	unsigned long	rate;
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun 	/*
17*4882a593Smuzhiyun 	 * XXX We don't know what the step and bottom register fields
18*4882a593Smuzhiyun 	 * mean. Just copy the whole register value from the vendor
19*4882a593Smuzhiyun 	 * kernel for now.
20*4882a593Smuzhiyun 	 */
21*4882a593Smuzhiyun 	u32		pattern;
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun 	/*
24*4882a593Smuzhiyun 	 * M and N factors here should be the values used in
25*4882a593Smuzhiyun 	 * calculation, not the raw values written to registers
26*4882a593Smuzhiyun 	 */
27*4882a593Smuzhiyun 	u32		m;
28*4882a593Smuzhiyun 	u32		n;
29*4882a593Smuzhiyun };
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun struct ccu_sdm_internal {
32*4882a593Smuzhiyun 	struct ccu_sdm_setting	*table;
33*4882a593Smuzhiyun 	u32		table_size;
34*4882a593Smuzhiyun 	/* early SoCs don't have the SDM enable bit in the PLL register */
35*4882a593Smuzhiyun 	u32		enable;
36*4882a593Smuzhiyun 	/* second enable bit in tuning register */
37*4882a593Smuzhiyun 	u32		tuning_enable;
38*4882a593Smuzhiyun 	u16		tuning_reg;
39*4882a593Smuzhiyun };
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun #define _SUNXI_CCU_SDM(_table, _enable,			\
42*4882a593Smuzhiyun 		       _reg, _reg_enable)		\
43*4882a593Smuzhiyun 	{						\
44*4882a593Smuzhiyun 		.table		= _table,		\
45*4882a593Smuzhiyun 		.table_size	= ARRAY_SIZE(_table),	\
46*4882a593Smuzhiyun 		.enable		= _enable,		\
47*4882a593Smuzhiyun 		.tuning_enable	= _reg_enable,		\
48*4882a593Smuzhiyun 		.tuning_reg	= _reg,			\
49*4882a593Smuzhiyun 	}
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun bool ccu_sdm_helper_is_enabled(struct ccu_common *common,
52*4882a593Smuzhiyun 			       struct ccu_sdm_internal *sdm);
53*4882a593Smuzhiyun void ccu_sdm_helper_enable(struct ccu_common *common,
54*4882a593Smuzhiyun 			   struct ccu_sdm_internal *sdm,
55*4882a593Smuzhiyun 			   unsigned long rate);
56*4882a593Smuzhiyun void ccu_sdm_helper_disable(struct ccu_common *common,
57*4882a593Smuzhiyun 			    struct ccu_sdm_internal *sdm);
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun bool ccu_sdm_helper_has_rate(struct ccu_common *common,
60*4882a593Smuzhiyun 			     struct ccu_sdm_internal *sdm,
61*4882a593Smuzhiyun 			     unsigned long rate);
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun unsigned long ccu_sdm_helper_read_rate(struct ccu_common *common,
64*4882a593Smuzhiyun 				       struct ccu_sdm_internal *sdm,
65*4882a593Smuzhiyun 				       u32 m, u32 n);
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun int ccu_sdm_helper_get_factors(struct ccu_common *common,
68*4882a593Smuzhiyun 			       struct ccu_sdm_internal *sdm,
69*4882a593Smuzhiyun 			       unsigned long rate,
70*4882a593Smuzhiyun 			       unsigned long *m, unsigned long *n);
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun #endif
73