1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2017 Chen-Yu Tsai <wens@csie.org>
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun #include <linux/clk-provider.h>
7*4882a593Smuzhiyun #include <linux/io.h>
8*4882a593Smuzhiyun #include <linux/spinlock.h>
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include "ccu_sdm.h"
11*4882a593Smuzhiyun
ccu_sdm_helper_is_enabled(struct ccu_common * common,struct ccu_sdm_internal * sdm)12*4882a593Smuzhiyun bool ccu_sdm_helper_is_enabled(struct ccu_common *common,
13*4882a593Smuzhiyun struct ccu_sdm_internal *sdm)
14*4882a593Smuzhiyun {
15*4882a593Smuzhiyun if (!(common->features & CCU_FEATURE_SIGMA_DELTA_MOD))
16*4882a593Smuzhiyun return false;
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun if (sdm->enable && !(readl(common->base + common->reg) & sdm->enable))
19*4882a593Smuzhiyun return false;
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun return !!(readl(common->base + sdm->tuning_reg) & sdm->tuning_enable);
22*4882a593Smuzhiyun }
23*4882a593Smuzhiyun
ccu_sdm_helper_enable(struct ccu_common * common,struct ccu_sdm_internal * sdm,unsigned long rate)24*4882a593Smuzhiyun void ccu_sdm_helper_enable(struct ccu_common *common,
25*4882a593Smuzhiyun struct ccu_sdm_internal *sdm,
26*4882a593Smuzhiyun unsigned long rate)
27*4882a593Smuzhiyun {
28*4882a593Smuzhiyun unsigned long flags;
29*4882a593Smuzhiyun unsigned int i;
30*4882a593Smuzhiyun u32 reg;
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun if (!(common->features & CCU_FEATURE_SIGMA_DELTA_MOD))
33*4882a593Smuzhiyun return;
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun /* Set the pattern */
36*4882a593Smuzhiyun for (i = 0; i < sdm->table_size; i++)
37*4882a593Smuzhiyun if (sdm->table[i].rate == rate)
38*4882a593Smuzhiyun writel(sdm->table[i].pattern,
39*4882a593Smuzhiyun common->base + sdm->tuning_reg);
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun /* Make sure SDM is enabled */
42*4882a593Smuzhiyun spin_lock_irqsave(common->lock, flags);
43*4882a593Smuzhiyun reg = readl(common->base + sdm->tuning_reg);
44*4882a593Smuzhiyun writel(reg | sdm->tuning_enable, common->base + sdm->tuning_reg);
45*4882a593Smuzhiyun spin_unlock_irqrestore(common->lock, flags);
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun spin_lock_irqsave(common->lock, flags);
48*4882a593Smuzhiyun reg = readl(common->base + common->reg);
49*4882a593Smuzhiyun writel(reg | sdm->enable, common->base + common->reg);
50*4882a593Smuzhiyun spin_unlock_irqrestore(common->lock, flags);
51*4882a593Smuzhiyun }
52*4882a593Smuzhiyun
ccu_sdm_helper_disable(struct ccu_common * common,struct ccu_sdm_internal * sdm)53*4882a593Smuzhiyun void ccu_sdm_helper_disable(struct ccu_common *common,
54*4882a593Smuzhiyun struct ccu_sdm_internal *sdm)
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun unsigned long flags;
57*4882a593Smuzhiyun u32 reg;
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun if (!(common->features & CCU_FEATURE_SIGMA_DELTA_MOD))
60*4882a593Smuzhiyun return;
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun spin_lock_irqsave(common->lock, flags);
63*4882a593Smuzhiyun reg = readl(common->base + common->reg);
64*4882a593Smuzhiyun writel(reg & ~sdm->enable, common->base + common->reg);
65*4882a593Smuzhiyun spin_unlock_irqrestore(common->lock, flags);
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun spin_lock_irqsave(common->lock, flags);
68*4882a593Smuzhiyun reg = readl(common->base + sdm->tuning_reg);
69*4882a593Smuzhiyun writel(reg & ~sdm->tuning_enable, common->base + sdm->tuning_reg);
70*4882a593Smuzhiyun spin_unlock_irqrestore(common->lock, flags);
71*4882a593Smuzhiyun }
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun /*
74*4882a593Smuzhiyun * Sigma delta modulation provides a way to do fractional-N frequency
75*4882a593Smuzhiyun * synthesis, in essence allowing the PLL to output any frequency
76*4882a593Smuzhiyun * within its operational range. On earlier SoCs such as the A10/A20,
77*4882a593Smuzhiyun * some PLLs support this. On later SoCs, all PLLs support this.
78*4882a593Smuzhiyun *
79*4882a593Smuzhiyun * The datasheets do not explain what the "wave top" and "wave bottom"
80*4882a593Smuzhiyun * parameters mean or do, nor how to calculate the effective output
81*4882a593Smuzhiyun * frequency. The only examples (and real world usage) are for the audio
82*4882a593Smuzhiyun * PLL to generate 24.576 and 22.5792 MHz clock rates used by the audio
83*4882a593Smuzhiyun * peripherals. The author lacks the underlying domain knowledge to
84*4882a593Smuzhiyun * pursue this.
85*4882a593Smuzhiyun *
86*4882a593Smuzhiyun * The goal and function of the following code is to support the two
87*4882a593Smuzhiyun * clock rates used by the audio subsystem, allowing for proper audio
88*4882a593Smuzhiyun * playback and capture without any pitch or speed changes.
89*4882a593Smuzhiyun */
ccu_sdm_helper_has_rate(struct ccu_common * common,struct ccu_sdm_internal * sdm,unsigned long rate)90*4882a593Smuzhiyun bool ccu_sdm_helper_has_rate(struct ccu_common *common,
91*4882a593Smuzhiyun struct ccu_sdm_internal *sdm,
92*4882a593Smuzhiyun unsigned long rate)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun unsigned int i;
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun if (!(common->features & CCU_FEATURE_SIGMA_DELTA_MOD))
97*4882a593Smuzhiyun return false;
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun for (i = 0; i < sdm->table_size; i++)
100*4882a593Smuzhiyun if (sdm->table[i].rate == rate)
101*4882a593Smuzhiyun return true;
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun return false;
104*4882a593Smuzhiyun }
105*4882a593Smuzhiyun
ccu_sdm_helper_read_rate(struct ccu_common * common,struct ccu_sdm_internal * sdm,u32 m,u32 n)106*4882a593Smuzhiyun unsigned long ccu_sdm_helper_read_rate(struct ccu_common *common,
107*4882a593Smuzhiyun struct ccu_sdm_internal *sdm,
108*4882a593Smuzhiyun u32 m, u32 n)
109*4882a593Smuzhiyun {
110*4882a593Smuzhiyun unsigned int i;
111*4882a593Smuzhiyun u32 reg;
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun pr_debug("%s: Read sigma-delta modulation setting\n",
114*4882a593Smuzhiyun clk_hw_get_name(&common->hw));
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun if (!(common->features & CCU_FEATURE_SIGMA_DELTA_MOD))
117*4882a593Smuzhiyun return 0;
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun pr_debug("%s: clock is sigma-delta modulated\n",
120*4882a593Smuzhiyun clk_hw_get_name(&common->hw));
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun reg = readl(common->base + sdm->tuning_reg);
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun pr_debug("%s: pattern reg is 0x%x",
125*4882a593Smuzhiyun clk_hw_get_name(&common->hw), reg);
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun for (i = 0; i < sdm->table_size; i++)
128*4882a593Smuzhiyun if (sdm->table[i].pattern == reg &&
129*4882a593Smuzhiyun sdm->table[i].m == m && sdm->table[i].n == n)
130*4882a593Smuzhiyun return sdm->table[i].rate;
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun /* We can't calculate the effective clock rate, so just fail. */
133*4882a593Smuzhiyun return 0;
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun
ccu_sdm_helper_get_factors(struct ccu_common * common,struct ccu_sdm_internal * sdm,unsigned long rate,unsigned long * m,unsigned long * n)136*4882a593Smuzhiyun int ccu_sdm_helper_get_factors(struct ccu_common *common,
137*4882a593Smuzhiyun struct ccu_sdm_internal *sdm,
138*4882a593Smuzhiyun unsigned long rate,
139*4882a593Smuzhiyun unsigned long *m, unsigned long *n)
140*4882a593Smuzhiyun {
141*4882a593Smuzhiyun unsigned int i;
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun if (!(common->features & CCU_FEATURE_SIGMA_DELTA_MOD))
144*4882a593Smuzhiyun return -EINVAL;
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun for (i = 0; i < sdm->table_size; i++)
147*4882a593Smuzhiyun if (sdm->table[i].rate == rate) {
148*4882a593Smuzhiyun *m = sdm->table[i].m;
149*4882a593Smuzhiyun *n = sdm->table[i].n;
150*4882a593Smuzhiyun return 0;
151*4882a593Smuzhiyun }
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun /* nothing found */
154*4882a593Smuzhiyun return -EINVAL;
155*4882a593Smuzhiyun }
156