1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun #ifndef _CCU_MULT_H_
3*4882a593Smuzhiyun #define _CCU_MULT_H_
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun #include "ccu_common.h"
6*4882a593Smuzhiyun #include "ccu_frac.h"
7*4882a593Smuzhiyun #include "ccu_mux.h"
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun struct ccu_mult_internal {
10*4882a593Smuzhiyun u8 offset;
11*4882a593Smuzhiyun u8 shift;
12*4882a593Smuzhiyun u8 width;
13*4882a593Smuzhiyun u8 min;
14*4882a593Smuzhiyun u8 max;
15*4882a593Smuzhiyun };
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #define _SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, _offset, _min, _max) \
18*4882a593Smuzhiyun { \
19*4882a593Smuzhiyun .min = _min, \
20*4882a593Smuzhiyun .max = _max, \
21*4882a593Smuzhiyun .offset = _offset, \
22*4882a593Smuzhiyun .shift = _shift, \
23*4882a593Smuzhiyun .width = _width, \
24*4882a593Smuzhiyun }
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun #define _SUNXI_CCU_MULT_MIN(_shift, _width, _min) \
27*4882a593Smuzhiyun _SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, 1, _min, 0)
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun #define _SUNXI_CCU_MULT_OFFSET(_shift, _width, _offset) \
30*4882a593Smuzhiyun _SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, _offset, 1, 0)
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun #define _SUNXI_CCU_MULT(_shift, _width) \
33*4882a593Smuzhiyun _SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, 1, 1, 0)
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun struct ccu_mult {
36*4882a593Smuzhiyun u32 enable;
37*4882a593Smuzhiyun u32 lock;
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun struct ccu_frac_internal frac;
40*4882a593Smuzhiyun struct ccu_mult_internal mult;
41*4882a593Smuzhiyun struct ccu_mux_internal mux;
42*4882a593Smuzhiyun struct ccu_common common;
43*4882a593Smuzhiyun };
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun #define SUNXI_CCU_N_WITH_GATE_LOCK(_struct, _name, _parent, _reg, \
46*4882a593Smuzhiyun _mshift, _mwidth, _gate, _lock, \
47*4882a593Smuzhiyun _flags) \
48*4882a593Smuzhiyun struct ccu_mult _struct = { \
49*4882a593Smuzhiyun .enable = _gate, \
50*4882a593Smuzhiyun .lock = _lock, \
51*4882a593Smuzhiyun .mult = _SUNXI_CCU_MULT(_mshift, _mwidth), \
52*4882a593Smuzhiyun .common = { \
53*4882a593Smuzhiyun .reg = _reg, \
54*4882a593Smuzhiyun .hw.init = CLK_HW_INIT(_name, \
55*4882a593Smuzhiyun _parent, \
56*4882a593Smuzhiyun &ccu_mult_ops, \
57*4882a593Smuzhiyun _flags), \
58*4882a593Smuzhiyun }, \
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun
hw_to_ccu_mult(struct clk_hw * hw)61*4882a593Smuzhiyun static inline struct ccu_mult *hw_to_ccu_mult(struct clk_hw *hw)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun struct ccu_common *common = hw_to_ccu_common(hw);
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun return container_of(common, struct ccu_mult, common);
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun extern const struct clk_ops ccu_mult_ops;
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun #endif /* _CCU_MULT_H_ */
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