1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2016 Maxime Ripard
4*4882a593Smuzhiyun * Maxime Ripard <maxime.ripard@free-electrons.com>
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <linux/clk-provider.h>
8*4882a593Smuzhiyun #include <linux/io.h>
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include "ccu_gate.h"
11*4882a593Smuzhiyun
ccu_gate_helper_disable(struct ccu_common * common,u32 gate)12*4882a593Smuzhiyun void ccu_gate_helper_disable(struct ccu_common *common, u32 gate)
13*4882a593Smuzhiyun {
14*4882a593Smuzhiyun unsigned long flags;
15*4882a593Smuzhiyun u32 reg;
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun if (!gate)
18*4882a593Smuzhiyun return;
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun spin_lock_irqsave(common->lock, flags);
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun reg = readl(common->base + common->reg);
23*4882a593Smuzhiyun writel(reg & ~gate, common->base + common->reg);
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun spin_unlock_irqrestore(common->lock, flags);
26*4882a593Smuzhiyun }
27*4882a593Smuzhiyun
ccu_gate_disable(struct clk_hw * hw)28*4882a593Smuzhiyun static void ccu_gate_disable(struct clk_hw *hw)
29*4882a593Smuzhiyun {
30*4882a593Smuzhiyun struct ccu_gate *cg = hw_to_ccu_gate(hw);
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun return ccu_gate_helper_disable(&cg->common, cg->enable);
33*4882a593Smuzhiyun }
34*4882a593Smuzhiyun
ccu_gate_helper_enable(struct ccu_common * common,u32 gate)35*4882a593Smuzhiyun int ccu_gate_helper_enable(struct ccu_common *common, u32 gate)
36*4882a593Smuzhiyun {
37*4882a593Smuzhiyun unsigned long flags;
38*4882a593Smuzhiyun u32 reg;
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun if (!gate)
41*4882a593Smuzhiyun return 0;
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun spin_lock_irqsave(common->lock, flags);
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun reg = readl(common->base + common->reg);
46*4882a593Smuzhiyun writel(reg | gate, common->base + common->reg);
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun spin_unlock_irqrestore(common->lock, flags);
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun return 0;
51*4882a593Smuzhiyun }
52*4882a593Smuzhiyun
ccu_gate_enable(struct clk_hw * hw)53*4882a593Smuzhiyun static int ccu_gate_enable(struct clk_hw *hw)
54*4882a593Smuzhiyun {
55*4882a593Smuzhiyun struct ccu_gate *cg = hw_to_ccu_gate(hw);
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun return ccu_gate_helper_enable(&cg->common, cg->enable);
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun
ccu_gate_helper_is_enabled(struct ccu_common * common,u32 gate)60*4882a593Smuzhiyun int ccu_gate_helper_is_enabled(struct ccu_common *common, u32 gate)
61*4882a593Smuzhiyun {
62*4882a593Smuzhiyun if (!gate)
63*4882a593Smuzhiyun return 1;
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun return readl(common->base + common->reg) & gate;
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun
ccu_gate_is_enabled(struct clk_hw * hw)68*4882a593Smuzhiyun static int ccu_gate_is_enabled(struct clk_hw *hw)
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun struct ccu_gate *cg = hw_to_ccu_gate(hw);
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun return ccu_gate_helper_is_enabled(&cg->common, cg->enable);
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun
ccu_gate_recalc_rate(struct clk_hw * hw,unsigned long parent_rate)75*4882a593Smuzhiyun static unsigned long ccu_gate_recalc_rate(struct clk_hw *hw,
76*4882a593Smuzhiyun unsigned long parent_rate)
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun struct ccu_gate *cg = hw_to_ccu_gate(hw);
79*4882a593Smuzhiyun unsigned long rate = parent_rate;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun if (cg->common.features & CCU_FEATURE_ALL_PREDIV)
82*4882a593Smuzhiyun rate /= cg->common.prediv;
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun return rate;
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun
ccu_gate_round_rate(struct clk_hw * hw,unsigned long rate,unsigned long * prate)87*4882a593Smuzhiyun static long ccu_gate_round_rate(struct clk_hw *hw, unsigned long rate,
88*4882a593Smuzhiyun unsigned long *prate)
89*4882a593Smuzhiyun {
90*4882a593Smuzhiyun struct ccu_gate *cg = hw_to_ccu_gate(hw);
91*4882a593Smuzhiyun int div = 1;
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun if (cg->common.features & CCU_FEATURE_ALL_PREDIV)
94*4882a593Smuzhiyun div = cg->common.prediv;
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun if (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) {
97*4882a593Smuzhiyun unsigned long best_parent = rate;
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun if (cg->common.features & CCU_FEATURE_ALL_PREDIV)
100*4882a593Smuzhiyun best_parent *= div;
101*4882a593Smuzhiyun *prate = clk_hw_round_rate(clk_hw_get_parent(hw), best_parent);
102*4882a593Smuzhiyun }
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun return *prate / div;
105*4882a593Smuzhiyun }
106*4882a593Smuzhiyun
ccu_gate_set_rate(struct clk_hw * hw,unsigned long rate,unsigned long parent_rate)107*4882a593Smuzhiyun static int ccu_gate_set_rate(struct clk_hw *hw, unsigned long rate,
108*4882a593Smuzhiyun unsigned long parent_rate)
109*4882a593Smuzhiyun {
110*4882a593Smuzhiyun /*
111*4882a593Smuzhiyun * We must report success but we can do so unconditionally because
112*4882a593Smuzhiyun * clk_factor_round_rate returns values that ensure this call is a
113*4882a593Smuzhiyun * nop.
114*4882a593Smuzhiyun */
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun return 0;
117*4882a593Smuzhiyun }
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun const struct clk_ops ccu_gate_ops = {
120*4882a593Smuzhiyun .disable = ccu_gate_disable,
121*4882a593Smuzhiyun .enable = ccu_gate_enable,
122*4882a593Smuzhiyun .is_enabled = ccu_gate_is_enabled,
123*4882a593Smuzhiyun .round_rate = ccu_gate_round_rate,
124*4882a593Smuzhiyun .set_rate = ccu_gate_set_rate,
125*4882a593Smuzhiyun .recalc_rate = ccu_gate_recalc_rate,
126*4882a593Smuzhiyun };
127