1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2016 Maxime Ripard
4*4882a593Smuzhiyun * Maxime Ripard <maxime.ripard@free-electrons.com>
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <linux/clk-provider.h>
8*4882a593Smuzhiyun #include <linux/io.h>
9*4882a593Smuzhiyun #include <linux/spinlock.h>
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include "ccu_frac.h"
12*4882a593Smuzhiyun
ccu_frac_helper_is_enabled(struct ccu_common * common,struct ccu_frac_internal * cf)13*4882a593Smuzhiyun bool ccu_frac_helper_is_enabled(struct ccu_common *common,
14*4882a593Smuzhiyun struct ccu_frac_internal *cf)
15*4882a593Smuzhiyun {
16*4882a593Smuzhiyun if (!(common->features & CCU_FEATURE_FRACTIONAL))
17*4882a593Smuzhiyun return false;
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun return !(readl(common->base + common->reg) & cf->enable);
20*4882a593Smuzhiyun }
21*4882a593Smuzhiyun
ccu_frac_helper_enable(struct ccu_common * common,struct ccu_frac_internal * cf)22*4882a593Smuzhiyun void ccu_frac_helper_enable(struct ccu_common *common,
23*4882a593Smuzhiyun struct ccu_frac_internal *cf)
24*4882a593Smuzhiyun {
25*4882a593Smuzhiyun unsigned long flags;
26*4882a593Smuzhiyun u32 reg;
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun if (!(common->features & CCU_FEATURE_FRACTIONAL))
29*4882a593Smuzhiyun return;
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun spin_lock_irqsave(common->lock, flags);
32*4882a593Smuzhiyun reg = readl(common->base + common->reg);
33*4882a593Smuzhiyun writel(reg & ~cf->enable, common->base + common->reg);
34*4882a593Smuzhiyun spin_unlock_irqrestore(common->lock, flags);
35*4882a593Smuzhiyun }
36*4882a593Smuzhiyun
ccu_frac_helper_disable(struct ccu_common * common,struct ccu_frac_internal * cf)37*4882a593Smuzhiyun void ccu_frac_helper_disable(struct ccu_common *common,
38*4882a593Smuzhiyun struct ccu_frac_internal *cf)
39*4882a593Smuzhiyun {
40*4882a593Smuzhiyun unsigned long flags;
41*4882a593Smuzhiyun u32 reg;
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun if (!(common->features & CCU_FEATURE_FRACTIONAL))
44*4882a593Smuzhiyun return;
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun spin_lock_irqsave(common->lock, flags);
47*4882a593Smuzhiyun reg = readl(common->base + common->reg);
48*4882a593Smuzhiyun writel(reg | cf->enable, common->base + common->reg);
49*4882a593Smuzhiyun spin_unlock_irqrestore(common->lock, flags);
50*4882a593Smuzhiyun }
51*4882a593Smuzhiyun
ccu_frac_helper_has_rate(struct ccu_common * common,struct ccu_frac_internal * cf,unsigned long rate)52*4882a593Smuzhiyun bool ccu_frac_helper_has_rate(struct ccu_common *common,
53*4882a593Smuzhiyun struct ccu_frac_internal *cf,
54*4882a593Smuzhiyun unsigned long rate)
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun if (!(common->features & CCU_FEATURE_FRACTIONAL))
57*4882a593Smuzhiyun return false;
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun return (cf->rates[0] == rate) || (cf->rates[1] == rate);
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun
ccu_frac_helper_read_rate(struct ccu_common * common,struct ccu_frac_internal * cf)62*4882a593Smuzhiyun unsigned long ccu_frac_helper_read_rate(struct ccu_common *common,
63*4882a593Smuzhiyun struct ccu_frac_internal *cf)
64*4882a593Smuzhiyun {
65*4882a593Smuzhiyun u32 reg;
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun pr_debug("%s: Read fractional\n", clk_hw_get_name(&common->hw));
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun if (!(common->features & CCU_FEATURE_FRACTIONAL))
70*4882a593Smuzhiyun return 0;
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun pr_debug("%s: clock is fractional (rates %lu and %lu)\n",
73*4882a593Smuzhiyun clk_hw_get_name(&common->hw), cf->rates[0], cf->rates[1]);
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun reg = readl(common->base + common->reg);
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun pr_debug("%s: clock reg is 0x%x (select is 0x%x)\n",
78*4882a593Smuzhiyun clk_hw_get_name(&common->hw), reg, cf->select);
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun return (reg & cf->select) ? cf->rates[1] : cf->rates[0];
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun
ccu_frac_helper_set_rate(struct ccu_common * common,struct ccu_frac_internal * cf,unsigned long rate,u32 lock)83*4882a593Smuzhiyun int ccu_frac_helper_set_rate(struct ccu_common *common,
84*4882a593Smuzhiyun struct ccu_frac_internal *cf,
85*4882a593Smuzhiyun unsigned long rate, u32 lock)
86*4882a593Smuzhiyun {
87*4882a593Smuzhiyun unsigned long flags;
88*4882a593Smuzhiyun u32 reg, sel;
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun if (!(common->features & CCU_FEATURE_FRACTIONAL))
91*4882a593Smuzhiyun return -EINVAL;
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun if (cf->rates[0] == rate)
94*4882a593Smuzhiyun sel = 0;
95*4882a593Smuzhiyun else if (cf->rates[1] == rate)
96*4882a593Smuzhiyun sel = cf->select;
97*4882a593Smuzhiyun else
98*4882a593Smuzhiyun return -EINVAL;
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun spin_lock_irqsave(common->lock, flags);
101*4882a593Smuzhiyun reg = readl(common->base + common->reg);
102*4882a593Smuzhiyun reg &= ~cf->select;
103*4882a593Smuzhiyun writel(reg | sel, common->base + common->reg);
104*4882a593Smuzhiyun spin_unlock_irqrestore(common->lock, flags);
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun ccu_helper_wait_for_lock(common, lock);
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun return 0;
109*4882a593Smuzhiyun }
110