1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright 2016 Icenowy Zheng <icenowy@aosc.io> 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun #ifndef _CCU_SUN8I_DE2_H_ 7*4882a593Smuzhiyun #define _CCU_SUN8I_DE2_H_ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #include <dt-bindings/clock/sun8i-de2.h> 10*4882a593Smuzhiyun #include <dt-bindings/reset/sun8i-de2.h> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun /* Intermediary clock dividers are not exported */ 13*4882a593Smuzhiyun #define CLK_MIXER0_DIV 3 14*4882a593Smuzhiyun #define CLK_MIXER1_DIV 4 15*4882a593Smuzhiyun #define CLK_WB_DIV 5 16*4882a593Smuzhiyun #define CLK_ROT_DIV 11 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun #define CLK_NUMBER_WITH_ROT (CLK_ROT_DIV + 1) 19*4882a593Smuzhiyun #define CLK_NUMBER_WITHOUT_ROT (CLK_WB + 1) 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun #endif /* _CCU_SUN8I_DE2_H_ */ 22