1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // Spreadtrum gate clock driver
4*4882a593Smuzhiyun //
5*4882a593Smuzhiyun // Copyright (C) 2017 Spreadtrum, Inc.
6*4882a593Smuzhiyun // Author: Chunyan Zhang <chunyan.zhang@spreadtrum.com>
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #ifndef _SPRD_GATE_H_
9*4882a593Smuzhiyun #define _SPRD_GATE_H_
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include "common.h"
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun struct sprd_gate {
14*4882a593Smuzhiyun u32 enable_mask;
15*4882a593Smuzhiyun u16 flags;
16*4882a593Smuzhiyun u16 sc_offset;
17*4882a593Smuzhiyun u16 udelay;
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun struct sprd_clk_common common;
20*4882a593Smuzhiyun };
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun /*
23*4882a593Smuzhiyun * sprd_gate->flags is used for:
24*4882a593Smuzhiyun * CLK_GATE_SET_TO_DISABLE BIT(0)
25*4882a593Smuzhiyun * CLK_GATE_HIWORD_MASK BIT(1)
26*4882a593Smuzhiyun * CLK_GATE_BIG_ENDIAN BIT(2)
27*4882a593Smuzhiyun * so we define new flags from BIT(3)
28*4882a593Smuzhiyun */
29*4882a593Smuzhiyun #define SPRD_GATE_NON_AON BIT(3) /* not alway powered on, check before read */
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun #define SPRD_SC_GATE_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, \
32*4882a593Smuzhiyun _sc_offset, _enable_mask, _flags, \
33*4882a593Smuzhiyun _gate_flags, _udelay, _ops, _fn) \
34*4882a593Smuzhiyun struct sprd_gate _struct = { \
35*4882a593Smuzhiyun .enable_mask = _enable_mask, \
36*4882a593Smuzhiyun .sc_offset = _sc_offset, \
37*4882a593Smuzhiyun .flags = _gate_flags, \
38*4882a593Smuzhiyun .udelay = _udelay, \
39*4882a593Smuzhiyun .common = { \
40*4882a593Smuzhiyun .regmap = NULL, \
41*4882a593Smuzhiyun .reg = _reg, \
42*4882a593Smuzhiyun .hw.init = _fn(_name, _parent, \
43*4882a593Smuzhiyun _ops, _flags), \
44*4882a593Smuzhiyun } \
45*4882a593Smuzhiyun }
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun #define SPRD_SC_GATE_CLK_OPS_UDELAY(_struct, _name, _parent, _reg, \
48*4882a593Smuzhiyun _sc_offset, _enable_mask, _flags, \
49*4882a593Smuzhiyun _gate_flags, _udelay, _ops) \
50*4882a593Smuzhiyun SPRD_SC_GATE_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, \
51*4882a593Smuzhiyun _sc_offset, _enable_mask, _flags, \
52*4882a593Smuzhiyun _gate_flags, _udelay, _ops, CLK_HW_INIT)
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun #define SPRD_SC_GATE_CLK_OPS(_struct, _name, _parent, _reg, _sc_offset, \
55*4882a593Smuzhiyun _enable_mask, _flags, _gate_flags, _ops) \
56*4882a593Smuzhiyun SPRD_SC_GATE_CLK_OPS_UDELAY(_struct, _name, _parent, _reg, \
57*4882a593Smuzhiyun _sc_offset, _enable_mask, _flags, \
58*4882a593Smuzhiyun _gate_flags, 0, _ops)
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun #define SPRD_SC_GATE_CLK(_struct, _name, _parent, _reg, _sc_offset, \
61*4882a593Smuzhiyun _enable_mask, _flags, _gate_flags) \
62*4882a593Smuzhiyun SPRD_SC_GATE_CLK_OPS(_struct, _name, _parent, _reg, _sc_offset, \
63*4882a593Smuzhiyun _enable_mask, _flags, _gate_flags, \
64*4882a593Smuzhiyun &sprd_sc_gate_ops)
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun #define SPRD_GATE_CLK(_struct, _name, _parent, _reg, \
67*4882a593Smuzhiyun _enable_mask, _flags, _gate_flags) \
68*4882a593Smuzhiyun SPRD_SC_GATE_CLK_OPS(_struct, _name, _parent, _reg, 0, \
69*4882a593Smuzhiyun _enable_mask, _flags, _gate_flags, \
70*4882a593Smuzhiyun &sprd_gate_ops)
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun #define SPRD_PLL_SC_GATE_CLK(_struct, _name, _parent, _reg, _sc_offset, \
73*4882a593Smuzhiyun _enable_mask, _flags, _gate_flags, \
74*4882a593Smuzhiyun _udelay) \
75*4882a593Smuzhiyun SPRD_SC_GATE_CLK_OPS_UDELAY(_struct, _name, _parent, _reg, \
76*4882a593Smuzhiyun _sc_offset, _enable_mask, _flags, \
77*4882a593Smuzhiyun _gate_flags, _udelay, \
78*4882a593Smuzhiyun &sprd_pll_sc_gate_ops)
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun #define SPRD_SC_GATE_CLK_HW_OPS_UDELAY(_struct, _name, _parent, _reg, \
82*4882a593Smuzhiyun _sc_offset, _enable_mask, \
83*4882a593Smuzhiyun _flags, _gate_flags, \
84*4882a593Smuzhiyun _udelay, _ops) \
85*4882a593Smuzhiyun SPRD_SC_GATE_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, \
86*4882a593Smuzhiyun _sc_offset, _enable_mask, _flags, \
87*4882a593Smuzhiyun _gate_flags, _udelay, _ops, \
88*4882a593Smuzhiyun CLK_HW_INIT_HW)
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun #define SPRD_SC_GATE_CLK_HW_OPS(_struct, _name, _parent, _reg, \
91*4882a593Smuzhiyun _sc_offset, _enable_mask, _flags, \
92*4882a593Smuzhiyun _gate_flags, _ops) \
93*4882a593Smuzhiyun SPRD_SC_GATE_CLK_HW_OPS_UDELAY(_struct, _name, _parent, _reg, \
94*4882a593Smuzhiyun _sc_offset, _enable_mask, \
95*4882a593Smuzhiyun _flags, _gate_flags, 0, _ops)
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun #define SPRD_SC_GATE_CLK_HW(_struct, _name, _parent, _reg, \
98*4882a593Smuzhiyun _sc_offset, _enable_mask, _flags, \
99*4882a593Smuzhiyun _gate_flags) \
100*4882a593Smuzhiyun SPRD_SC_GATE_CLK_HW_OPS(_struct, _name, _parent, _reg, \
101*4882a593Smuzhiyun _sc_offset, _enable_mask, _flags, \
102*4882a593Smuzhiyun _gate_flags, &sprd_sc_gate_ops)
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun #define SPRD_GATE_CLK_HW(_struct, _name, _parent, _reg, \
105*4882a593Smuzhiyun _enable_mask, _flags, _gate_flags) \
106*4882a593Smuzhiyun SPRD_SC_GATE_CLK_HW_OPS(_struct, _name, _parent, _reg, 0, \
107*4882a593Smuzhiyun _enable_mask, _flags, _gate_flags, \
108*4882a593Smuzhiyun &sprd_gate_ops)
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun #define SPRD_PLL_SC_GATE_CLK_HW(_struct, _name, _parent, _reg, \
111*4882a593Smuzhiyun _sc_offset, _enable_mask, _flags, \
112*4882a593Smuzhiyun _gate_flags, _udelay) \
113*4882a593Smuzhiyun SPRD_SC_GATE_CLK_HW_OPS_UDELAY(_struct, _name, _parent, _reg, \
114*4882a593Smuzhiyun _sc_offset, _enable_mask, \
115*4882a593Smuzhiyun _flags, _gate_flags, _udelay, \
116*4882a593Smuzhiyun &sprd_pll_sc_gate_ops)
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun #define SPRD_SC_GATE_CLK_FW_NAME_OPS_UDELAY(_struct, _name, _parent, \
119*4882a593Smuzhiyun _reg, _sc_offset, \
120*4882a593Smuzhiyun _enable_mask, _flags, \
121*4882a593Smuzhiyun _gate_flags, _udelay, _ops) \
122*4882a593Smuzhiyun SPRD_SC_GATE_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, \
123*4882a593Smuzhiyun _sc_offset, _enable_mask, _flags, \
124*4882a593Smuzhiyun _gate_flags, _udelay, _ops, \
125*4882a593Smuzhiyun CLK_HW_INIT_FW_NAME)
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun #define SPRD_SC_GATE_CLK_FW_NAME_OPS(_struct, _name, _parent, _reg, \
128*4882a593Smuzhiyun _sc_offset, _enable_mask, _flags, \
129*4882a593Smuzhiyun _gate_flags, _ops) \
130*4882a593Smuzhiyun SPRD_SC_GATE_CLK_FW_NAME_OPS_UDELAY(_struct, _name, _parent, \
131*4882a593Smuzhiyun _reg, _sc_offset, \
132*4882a593Smuzhiyun _enable_mask, _flags, \
133*4882a593Smuzhiyun _gate_flags, 0, _ops)
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun #define SPRD_SC_GATE_CLK_FW_NAME(_struct, _name, _parent, _reg, \
136*4882a593Smuzhiyun _sc_offset, _enable_mask, _flags, \
137*4882a593Smuzhiyun _gate_flags) \
138*4882a593Smuzhiyun SPRD_SC_GATE_CLK_FW_NAME_OPS(_struct, _name, _parent, _reg, \
139*4882a593Smuzhiyun _sc_offset, _enable_mask, _flags, \
140*4882a593Smuzhiyun _gate_flags, &sprd_sc_gate_ops)
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun #define SPRD_GATE_CLK_FW_NAME(_struct, _name, _parent, _reg, \
143*4882a593Smuzhiyun _enable_mask, _flags, _gate_flags) \
144*4882a593Smuzhiyun SPRD_SC_GATE_CLK_FW_NAME_OPS(_struct, _name, _parent, _reg, 0, \
145*4882a593Smuzhiyun _enable_mask, _flags, _gate_flags, \
146*4882a593Smuzhiyun &sprd_gate_ops)
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun #define SPRD_PLL_SC_GATE_CLK_FW_NAME(_struct, _name, _parent, _reg, \
149*4882a593Smuzhiyun _sc_offset, _enable_mask, _flags, \
150*4882a593Smuzhiyun _gate_flags, _udelay) \
151*4882a593Smuzhiyun SPRD_SC_GATE_CLK_FW_NAME_OPS_UDELAY(_struct, _name, _parent, \
152*4882a593Smuzhiyun _reg, _sc_offset, \
153*4882a593Smuzhiyun _enable_mask, _flags, \
154*4882a593Smuzhiyun _gate_flags, _udelay, \
155*4882a593Smuzhiyun &sprd_pll_sc_gate_ops)
156*4882a593Smuzhiyun
hw_to_sprd_gate(const struct clk_hw * hw)157*4882a593Smuzhiyun static inline struct sprd_gate *hw_to_sprd_gate(const struct clk_hw *hw)
158*4882a593Smuzhiyun {
159*4882a593Smuzhiyun struct sprd_clk_common *common = hw_to_sprd_clk_common(hw);
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun return container_of(common, struct sprd_gate, common);
162*4882a593Smuzhiyun }
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun extern const struct clk_ops sprd_gate_ops;
165*4882a593Smuzhiyun extern const struct clk_ops sprd_sc_gate_ops;
166*4882a593Smuzhiyun extern const struct clk_ops sprd_pll_sc_gate_ops;
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun #endif /* _SPRD_GATE_H_ */
169