1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // Spreadtrum composite clock driver
4*4882a593Smuzhiyun //
5*4882a593Smuzhiyun // Copyright (C) 2017 Spreadtrum, Inc.
6*4882a593Smuzhiyun // Author: Chunyan Zhang <chunyan.zhang@spreadtrum.com>
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #ifndef _SPRD_COMPOSITE_H_
9*4882a593Smuzhiyun #define _SPRD_COMPOSITE_H_
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include "common.h"
12*4882a593Smuzhiyun #include "mux.h"
13*4882a593Smuzhiyun #include "div.h"
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun struct sprd_comp {
16*4882a593Smuzhiyun struct sprd_mux_ssel mux;
17*4882a593Smuzhiyun struct sprd_div_internal div;
18*4882a593Smuzhiyun struct sprd_clk_common common;
19*4882a593Smuzhiyun };
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #define SPRD_COMP_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, _table, \
22*4882a593Smuzhiyun _mshift, _mwidth, _dshift, _dwidth, \
23*4882a593Smuzhiyun _flags, _fn) \
24*4882a593Smuzhiyun struct sprd_comp _struct = { \
25*4882a593Smuzhiyun .mux = _SPRD_MUX_CLK(_mshift, _mwidth, _table), \
26*4882a593Smuzhiyun .div = _SPRD_DIV_CLK(_dshift, _dwidth), \
27*4882a593Smuzhiyun .common = { \
28*4882a593Smuzhiyun .regmap = NULL, \
29*4882a593Smuzhiyun .reg = _reg, \
30*4882a593Smuzhiyun .hw.init = _fn(_name, _parent, \
31*4882a593Smuzhiyun &sprd_comp_ops, _flags), \
32*4882a593Smuzhiyun } \
33*4882a593Smuzhiyun }
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun #define SPRD_COMP_CLK_TABLE(_struct, _name, _parent, _reg, _table, \
36*4882a593Smuzhiyun _mshift, _mwidth, _dshift, _dwidth, _flags) \
37*4882a593Smuzhiyun SPRD_COMP_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, _table, \
38*4882a593Smuzhiyun _mshift, _mwidth, _dshift, _dwidth, \
39*4882a593Smuzhiyun _flags, CLK_HW_INIT_PARENTS)
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun #define SPRD_COMP_CLK(_struct, _name, _parent, _reg, _mshift, \
42*4882a593Smuzhiyun _mwidth, _dshift, _dwidth, _flags) \
43*4882a593Smuzhiyun SPRD_COMP_CLK_TABLE(_struct, _name, _parent, _reg, NULL, \
44*4882a593Smuzhiyun _mshift, _mwidth, _dshift, _dwidth, _flags)
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun #define SPRD_COMP_CLK_DATA_TABLE(_struct, _name, _parent, _reg, _table, \
47*4882a593Smuzhiyun _mshift, _mwidth, _dshift, \
48*4882a593Smuzhiyun _dwidth, _flags) \
49*4882a593Smuzhiyun SPRD_COMP_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, _table, \
50*4882a593Smuzhiyun _mshift, _mwidth, _dshift, _dwidth, \
51*4882a593Smuzhiyun _flags, CLK_HW_INIT_PARENTS_DATA)
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun #define SPRD_COMP_CLK_DATA(_struct, _name, _parent, _reg, _mshift, \
54*4882a593Smuzhiyun _mwidth, _dshift, _dwidth, _flags) \
55*4882a593Smuzhiyun SPRD_COMP_CLK_DATA_TABLE(_struct, _name, _parent, _reg, NULL, \
56*4882a593Smuzhiyun _mshift, _mwidth, _dshift, _dwidth, \
57*4882a593Smuzhiyun _flags)
58*4882a593Smuzhiyun
hw_to_sprd_comp(const struct clk_hw * hw)59*4882a593Smuzhiyun static inline struct sprd_comp *hw_to_sprd_comp(const struct clk_hw *hw)
60*4882a593Smuzhiyun {
61*4882a593Smuzhiyun struct sprd_clk_common *common = hw_to_sprd_clk_common(hw);
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun return container_of(common, struct sprd_comp, common);
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun extern const struct clk_ops sprd_comp_ops;
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun #endif /* _SPRD_COMPOSITE_H_ */
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