1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (C) 2012 ST Microelectronics
3*4882a593Smuzhiyun * Viresh Kumar <vireshk@kernel.org>
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * This file is licensed under the terms of the GNU General Public
6*4882a593Smuzhiyun * License version 2. This program is licensed "as is" without any
7*4882a593Smuzhiyun * warranty of any kind, whether express or implied.
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * Fractional Synthesizer clock implementation
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #define pr_fmt(fmt) "clk-frac-synth: " fmt
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #include <linux/clk-provider.h>
15*4882a593Smuzhiyun #include <linux/slab.h>
16*4882a593Smuzhiyun #include <linux/io.h>
17*4882a593Smuzhiyun #include <linux/err.h>
18*4882a593Smuzhiyun #include "clk.h"
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #define DIV_FACTOR_MASK 0x1FFFF
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun /*
23*4882a593Smuzhiyun * DOC: Fractional Synthesizer clock
24*4882a593Smuzhiyun *
25*4882a593Smuzhiyun * Fout from synthesizer can be given from below equation:
26*4882a593Smuzhiyun *
27*4882a593Smuzhiyun * Fout= Fin/2*div (division factor)
28*4882a593Smuzhiyun * div is 17 bits:-
29*4882a593Smuzhiyun * 0-13 (fractional part)
30*4882a593Smuzhiyun * 14-16 (integer part)
31*4882a593Smuzhiyun * div is (16-14 bits).(13-0 bits) (in binary)
32*4882a593Smuzhiyun *
33*4882a593Smuzhiyun * Fout = Fin/(2 * div)
34*4882a593Smuzhiyun * Fout = ((Fin / 10000)/(2 * div)) * 10000
35*4882a593Smuzhiyun * Fout = (2^14 * (Fin / 10000)/(2^14 * (2 * div))) * 10000
36*4882a593Smuzhiyun * Fout = (((Fin / 10000) << 14)/(2 * (div << 14))) * 10000
37*4882a593Smuzhiyun *
38*4882a593Smuzhiyun * div << 14 simply 17 bit value written at register.
39*4882a593Smuzhiyun * Max error due to scaling down by 10000 is 10 KHz
40*4882a593Smuzhiyun */
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun #define to_clk_frac(_hw) container_of(_hw, struct clk_frac, hw)
43*4882a593Smuzhiyun
frac_calc_rate(struct clk_hw * hw,unsigned long prate,int index)44*4882a593Smuzhiyun static unsigned long frac_calc_rate(struct clk_hw *hw, unsigned long prate,
45*4882a593Smuzhiyun int index)
46*4882a593Smuzhiyun {
47*4882a593Smuzhiyun struct clk_frac *frac = to_clk_frac(hw);
48*4882a593Smuzhiyun struct frac_rate_tbl *rtbl = frac->rtbl;
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun prate /= 10000;
51*4882a593Smuzhiyun prate <<= 14;
52*4882a593Smuzhiyun prate /= (2 * rtbl[index].div);
53*4882a593Smuzhiyun prate *= 10000;
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun return prate;
56*4882a593Smuzhiyun }
57*4882a593Smuzhiyun
clk_frac_round_rate(struct clk_hw * hw,unsigned long drate,unsigned long * prate)58*4882a593Smuzhiyun static long clk_frac_round_rate(struct clk_hw *hw, unsigned long drate,
59*4882a593Smuzhiyun unsigned long *prate)
60*4882a593Smuzhiyun {
61*4882a593Smuzhiyun struct clk_frac *frac = to_clk_frac(hw);
62*4882a593Smuzhiyun int unused;
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun return clk_round_rate_index(hw, drate, *prate, frac_calc_rate,
65*4882a593Smuzhiyun frac->rtbl_cnt, &unused);
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun
clk_frac_recalc_rate(struct clk_hw * hw,unsigned long parent_rate)68*4882a593Smuzhiyun static unsigned long clk_frac_recalc_rate(struct clk_hw *hw,
69*4882a593Smuzhiyun unsigned long parent_rate)
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun struct clk_frac *frac = to_clk_frac(hw);
72*4882a593Smuzhiyun unsigned long flags = 0;
73*4882a593Smuzhiyun unsigned int div = 1, val;
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun if (frac->lock)
76*4882a593Smuzhiyun spin_lock_irqsave(frac->lock, flags);
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun val = readl_relaxed(frac->reg);
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun if (frac->lock)
81*4882a593Smuzhiyun spin_unlock_irqrestore(frac->lock, flags);
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun div = val & DIV_FACTOR_MASK;
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun if (!div)
86*4882a593Smuzhiyun return 0;
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun parent_rate = parent_rate / 10000;
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun parent_rate = (parent_rate << 14) / (2 * div);
91*4882a593Smuzhiyun return parent_rate * 10000;
92*4882a593Smuzhiyun }
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun /* Configures new clock rate of frac */
clk_frac_set_rate(struct clk_hw * hw,unsigned long drate,unsigned long prate)95*4882a593Smuzhiyun static int clk_frac_set_rate(struct clk_hw *hw, unsigned long drate,
96*4882a593Smuzhiyun unsigned long prate)
97*4882a593Smuzhiyun {
98*4882a593Smuzhiyun struct clk_frac *frac = to_clk_frac(hw);
99*4882a593Smuzhiyun struct frac_rate_tbl *rtbl = frac->rtbl;
100*4882a593Smuzhiyun unsigned long flags = 0, val;
101*4882a593Smuzhiyun int i;
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun clk_round_rate_index(hw, drate, prate, frac_calc_rate, frac->rtbl_cnt,
104*4882a593Smuzhiyun &i);
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun if (frac->lock)
107*4882a593Smuzhiyun spin_lock_irqsave(frac->lock, flags);
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun val = readl_relaxed(frac->reg) & ~DIV_FACTOR_MASK;
110*4882a593Smuzhiyun val |= rtbl[i].div & DIV_FACTOR_MASK;
111*4882a593Smuzhiyun writel_relaxed(val, frac->reg);
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun if (frac->lock)
114*4882a593Smuzhiyun spin_unlock_irqrestore(frac->lock, flags);
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun return 0;
117*4882a593Smuzhiyun }
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun static const struct clk_ops clk_frac_ops = {
120*4882a593Smuzhiyun .recalc_rate = clk_frac_recalc_rate,
121*4882a593Smuzhiyun .round_rate = clk_frac_round_rate,
122*4882a593Smuzhiyun .set_rate = clk_frac_set_rate,
123*4882a593Smuzhiyun };
124*4882a593Smuzhiyun
clk_register_frac(const char * name,const char * parent_name,unsigned long flags,void __iomem * reg,struct frac_rate_tbl * rtbl,u8 rtbl_cnt,spinlock_t * lock)125*4882a593Smuzhiyun struct clk *clk_register_frac(const char *name, const char *parent_name,
126*4882a593Smuzhiyun unsigned long flags, void __iomem *reg,
127*4882a593Smuzhiyun struct frac_rate_tbl *rtbl, u8 rtbl_cnt, spinlock_t *lock)
128*4882a593Smuzhiyun {
129*4882a593Smuzhiyun struct clk_init_data init;
130*4882a593Smuzhiyun struct clk_frac *frac;
131*4882a593Smuzhiyun struct clk *clk;
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun if (!name || !parent_name || !reg || !rtbl || !rtbl_cnt) {
134*4882a593Smuzhiyun pr_err("Invalid arguments passed\n");
135*4882a593Smuzhiyun return ERR_PTR(-EINVAL);
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun frac = kzalloc(sizeof(*frac), GFP_KERNEL);
139*4882a593Smuzhiyun if (!frac)
140*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun /* struct clk_frac assignments */
143*4882a593Smuzhiyun frac->reg = reg;
144*4882a593Smuzhiyun frac->rtbl = rtbl;
145*4882a593Smuzhiyun frac->rtbl_cnt = rtbl_cnt;
146*4882a593Smuzhiyun frac->lock = lock;
147*4882a593Smuzhiyun frac->hw.init = &init;
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun init.name = name;
150*4882a593Smuzhiyun init.ops = &clk_frac_ops;
151*4882a593Smuzhiyun init.flags = flags;
152*4882a593Smuzhiyun init.parent_names = &parent_name;
153*4882a593Smuzhiyun init.num_parents = 1;
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun clk = clk_register(NULL, &frac->hw);
156*4882a593Smuzhiyun if (!IS_ERR_OR_NULL(clk))
157*4882a593Smuzhiyun return clk;
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun pr_err("clk register failed\n");
160*4882a593Smuzhiyun kfree(frac);
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun return NULL;
163*4882a593Smuzhiyun }
164