1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (c) 2013 Samsung Electronics Co., Ltd.
4*4882a593Smuzhiyun * Copyright (c) 2013 Linaro Ltd.
5*4882a593Smuzhiyun * Author: Thomas Abraham <thomas.ab@samsung.com>
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * This file includes utility functions to register clocks to common
8*4882a593Smuzhiyun * clock framework for Samsung platforms.
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <linux/slab.h>
12*4882a593Smuzhiyun #include <linux/clkdev.h>
13*4882a593Smuzhiyun #include <linux/clk.h>
14*4882a593Smuzhiyun #include <linux/clk-provider.h>
15*4882a593Smuzhiyun #include <linux/io.h>
16*4882a593Smuzhiyun #include <linux/of_address.h>
17*4882a593Smuzhiyun #include <linux/syscore_ops.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #include "clk.h"
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun static LIST_HEAD(clock_reg_cache_list);
22*4882a593Smuzhiyun
samsung_clk_save(void __iomem * base,struct samsung_clk_reg_dump * rd,unsigned int num_regs)23*4882a593Smuzhiyun void samsung_clk_save(void __iomem *base,
24*4882a593Smuzhiyun struct samsung_clk_reg_dump *rd,
25*4882a593Smuzhiyun unsigned int num_regs)
26*4882a593Smuzhiyun {
27*4882a593Smuzhiyun for (; num_regs > 0; --num_regs, ++rd)
28*4882a593Smuzhiyun rd->value = readl(base + rd->offset);
29*4882a593Smuzhiyun }
30*4882a593Smuzhiyun
samsung_clk_restore(void __iomem * base,const struct samsung_clk_reg_dump * rd,unsigned int num_regs)31*4882a593Smuzhiyun void samsung_clk_restore(void __iomem *base,
32*4882a593Smuzhiyun const struct samsung_clk_reg_dump *rd,
33*4882a593Smuzhiyun unsigned int num_regs)
34*4882a593Smuzhiyun {
35*4882a593Smuzhiyun for (; num_regs > 0; --num_regs, ++rd)
36*4882a593Smuzhiyun writel(rd->value, base + rd->offset);
37*4882a593Smuzhiyun }
38*4882a593Smuzhiyun
samsung_clk_alloc_reg_dump(const unsigned long * rdump,unsigned long nr_rdump)39*4882a593Smuzhiyun struct samsung_clk_reg_dump *samsung_clk_alloc_reg_dump(
40*4882a593Smuzhiyun const unsigned long *rdump,
41*4882a593Smuzhiyun unsigned long nr_rdump)
42*4882a593Smuzhiyun {
43*4882a593Smuzhiyun struct samsung_clk_reg_dump *rd;
44*4882a593Smuzhiyun unsigned int i;
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun rd = kcalloc(nr_rdump, sizeof(*rd), GFP_KERNEL);
47*4882a593Smuzhiyun if (!rd)
48*4882a593Smuzhiyun return NULL;
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun for (i = 0; i < nr_rdump; ++i)
51*4882a593Smuzhiyun rd[i].offset = rdump[i];
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun return rd;
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun /* setup the essentials required to support clock lookup using ccf */
samsung_clk_init(struct device_node * np,void __iomem * base,unsigned long nr_clks)57*4882a593Smuzhiyun struct samsung_clk_provider *__init samsung_clk_init(struct device_node *np,
58*4882a593Smuzhiyun void __iomem *base, unsigned long nr_clks)
59*4882a593Smuzhiyun {
60*4882a593Smuzhiyun struct samsung_clk_provider *ctx;
61*4882a593Smuzhiyun int i;
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun ctx = kzalloc(struct_size(ctx, clk_data.hws, nr_clks), GFP_KERNEL);
64*4882a593Smuzhiyun if (!ctx)
65*4882a593Smuzhiyun panic("could not allocate clock provider context.\n");
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun for (i = 0; i < nr_clks; ++i)
68*4882a593Smuzhiyun ctx->clk_data.hws[i] = ERR_PTR(-ENOENT);
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun ctx->reg_base = base;
71*4882a593Smuzhiyun ctx->clk_data.num = nr_clks;
72*4882a593Smuzhiyun spin_lock_init(&ctx->lock);
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun return ctx;
75*4882a593Smuzhiyun }
76*4882a593Smuzhiyun
samsung_clk_of_add_provider(struct device_node * np,struct samsung_clk_provider * ctx)77*4882a593Smuzhiyun void __init samsung_clk_of_add_provider(struct device_node *np,
78*4882a593Smuzhiyun struct samsung_clk_provider *ctx)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun if (np) {
81*4882a593Smuzhiyun if (of_clk_add_hw_provider(np, of_clk_hw_onecell_get,
82*4882a593Smuzhiyun &ctx->clk_data))
83*4882a593Smuzhiyun panic("could not register clk provider\n");
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun /* add a clock instance to the clock lookup table used for dt based lookup */
samsung_clk_add_lookup(struct samsung_clk_provider * ctx,struct clk_hw * clk_hw,unsigned int id)88*4882a593Smuzhiyun void samsung_clk_add_lookup(struct samsung_clk_provider *ctx,
89*4882a593Smuzhiyun struct clk_hw *clk_hw, unsigned int id)
90*4882a593Smuzhiyun {
91*4882a593Smuzhiyun if (id)
92*4882a593Smuzhiyun ctx->clk_data.hws[id] = clk_hw;
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun /* register a list of aliases */
samsung_clk_register_alias(struct samsung_clk_provider * ctx,const struct samsung_clock_alias * list,unsigned int nr_clk)96*4882a593Smuzhiyun void __init samsung_clk_register_alias(struct samsung_clk_provider *ctx,
97*4882a593Smuzhiyun const struct samsung_clock_alias *list,
98*4882a593Smuzhiyun unsigned int nr_clk)
99*4882a593Smuzhiyun {
100*4882a593Smuzhiyun struct clk_hw *clk_hw;
101*4882a593Smuzhiyun unsigned int idx, ret;
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun for (idx = 0; idx < nr_clk; idx++, list++) {
104*4882a593Smuzhiyun if (!list->id) {
105*4882a593Smuzhiyun pr_err("%s: clock id missing for index %d\n", __func__,
106*4882a593Smuzhiyun idx);
107*4882a593Smuzhiyun continue;
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun clk_hw = ctx->clk_data.hws[list->id];
111*4882a593Smuzhiyun if (!clk_hw) {
112*4882a593Smuzhiyun pr_err("%s: failed to find clock %d\n", __func__,
113*4882a593Smuzhiyun list->id);
114*4882a593Smuzhiyun continue;
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun ret = clk_hw_register_clkdev(clk_hw, list->alias,
118*4882a593Smuzhiyun list->dev_name);
119*4882a593Smuzhiyun if (ret)
120*4882a593Smuzhiyun pr_err("%s: failed to register lookup %s\n",
121*4882a593Smuzhiyun __func__, list->alias);
122*4882a593Smuzhiyun }
123*4882a593Smuzhiyun }
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun /* register a list of fixed clocks */
samsung_clk_register_fixed_rate(struct samsung_clk_provider * ctx,const struct samsung_fixed_rate_clock * list,unsigned int nr_clk)126*4882a593Smuzhiyun void __init samsung_clk_register_fixed_rate(struct samsung_clk_provider *ctx,
127*4882a593Smuzhiyun const struct samsung_fixed_rate_clock *list,
128*4882a593Smuzhiyun unsigned int nr_clk)
129*4882a593Smuzhiyun {
130*4882a593Smuzhiyun struct clk_hw *clk_hw;
131*4882a593Smuzhiyun unsigned int idx, ret;
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun for (idx = 0; idx < nr_clk; idx++, list++) {
134*4882a593Smuzhiyun clk_hw = clk_hw_register_fixed_rate(ctx->dev, list->name,
135*4882a593Smuzhiyun list->parent_name, list->flags, list->fixed_rate);
136*4882a593Smuzhiyun if (IS_ERR(clk_hw)) {
137*4882a593Smuzhiyun pr_err("%s: failed to register clock %s\n", __func__,
138*4882a593Smuzhiyun list->name);
139*4882a593Smuzhiyun continue;
140*4882a593Smuzhiyun }
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun samsung_clk_add_lookup(ctx, clk_hw, list->id);
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun /*
145*4882a593Smuzhiyun * Unconditionally add a clock lookup for the fixed rate clocks.
146*4882a593Smuzhiyun * There are not many of these on any of Samsung platforms.
147*4882a593Smuzhiyun */
148*4882a593Smuzhiyun ret = clk_hw_register_clkdev(clk_hw, list->name, NULL);
149*4882a593Smuzhiyun if (ret)
150*4882a593Smuzhiyun pr_err("%s: failed to register clock lookup for %s",
151*4882a593Smuzhiyun __func__, list->name);
152*4882a593Smuzhiyun }
153*4882a593Smuzhiyun }
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun /* register a list of fixed factor clocks */
samsung_clk_register_fixed_factor(struct samsung_clk_provider * ctx,const struct samsung_fixed_factor_clock * list,unsigned int nr_clk)156*4882a593Smuzhiyun void __init samsung_clk_register_fixed_factor(struct samsung_clk_provider *ctx,
157*4882a593Smuzhiyun const struct samsung_fixed_factor_clock *list, unsigned int nr_clk)
158*4882a593Smuzhiyun {
159*4882a593Smuzhiyun struct clk_hw *clk_hw;
160*4882a593Smuzhiyun unsigned int idx;
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun for (idx = 0; idx < nr_clk; idx++, list++) {
163*4882a593Smuzhiyun clk_hw = clk_hw_register_fixed_factor(ctx->dev, list->name,
164*4882a593Smuzhiyun list->parent_name, list->flags, list->mult, list->div);
165*4882a593Smuzhiyun if (IS_ERR(clk_hw)) {
166*4882a593Smuzhiyun pr_err("%s: failed to register clock %s\n", __func__,
167*4882a593Smuzhiyun list->name);
168*4882a593Smuzhiyun continue;
169*4882a593Smuzhiyun }
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun samsung_clk_add_lookup(ctx, clk_hw, list->id);
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun }
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun /* register a list of mux clocks */
samsung_clk_register_mux(struct samsung_clk_provider * ctx,const struct samsung_mux_clock * list,unsigned int nr_clk)176*4882a593Smuzhiyun void __init samsung_clk_register_mux(struct samsung_clk_provider *ctx,
177*4882a593Smuzhiyun const struct samsung_mux_clock *list,
178*4882a593Smuzhiyun unsigned int nr_clk)
179*4882a593Smuzhiyun {
180*4882a593Smuzhiyun struct clk_hw *clk_hw;
181*4882a593Smuzhiyun unsigned int idx;
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun for (idx = 0; idx < nr_clk; idx++, list++) {
184*4882a593Smuzhiyun clk_hw = clk_hw_register_mux(ctx->dev, list->name,
185*4882a593Smuzhiyun list->parent_names, list->num_parents, list->flags,
186*4882a593Smuzhiyun ctx->reg_base + list->offset,
187*4882a593Smuzhiyun list->shift, list->width, list->mux_flags, &ctx->lock);
188*4882a593Smuzhiyun if (IS_ERR(clk_hw)) {
189*4882a593Smuzhiyun pr_err("%s: failed to register clock %s\n", __func__,
190*4882a593Smuzhiyun list->name);
191*4882a593Smuzhiyun continue;
192*4882a593Smuzhiyun }
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun samsung_clk_add_lookup(ctx, clk_hw, list->id);
195*4882a593Smuzhiyun }
196*4882a593Smuzhiyun }
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun /* register a list of div clocks */
samsung_clk_register_div(struct samsung_clk_provider * ctx,const struct samsung_div_clock * list,unsigned int nr_clk)199*4882a593Smuzhiyun void __init samsung_clk_register_div(struct samsung_clk_provider *ctx,
200*4882a593Smuzhiyun const struct samsung_div_clock *list,
201*4882a593Smuzhiyun unsigned int nr_clk)
202*4882a593Smuzhiyun {
203*4882a593Smuzhiyun struct clk_hw *clk_hw;
204*4882a593Smuzhiyun unsigned int idx;
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun for (idx = 0; idx < nr_clk; idx++, list++) {
207*4882a593Smuzhiyun if (list->table)
208*4882a593Smuzhiyun clk_hw = clk_hw_register_divider_table(ctx->dev,
209*4882a593Smuzhiyun list->name, list->parent_name, list->flags,
210*4882a593Smuzhiyun ctx->reg_base + list->offset,
211*4882a593Smuzhiyun list->shift, list->width, list->div_flags,
212*4882a593Smuzhiyun list->table, &ctx->lock);
213*4882a593Smuzhiyun else
214*4882a593Smuzhiyun clk_hw = clk_hw_register_divider(ctx->dev, list->name,
215*4882a593Smuzhiyun list->parent_name, list->flags,
216*4882a593Smuzhiyun ctx->reg_base + list->offset, list->shift,
217*4882a593Smuzhiyun list->width, list->div_flags, &ctx->lock);
218*4882a593Smuzhiyun if (IS_ERR(clk_hw)) {
219*4882a593Smuzhiyun pr_err("%s: failed to register clock %s\n", __func__,
220*4882a593Smuzhiyun list->name);
221*4882a593Smuzhiyun continue;
222*4882a593Smuzhiyun }
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun samsung_clk_add_lookup(ctx, clk_hw, list->id);
225*4882a593Smuzhiyun }
226*4882a593Smuzhiyun }
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun /* register a list of gate clocks */
samsung_clk_register_gate(struct samsung_clk_provider * ctx,const struct samsung_gate_clock * list,unsigned int nr_clk)229*4882a593Smuzhiyun void __init samsung_clk_register_gate(struct samsung_clk_provider *ctx,
230*4882a593Smuzhiyun const struct samsung_gate_clock *list,
231*4882a593Smuzhiyun unsigned int nr_clk)
232*4882a593Smuzhiyun {
233*4882a593Smuzhiyun struct clk_hw *clk_hw;
234*4882a593Smuzhiyun unsigned int idx;
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun for (idx = 0; idx < nr_clk; idx++, list++) {
237*4882a593Smuzhiyun clk_hw = clk_hw_register_gate(ctx->dev, list->name, list->parent_name,
238*4882a593Smuzhiyun list->flags, ctx->reg_base + list->offset,
239*4882a593Smuzhiyun list->bit_idx, list->gate_flags, &ctx->lock);
240*4882a593Smuzhiyun if (IS_ERR(clk_hw)) {
241*4882a593Smuzhiyun pr_err("%s: failed to register clock %s\n", __func__,
242*4882a593Smuzhiyun list->name);
243*4882a593Smuzhiyun continue;
244*4882a593Smuzhiyun }
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun samsung_clk_add_lookup(ctx, clk_hw, list->id);
247*4882a593Smuzhiyun }
248*4882a593Smuzhiyun }
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun /*
251*4882a593Smuzhiyun * obtain the clock speed of all external fixed clock sources from device
252*4882a593Smuzhiyun * tree and register it
253*4882a593Smuzhiyun */
samsung_clk_of_register_fixed_ext(struct samsung_clk_provider * ctx,struct samsung_fixed_rate_clock * fixed_rate_clk,unsigned int nr_fixed_rate_clk,const struct of_device_id * clk_matches)254*4882a593Smuzhiyun void __init samsung_clk_of_register_fixed_ext(struct samsung_clk_provider *ctx,
255*4882a593Smuzhiyun struct samsung_fixed_rate_clock *fixed_rate_clk,
256*4882a593Smuzhiyun unsigned int nr_fixed_rate_clk,
257*4882a593Smuzhiyun const struct of_device_id *clk_matches)
258*4882a593Smuzhiyun {
259*4882a593Smuzhiyun const struct of_device_id *match;
260*4882a593Smuzhiyun struct device_node *clk_np;
261*4882a593Smuzhiyun u32 freq;
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun for_each_matching_node_and_match(clk_np, clk_matches, &match) {
264*4882a593Smuzhiyun if (of_property_read_u32(clk_np, "clock-frequency", &freq))
265*4882a593Smuzhiyun continue;
266*4882a593Smuzhiyun fixed_rate_clk[(unsigned long)match->data].fixed_rate = freq;
267*4882a593Smuzhiyun }
268*4882a593Smuzhiyun samsung_clk_register_fixed_rate(ctx, fixed_rate_clk, nr_fixed_rate_clk);
269*4882a593Smuzhiyun }
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun /* utility function to get the rate of a specified clock */
_get_rate(const char * clk_name)272*4882a593Smuzhiyun unsigned long _get_rate(const char *clk_name)
273*4882a593Smuzhiyun {
274*4882a593Smuzhiyun struct clk *clk;
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun clk = __clk_lookup(clk_name);
277*4882a593Smuzhiyun if (!clk) {
278*4882a593Smuzhiyun pr_err("%s: could not find clock %s\n", __func__, clk_name);
279*4882a593Smuzhiyun return 0;
280*4882a593Smuzhiyun }
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun return clk_get_rate(clk);
283*4882a593Smuzhiyun }
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
samsung_clk_suspend(void)286*4882a593Smuzhiyun static int samsung_clk_suspend(void)
287*4882a593Smuzhiyun {
288*4882a593Smuzhiyun struct samsung_clock_reg_cache *reg_cache;
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun list_for_each_entry(reg_cache, &clock_reg_cache_list, node) {
291*4882a593Smuzhiyun samsung_clk_save(reg_cache->reg_base, reg_cache->rdump,
292*4882a593Smuzhiyun reg_cache->rd_num);
293*4882a593Smuzhiyun samsung_clk_restore(reg_cache->reg_base, reg_cache->rsuspend,
294*4882a593Smuzhiyun reg_cache->rsuspend_num);
295*4882a593Smuzhiyun }
296*4882a593Smuzhiyun return 0;
297*4882a593Smuzhiyun }
298*4882a593Smuzhiyun
samsung_clk_resume(void)299*4882a593Smuzhiyun static void samsung_clk_resume(void)
300*4882a593Smuzhiyun {
301*4882a593Smuzhiyun struct samsung_clock_reg_cache *reg_cache;
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun list_for_each_entry(reg_cache, &clock_reg_cache_list, node)
304*4882a593Smuzhiyun samsung_clk_restore(reg_cache->reg_base, reg_cache->rdump,
305*4882a593Smuzhiyun reg_cache->rd_num);
306*4882a593Smuzhiyun }
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun static struct syscore_ops samsung_clk_syscore_ops = {
309*4882a593Smuzhiyun .suspend = samsung_clk_suspend,
310*4882a593Smuzhiyun .resume = samsung_clk_resume,
311*4882a593Smuzhiyun };
312*4882a593Smuzhiyun
samsung_clk_extended_sleep_init(void __iomem * reg_base,const unsigned long * rdump,unsigned long nr_rdump,const struct samsung_clk_reg_dump * rsuspend,unsigned long nr_rsuspend)313*4882a593Smuzhiyun void samsung_clk_extended_sleep_init(void __iomem *reg_base,
314*4882a593Smuzhiyun const unsigned long *rdump,
315*4882a593Smuzhiyun unsigned long nr_rdump,
316*4882a593Smuzhiyun const struct samsung_clk_reg_dump *rsuspend,
317*4882a593Smuzhiyun unsigned long nr_rsuspend)
318*4882a593Smuzhiyun {
319*4882a593Smuzhiyun struct samsung_clock_reg_cache *reg_cache;
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun reg_cache = kzalloc(sizeof(struct samsung_clock_reg_cache),
322*4882a593Smuzhiyun GFP_KERNEL);
323*4882a593Smuzhiyun if (!reg_cache)
324*4882a593Smuzhiyun panic("could not allocate register reg_cache.\n");
325*4882a593Smuzhiyun reg_cache->rdump = samsung_clk_alloc_reg_dump(rdump, nr_rdump);
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun if (!reg_cache->rdump)
328*4882a593Smuzhiyun panic("could not allocate register dump storage.\n");
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun if (list_empty(&clock_reg_cache_list))
331*4882a593Smuzhiyun register_syscore_ops(&samsung_clk_syscore_ops);
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun reg_cache->reg_base = reg_base;
334*4882a593Smuzhiyun reg_cache->rd_num = nr_rdump;
335*4882a593Smuzhiyun reg_cache->rsuspend = rsuspend;
336*4882a593Smuzhiyun reg_cache->rsuspend_num = nr_rsuspend;
337*4882a593Smuzhiyun list_add_tail(®_cache->node, &clock_reg_cache_list);
338*4882a593Smuzhiyun }
339*4882a593Smuzhiyun #endif
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun /*
342*4882a593Smuzhiyun * Common function which registers plls, muxes, dividers and gates
343*4882a593Smuzhiyun * for each CMU. It also add CMU register list to register cache.
344*4882a593Smuzhiyun */
samsung_cmu_register_one(struct device_node * np,const struct samsung_cmu_info * cmu)345*4882a593Smuzhiyun struct samsung_clk_provider * __init samsung_cmu_register_one(
346*4882a593Smuzhiyun struct device_node *np,
347*4882a593Smuzhiyun const struct samsung_cmu_info *cmu)
348*4882a593Smuzhiyun {
349*4882a593Smuzhiyun void __iomem *reg_base;
350*4882a593Smuzhiyun struct samsung_clk_provider *ctx;
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun reg_base = of_iomap(np, 0);
353*4882a593Smuzhiyun if (!reg_base) {
354*4882a593Smuzhiyun panic("%s: failed to map registers\n", __func__);
355*4882a593Smuzhiyun return NULL;
356*4882a593Smuzhiyun }
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun ctx = samsung_clk_init(np, reg_base, cmu->nr_clk_ids);
359*4882a593Smuzhiyun
360*4882a593Smuzhiyun if (cmu->pll_clks)
361*4882a593Smuzhiyun samsung_clk_register_pll(ctx, cmu->pll_clks, cmu->nr_pll_clks,
362*4882a593Smuzhiyun reg_base);
363*4882a593Smuzhiyun if (cmu->mux_clks)
364*4882a593Smuzhiyun samsung_clk_register_mux(ctx, cmu->mux_clks,
365*4882a593Smuzhiyun cmu->nr_mux_clks);
366*4882a593Smuzhiyun if (cmu->div_clks)
367*4882a593Smuzhiyun samsung_clk_register_div(ctx, cmu->div_clks, cmu->nr_div_clks);
368*4882a593Smuzhiyun if (cmu->gate_clks)
369*4882a593Smuzhiyun samsung_clk_register_gate(ctx, cmu->gate_clks,
370*4882a593Smuzhiyun cmu->nr_gate_clks);
371*4882a593Smuzhiyun if (cmu->fixed_clks)
372*4882a593Smuzhiyun samsung_clk_register_fixed_rate(ctx, cmu->fixed_clks,
373*4882a593Smuzhiyun cmu->nr_fixed_clks);
374*4882a593Smuzhiyun if (cmu->fixed_factor_clks)
375*4882a593Smuzhiyun samsung_clk_register_fixed_factor(ctx, cmu->fixed_factor_clks,
376*4882a593Smuzhiyun cmu->nr_fixed_factor_clks);
377*4882a593Smuzhiyun if (cmu->clk_regs)
378*4882a593Smuzhiyun samsung_clk_extended_sleep_init(reg_base,
379*4882a593Smuzhiyun cmu->clk_regs, cmu->nr_clk_regs,
380*4882a593Smuzhiyun cmu->suspend_regs, cmu->nr_suspend_regs);
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun samsung_clk_of_add_provider(np, ctx);
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun return ctx;
385*4882a593Smuzhiyun }
386