xref: /OK3568_Linux_fs/kernel/drivers/clk/rockchip/regmap/clk-regmap-divider.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1 /*
2  * Copyright (c) 2017 Rockchip Electronics Co. Ltd.
3  *
4  * Base on code in drivers/clk/clk-divider.c.
5  * See clk-divider.c for further copyright information.
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  */
17 
18 #include "clk-regmap.h"
19 
20 #define div_mask(width)	((1 << (width)) - 1)
21 
22 #define to_clk_regmap_divider(_hw)	\
23 		container_of(_hw, struct clk_regmap_divider, hw)
24 
25 static unsigned long
clk_regmap_divider_recalc_rate(struct clk_hw * hw,unsigned long parent_rate)26 clk_regmap_divider_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)
27 {
28 	struct clk_regmap_divider *divider = to_clk_regmap_divider(hw);
29 	unsigned int val, div;
30 
31 	regmap_read(divider->regmap, divider->reg, &val);
32 
33 	div = val >> divider->shift;
34 	div &= div_mask(divider->width);
35 
36 	return divider_recalc_rate(hw, parent_rate, div, NULL,
37 				   CLK_DIVIDER_ROUND_CLOSEST, divider->width);
38 }
39 
40 static long
clk_regmap_divider_round_rate(struct clk_hw * hw,unsigned long rate,unsigned long * prate)41 clk_regmap_divider_round_rate(struct clk_hw *hw, unsigned long rate,
42 			      unsigned long *prate)
43 {
44 	struct clk_regmap_divider *divider = to_clk_regmap_divider(hw);
45 
46 	return divider_round_rate(hw, rate, prate, NULL, divider->width,
47 				  CLK_DIVIDER_ROUND_CLOSEST);
48 }
49 
div_round_closest(unsigned long parent_rate,unsigned long rate)50 static int div_round_closest(unsigned long parent_rate, unsigned long rate)
51 {
52 	int up, down;
53 	unsigned long up_rate, down_rate;
54 
55 	up = DIV_ROUND_UP_ULL((u64)parent_rate, rate);
56 	down = parent_rate / rate;
57 
58 	up_rate = DIV_ROUND_UP_ULL((u64)parent_rate, up);
59 	down_rate = DIV_ROUND_UP_ULL((u64)parent_rate, down);
60 
61 	return (rate - up_rate) <= (down_rate - rate) ? up : down;
62 }
63 
64 static int
clk_regmap_divider_set_rate(struct clk_hw * hw,unsigned long rate,unsigned long parent_rate)65 clk_regmap_divider_set_rate(struct clk_hw *hw, unsigned long rate,
66 			    unsigned long parent_rate)
67 {
68 	struct clk_regmap_divider *divider = to_clk_regmap_divider(hw);
69 	u32 val, div;
70 
71 	div = div_round_closest(parent_rate, rate);
72 
73 	dev_dbg(divider->dev, "%s: parent_rate=%ld, div=%d, rate=%ld\n",
74 		clk_hw_get_name(hw), parent_rate, div, rate);
75 
76 	val = div_mask(divider->width) << (divider->shift + 16);
77 	val |= (div - 1) << divider->shift;
78 
79 	return regmap_write(divider->regmap, divider->reg, val);
80 }
81 
82 const struct clk_ops clk_regmap_divider_ops = {
83 	.recalc_rate = clk_regmap_divider_recalc_rate,
84 	.round_rate = clk_regmap_divider_round_rate,
85 	.set_rate = clk_regmap_divider_set_rate,
86 };
87 EXPORT_SYMBOL_GPL(clk_regmap_divider_ops);
88 
89 struct clk *
devm_clk_regmap_register_divider(struct device * dev,const char * name,const char * parent_name,struct regmap * regmap,u32 reg,u8 shift,u8 width,unsigned long flags)90 devm_clk_regmap_register_divider(struct device *dev, const char *name,
91 				 const char *parent_name, struct regmap *regmap,
92 				 u32 reg, u8 shift, u8 width,
93 				 unsigned long flags)
94 {
95 	struct clk_regmap_divider *divider;
96 	struct clk_init_data init = {};
97 
98 	divider = devm_kzalloc(dev, sizeof(*divider), GFP_KERNEL);
99 	if (!divider)
100 		return ERR_PTR(-ENOMEM);
101 
102 	init.name = name;
103 	init.ops = &clk_regmap_divider_ops;
104 	init.flags = flags;
105 	init.parent_names = (parent_name ? &parent_name : NULL);
106 	init.num_parents = (parent_name ? 1 : 0);
107 
108 	divider->dev = dev;
109 	divider->regmap = regmap;
110 	divider->reg = reg;
111 	divider->shift = shift;
112 	divider->width = width;
113 	divider->hw.init = &init;
114 
115 	return devm_clk_register(dev, &divider->hw);
116 }
117 EXPORT_SYMBOL_GPL(devm_clk_regmap_register_divider);
118