1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (c) 2013, The Linux Foundation. All rights reserved.
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun #include <linux/bitops.h>
7*4882a593Smuzhiyun #include <linux/export.h>
8*4882a593Smuzhiyun #include <linux/regmap.h>
9*4882a593Smuzhiyun #include <linux/reset-controller.h>
10*4882a593Smuzhiyun #include <linux/delay.h>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include "reset.h"
13*4882a593Smuzhiyun
qcom_reset(struct reset_controller_dev * rcdev,unsigned long id)14*4882a593Smuzhiyun static int qcom_reset(struct reset_controller_dev *rcdev, unsigned long id)
15*4882a593Smuzhiyun {
16*4882a593Smuzhiyun rcdev->ops->assert(rcdev, id);
17*4882a593Smuzhiyun udelay(1);
18*4882a593Smuzhiyun rcdev->ops->deassert(rcdev, id);
19*4882a593Smuzhiyun return 0;
20*4882a593Smuzhiyun }
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun static int
qcom_reset_assert(struct reset_controller_dev * rcdev,unsigned long id)23*4882a593Smuzhiyun qcom_reset_assert(struct reset_controller_dev *rcdev, unsigned long id)
24*4882a593Smuzhiyun {
25*4882a593Smuzhiyun struct qcom_reset_controller *rst;
26*4882a593Smuzhiyun const struct qcom_reset_map *map;
27*4882a593Smuzhiyun u32 mask;
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun rst = to_qcom_reset_controller(rcdev);
30*4882a593Smuzhiyun map = &rst->reset_map[id];
31*4882a593Smuzhiyun mask = BIT(map->bit);
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun return regmap_update_bits(rst->regmap, map->reg, mask, mask);
34*4882a593Smuzhiyun }
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun static int
qcom_reset_deassert(struct reset_controller_dev * rcdev,unsigned long id)37*4882a593Smuzhiyun qcom_reset_deassert(struct reset_controller_dev *rcdev, unsigned long id)
38*4882a593Smuzhiyun {
39*4882a593Smuzhiyun struct qcom_reset_controller *rst;
40*4882a593Smuzhiyun const struct qcom_reset_map *map;
41*4882a593Smuzhiyun u32 mask;
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun rst = to_qcom_reset_controller(rcdev);
44*4882a593Smuzhiyun map = &rst->reset_map[id];
45*4882a593Smuzhiyun mask = BIT(map->bit);
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun return regmap_update_bits(rst->regmap, map->reg, mask, 0);
48*4882a593Smuzhiyun }
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun const struct reset_control_ops qcom_reset_ops = {
51*4882a593Smuzhiyun .reset = qcom_reset,
52*4882a593Smuzhiyun .assert = qcom_reset_assert,
53*4882a593Smuzhiyun .deassert = qcom_reset_deassert,
54*4882a593Smuzhiyun };
55*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(qcom_reset_ops);
56