1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* Copyright (c) 2013, The Linux Foundation. All rights reserved. */ 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun #ifndef __QCOM_CLK_BRANCH_H__ 5*4882a593Smuzhiyun #define __QCOM_CLK_BRANCH_H__ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #include <linux/clk-provider.h> 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #include "clk-regmap.h" 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun /** 12*4882a593Smuzhiyun * struct clk_branch - gating clock with status bit and dynamic hardware gating 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun * @hwcg_reg: dynamic hardware clock gating register 15*4882a593Smuzhiyun * @hwcg_bit: ORed with @hwcg_reg to enable dynamic hardware clock gating 16*4882a593Smuzhiyun * @halt_reg: halt register 17*4882a593Smuzhiyun * @halt_bit: ANDed with @halt_reg to test for clock halted 18*4882a593Smuzhiyun * @halt_check: type of halt checking to perform 19*4882a593Smuzhiyun * @clkr: handle between common and hardware-specific interfaces 20*4882a593Smuzhiyun * 21*4882a593Smuzhiyun * Clock which can gate its output. 22*4882a593Smuzhiyun */ 23*4882a593Smuzhiyun struct clk_branch { 24*4882a593Smuzhiyun u32 hwcg_reg; 25*4882a593Smuzhiyun u32 halt_reg; 26*4882a593Smuzhiyun u8 hwcg_bit; 27*4882a593Smuzhiyun u8 halt_bit; 28*4882a593Smuzhiyun u8 halt_check; 29*4882a593Smuzhiyun #define BRANCH_VOTED BIT(7) /* Delay on disable */ 30*4882a593Smuzhiyun #define BRANCH_HALT 0 /* pol: 1 = halt */ 31*4882a593Smuzhiyun #define BRANCH_HALT_VOTED (BRANCH_HALT | BRANCH_VOTED) 32*4882a593Smuzhiyun #define BRANCH_HALT_ENABLE 1 /* pol: 0 = halt */ 33*4882a593Smuzhiyun #define BRANCH_HALT_ENABLE_VOTED (BRANCH_HALT_ENABLE | BRANCH_VOTED) 34*4882a593Smuzhiyun #define BRANCH_HALT_DELAY 2 /* No bit to check; just delay */ 35*4882a593Smuzhiyun #define BRANCH_HALT_SKIP 3 /* Don't check halt bit */ 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun struct clk_regmap clkr; 38*4882a593Smuzhiyun }; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun extern const struct clk_ops clk_branch_ops; 41*4882a593Smuzhiyun extern const struct clk_ops clk_branch2_ops; 42*4882a593Smuzhiyun extern const struct clk_ops clk_branch_simple_ops; 43*4882a593Smuzhiyun extern const struct clk_ops clk_branch2_aon_ops; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun #define to_clk_branch(_hw) \ 46*4882a593Smuzhiyun container_of(to_clk_regmap(_hw), struct clk_branch, clkr) 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun #endif 49