1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun #include <linux/slab.h>
3*4882a593Smuzhiyun #include <linux/io.h>
4*4882a593Smuzhiyun #include <linux/of.h>
5*4882a593Smuzhiyun #include <linux/of_address.h>
6*4882a593Smuzhiyun #include <linux/reset-controller.h>
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include "reset.h"
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #define rcdev_to_unit(rcdev) container_of(rcdev, struct mmp_clk_reset_unit, rcdev)
11*4882a593Smuzhiyun
mmp_of_reset_xlate(struct reset_controller_dev * rcdev,const struct of_phandle_args * reset_spec)12*4882a593Smuzhiyun static int mmp_of_reset_xlate(struct reset_controller_dev *rcdev,
13*4882a593Smuzhiyun const struct of_phandle_args *reset_spec)
14*4882a593Smuzhiyun {
15*4882a593Smuzhiyun struct mmp_clk_reset_unit *unit = rcdev_to_unit(rcdev);
16*4882a593Smuzhiyun struct mmp_clk_reset_cell *cell;
17*4882a593Smuzhiyun int i;
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun if (WARN_ON(reset_spec->args_count != rcdev->of_reset_n_cells))
20*4882a593Smuzhiyun return -EINVAL;
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun for (i = 0; i < rcdev->nr_resets; i++) {
23*4882a593Smuzhiyun cell = &unit->cells[i];
24*4882a593Smuzhiyun if (cell->clk_id == reset_spec->args[0])
25*4882a593Smuzhiyun break;
26*4882a593Smuzhiyun }
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun if (i == rcdev->nr_resets)
29*4882a593Smuzhiyun return -EINVAL;
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun return i;
32*4882a593Smuzhiyun }
33*4882a593Smuzhiyun
mmp_clk_reset_assert(struct reset_controller_dev * rcdev,unsigned long id)34*4882a593Smuzhiyun static int mmp_clk_reset_assert(struct reset_controller_dev *rcdev,
35*4882a593Smuzhiyun unsigned long id)
36*4882a593Smuzhiyun {
37*4882a593Smuzhiyun struct mmp_clk_reset_unit *unit = rcdev_to_unit(rcdev);
38*4882a593Smuzhiyun struct mmp_clk_reset_cell *cell;
39*4882a593Smuzhiyun unsigned long flags = 0;
40*4882a593Smuzhiyun u32 val;
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun cell = &unit->cells[id];
43*4882a593Smuzhiyun if (cell->lock)
44*4882a593Smuzhiyun spin_lock_irqsave(cell->lock, flags);
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun val = readl(cell->reg);
47*4882a593Smuzhiyun val |= cell->bits;
48*4882a593Smuzhiyun writel(val, cell->reg);
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun if (cell->lock)
51*4882a593Smuzhiyun spin_unlock_irqrestore(cell->lock, flags);
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun return 0;
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun
mmp_clk_reset_deassert(struct reset_controller_dev * rcdev,unsigned long id)56*4882a593Smuzhiyun static int mmp_clk_reset_deassert(struct reset_controller_dev *rcdev,
57*4882a593Smuzhiyun unsigned long id)
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun struct mmp_clk_reset_unit *unit = rcdev_to_unit(rcdev);
60*4882a593Smuzhiyun struct mmp_clk_reset_cell *cell;
61*4882a593Smuzhiyun unsigned long flags = 0;
62*4882a593Smuzhiyun u32 val;
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun cell = &unit->cells[id];
65*4882a593Smuzhiyun if (cell->lock)
66*4882a593Smuzhiyun spin_lock_irqsave(cell->lock, flags);
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun val = readl(cell->reg);
69*4882a593Smuzhiyun val &= ~cell->bits;
70*4882a593Smuzhiyun writel(val, cell->reg);
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun if (cell->lock)
73*4882a593Smuzhiyun spin_unlock_irqrestore(cell->lock, flags);
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun return 0;
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun static const struct reset_control_ops mmp_clk_reset_ops = {
79*4882a593Smuzhiyun .assert = mmp_clk_reset_assert,
80*4882a593Smuzhiyun .deassert = mmp_clk_reset_deassert,
81*4882a593Smuzhiyun };
82*4882a593Smuzhiyun
mmp_clk_reset_register(struct device_node * np,struct mmp_clk_reset_cell * cells,int nr_resets)83*4882a593Smuzhiyun void mmp_clk_reset_register(struct device_node *np,
84*4882a593Smuzhiyun struct mmp_clk_reset_cell *cells, int nr_resets)
85*4882a593Smuzhiyun {
86*4882a593Smuzhiyun struct mmp_clk_reset_unit *unit;
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun unit = kzalloc(sizeof(*unit), GFP_KERNEL);
89*4882a593Smuzhiyun if (!unit)
90*4882a593Smuzhiyun return;
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun unit->cells = cells;
93*4882a593Smuzhiyun unit->rcdev.of_reset_n_cells = 1;
94*4882a593Smuzhiyun unit->rcdev.nr_resets = nr_resets;
95*4882a593Smuzhiyun unit->rcdev.ops = &mmp_clk_reset_ops;
96*4882a593Smuzhiyun unit->rcdev.of_node = np;
97*4882a593Smuzhiyun unit->rcdev.of_xlate = mmp_of_reset_xlate;
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun reset_controller_register(&unit->rcdev);
100*4882a593Smuzhiyun }
101