1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * mmp AXI peripharal clock operation source file
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright (C) 2012 Marvell
5*4882a593Smuzhiyun * Chao Xie <xiechao.mail@gmail.com>
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * This file is licensed under the terms of the GNU General Public
8*4882a593Smuzhiyun * License version 2. This program is licensed "as is" without any
9*4882a593Smuzhiyun * warranty of any kind, whether express or implied.
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <linux/kernel.h>
13*4882a593Smuzhiyun #include <linux/io.h>
14*4882a593Smuzhiyun #include <linux/err.h>
15*4882a593Smuzhiyun #include <linux/delay.h>
16*4882a593Smuzhiyun #include <linux/slab.h>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #include "clk.h"
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #define to_clk_apmu(clk) (container_of(clk, struct clk_apmu, clk))
21*4882a593Smuzhiyun struct clk_apmu {
22*4882a593Smuzhiyun struct clk_hw hw;
23*4882a593Smuzhiyun void __iomem *base;
24*4882a593Smuzhiyun u32 rst_mask;
25*4882a593Smuzhiyun u32 enable_mask;
26*4882a593Smuzhiyun spinlock_t *lock;
27*4882a593Smuzhiyun };
28*4882a593Smuzhiyun
clk_apmu_enable(struct clk_hw * hw)29*4882a593Smuzhiyun static int clk_apmu_enable(struct clk_hw *hw)
30*4882a593Smuzhiyun {
31*4882a593Smuzhiyun struct clk_apmu *apmu = to_clk_apmu(hw);
32*4882a593Smuzhiyun unsigned long data;
33*4882a593Smuzhiyun unsigned long flags = 0;
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun if (apmu->lock)
36*4882a593Smuzhiyun spin_lock_irqsave(apmu->lock, flags);
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun data = readl_relaxed(apmu->base) | apmu->enable_mask;
39*4882a593Smuzhiyun writel_relaxed(data, apmu->base);
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun if (apmu->lock)
42*4882a593Smuzhiyun spin_unlock_irqrestore(apmu->lock, flags);
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun return 0;
45*4882a593Smuzhiyun }
46*4882a593Smuzhiyun
clk_apmu_disable(struct clk_hw * hw)47*4882a593Smuzhiyun static void clk_apmu_disable(struct clk_hw *hw)
48*4882a593Smuzhiyun {
49*4882a593Smuzhiyun struct clk_apmu *apmu = to_clk_apmu(hw);
50*4882a593Smuzhiyun unsigned long data;
51*4882a593Smuzhiyun unsigned long flags = 0;
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun if (apmu->lock)
54*4882a593Smuzhiyun spin_lock_irqsave(apmu->lock, flags);
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun data = readl_relaxed(apmu->base) & ~apmu->enable_mask;
57*4882a593Smuzhiyun writel_relaxed(data, apmu->base);
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun if (apmu->lock)
60*4882a593Smuzhiyun spin_unlock_irqrestore(apmu->lock, flags);
61*4882a593Smuzhiyun }
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun static const struct clk_ops clk_apmu_ops = {
64*4882a593Smuzhiyun .enable = clk_apmu_enable,
65*4882a593Smuzhiyun .disable = clk_apmu_disable,
66*4882a593Smuzhiyun };
67*4882a593Smuzhiyun
mmp_clk_register_apmu(const char * name,const char * parent_name,void __iomem * base,u32 enable_mask,spinlock_t * lock)68*4882a593Smuzhiyun struct clk *mmp_clk_register_apmu(const char *name, const char *parent_name,
69*4882a593Smuzhiyun void __iomem *base, u32 enable_mask, spinlock_t *lock)
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun struct clk_apmu *apmu;
72*4882a593Smuzhiyun struct clk *clk;
73*4882a593Smuzhiyun struct clk_init_data init;
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun apmu = kzalloc(sizeof(*apmu), GFP_KERNEL);
76*4882a593Smuzhiyun if (!apmu)
77*4882a593Smuzhiyun return NULL;
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun init.name = name;
80*4882a593Smuzhiyun init.ops = &clk_apmu_ops;
81*4882a593Smuzhiyun init.flags = CLK_SET_RATE_PARENT;
82*4882a593Smuzhiyun init.parent_names = (parent_name ? &parent_name : NULL);
83*4882a593Smuzhiyun init.num_parents = (parent_name ? 1 : 0);
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun apmu->base = base;
86*4882a593Smuzhiyun apmu->enable_mask = enable_mask;
87*4882a593Smuzhiyun apmu->lock = lock;
88*4882a593Smuzhiyun apmu->hw.init = &init;
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun clk = clk_register(NULL, &apmu->hw);
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun if (IS_ERR(clk))
93*4882a593Smuzhiyun kfree(apmu);
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun return clk;
96*4882a593Smuzhiyun }
97