1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun# Amlogic clock drivers 3*4882a593Smuzhiyun 4*4882a593Smuzhiyunobj-$(CONFIG_COMMON_CLK_MESON_AO_CLKC) += meson-aoclk.o 5*4882a593Smuzhiyunobj-$(CONFIG_COMMON_CLK_MESON_CPU_DYNDIV) += clk-cpu-dyndiv.o 6*4882a593Smuzhiyunobj-$(CONFIG_COMMON_CLK_MESON_DUALDIV) += clk-dualdiv.o 7*4882a593Smuzhiyunobj-$(CONFIG_COMMON_CLK_MESON_EE_CLKC) += meson-eeclk.o 8*4882a593Smuzhiyunobj-$(CONFIG_COMMON_CLK_MESON_MPLL) += clk-mpll.o 9*4882a593Smuzhiyunobj-$(CONFIG_COMMON_CLK_MESON_PHASE) += clk-phase.o 10*4882a593Smuzhiyunobj-$(CONFIG_COMMON_CLK_MESON_PLL) += clk-pll.o 11*4882a593Smuzhiyunobj-$(CONFIG_COMMON_CLK_MESON_REGMAP) += clk-regmap.o 12*4882a593Smuzhiyunobj-$(CONFIG_COMMON_CLK_MESON_SCLK_DIV) += sclk-div.o 13*4882a593Smuzhiyunobj-$(CONFIG_COMMON_CLK_MESON_VID_PLL_DIV) += vid-pll-div.o 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun# Amlogic Clock controllers 16*4882a593Smuzhiyun 17*4882a593Smuzhiyunobj-$(CONFIG_COMMON_CLK_AXG) += axg.o axg-aoclk.o 18*4882a593Smuzhiyunobj-$(CONFIG_COMMON_CLK_AXG_AUDIO) += axg-audio.o 19*4882a593Smuzhiyunobj-$(CONFIG_COMMON_CLK_GXBB) += gxbb.o gxbb-aoclk.o 20*4882a593Smuzhiyunobj-$(CONFIG_COMMON_CLK_G12A) += g12a.o g12a-aoclk.o 21*4882a593Smuzhiyunobj-$(CONFIG_COMMON_CLK_MESON8B) += meson8b.o meson8-ddr.o 22