xref: /OK3568_Linux_fs/kernel/drivers/clk/mediatek/clk-mt8183-cam.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // Copyright (c) 2018 MediaTek Inc.
4*4882a593Smuzhiyun // Author: Weiyi Lu <weiyi.lu@mediatek.com>
5*4882a593Smuzhiyun 
6*4882a593Smuzhiyun #include <linux/clk-provider.h>
7*4882a593Smuzhiyun #include <linux/platform_device.h>
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #include "clk-mtk.h"
10*4882a593Smuzhiyun #include "clk-gate.h"
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #include <dt-bindings/clock/mt8183-clk.h>
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun static const struct mtk_gate_regs cam_cg_regs = {
15*4882a593Smuzhiyun 	.set_ofs = 0x4,
16*4882a593Smuzhiyun 	.clr_ofs = 0x8,
17*4882a593Smuzhiyun 	.sta_ofs = 0x0,
18*4882a593Smuzhiyun };
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun #define GATE_CAM(_id, _name, _parent, _shift)			\
21*4882a593Smuzhiyun 	GATE_MTK(_id, _name, _parent, &cam_cg_regs, _shift,	\
22*4882a593Smuzhiyun 		&mtk_clk_gate_ops_setclr)
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun static const struct mtk_gate cam_clks[] = {
25*4882a593Smuzhiyun 	GATE_CAM(CLK_CAM_LARB6, "cam_larb6", "cam_sel", 0),
26*4882a593Smuzhiyun 	GATE_CAM(CLK_CAM_DFP_VAD, "cam_dfp_vad", "cam_sel", 1),
27*4882a593Smuzhiyun 	GATE_CAM(CLK_CAM_LARB3, "cam_larb3", "cam_sel", 2),
28*4882a593Smuzhiyun 	GATE_CAM(CLK_CAM_CAM, "cam_cam", "cam_sel", 6),
29*4882a593Smuzhiyun 	GATE_CAM(CLK_CAM_CAMTG, "cam_camtg", "cam_sel", 7),
30*4882a593Smuzhiyun 	GATE_CAM(CLK_CAM_SENINF, "cam_seninf", "cam_sel", 8),
31*4882a593Smuzhiyun 	GATE_CAM(CLK_CAM_CAMSV0, "cam_camsv0", "cam_sel", 9),
32*4882a593Smuzhiyun 	GATE_CAM(CLK_CAM_CAMSV1, "cam_camsv1", "cam_sel", 10),
33*4882a593Smuzhiyun 	GATE_CAM(CLK_CAM_CAMSV2, "cam_camsv2", "cam_sel", 11),
34*4882a593Smuzhiyun 	GATE_CAM(CLK_CAM_CCU, "cam_ccu", "cam_sel", 12),
35*4882a593Smuzhiyun };
36*4882a593Smuzhiyun 
clk_mt8183_cam_probe(struct platform_device * pdev)37*4882a593Smuzhiyun static int clk_mt8183_cam_probe(struct platform_device *pdev)
38*4882a593Smuzhiyun {
39*4882a593Smuzhiyun 	struct clk_onecell_data *clk_data;
40*4882a593Smuzhiyun 	struct device_node *node = pdev->dev.of_node;
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun 	clk_data = mtk_alloc_clk_data(CLK_CAM_NR_CLK);
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun 	mtk_clk_register_gates(node, cam_clks, ARRAY_SIZE(cam_clks),
45*4882a593Smuzhiyun 			clk_data);
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun 	return of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
48*4882a593Smuzhiyun }
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun static const struct of_device_id of_match_clk_mt8183_cam[] = {
51*4882a593Smuzhiyun 	{ .compatible = "mediatek,mt8183-camsys", },
52*4882a593Smuzhiyun 	{}
53*4882a593Smuzhiyun };
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun static struct platform_driver clk_mt8183_cam_drv = {
56*4882a593Smuzhiyun 	.probe = clk_mt8183_cam_probe,
57*4882a593Smuzhiyun 	.driver = {
58*4882a593Smuzhiyun 		.name = "clk-mt8183-cam",
59*4882a593Smuzhiyun 		.of_match_table = of_match_clk_mt8183_cam,
60*4882a593Smuzhiyun 	},
61*4882a593Smuzhiyun };
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun builtin_platform_driver(clk_mt8183_cam_drv);
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