1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (c) 2019 MediaTek Inc.
4*4882a593Smuzhiyun * Author: Wendell Lin <wendell.lin@mediatek.com>
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <linux/clk-provider.h>
8*4882a593Smuzhiyun #include <linux/platform_device.h>
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include "clk-mtk.h"
11*4882a593Smuzhiyun #include "clk-gate.h"
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #include <dt-bindings/clock/mt6779-clk.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun static const struct mtk_gate_regs venc_cg_regs = {
16*4882a593Smuzhiyun .set_ofs = 0x0004,
17*4882a593Smuzhiyun .clr_ofs = 0x0008,
18*4882a593Smuzhiyun .sta_ofs = 0x0000,
19*4882a593Smuzhiyun };
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #define GATE_VENC_I(_id, _name, _parent, _shift) \
22*4882a593Smuzhiyun GATE_MTK(_id, _name, _parent, &venc_cg_regs, _shift, \
23*4882a593Smuzhiyun &mtk_clk_gate_ops_setclr_inv)
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun static const struct mtk_gate venc_clks[] = {
26*4882a593Smuzhiyun GATE_VENC_I(CLK_VENC_GCON_LARB, "venc_larb", "venc_sel", 0),
27*4882a593Smuzhiyun GATE_VENC_I(CLK_VENC_GCON_VENC, "venc_venc", "venc_sel", 4),
28*4882a593Smuzhiyun GATE_VENC_I(CLK_VENC_GCON_JPGENC, "venc_jpgenc", "venc_sel", 8),
29*4882a593Smuzhiyun GATE_VENC_I(CLK_VENC_GCON_GALS, "venc_gals", "venc_sel", 28),
30*4882a593Smuzhiyun };
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun static const struct of_device_id of_match_clk_mt6779_venc[] = {
33*4882a593Smuzhiyun { .compatible = "mediatek,mt6779-vencsys", },
34*4882a593Smuzhiyun {}
35*4882a593Smuzhiyun };
36*4882a593Smuzhiyun
clk_mt6779_venc_probe(struct platform_device * pdev)37*4882a593Smuzhiyun static int clk_mt6779_venc_probe(struct platform_device *pdev)
38*4882a593Smuzhiyun {
39*4882a593Smuzhiyun struct clk_onecell_data *clk_data;
40*4882a593Smuzhiyun struct device_node *node = pdev->dev.of_node;
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun clk_data = mtk_alloc_clk_data(CLK_VENC_GCON_NR_CLK);
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun mtk_clk_register_gates(node, venc_clks, ARRAY_SIZE(venc_clks),
45*4882a593Smuzhiyun clk_data);
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun return of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
48*4882a593Smuzhiyun }
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun static struct platform_driver clk_mt6779_venc_drv = {
51*4882a593Smuzhiyun .probe = clk_mt6779_venc_probe,
52*4882a593Smuzhiyun .driver = {
53*4882a593Smuzhiyun .name = "clk-mt6779-venc",
54*4882a593Smuzhiyun .of_match_table = of_match_clk_mt6779_venc,
55*4882a593Smuzhiyun },
56*4882a593Smuzhiyun };
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun builtin_platform_driver(clk_mt6779_venc_drv);
59