1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (c) 2019 MediaTek Inc.
4*4882a593Smuzhiyun * Author: Wendell Lin <wendell.lin@mediatek.com>
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <linux/clk-provider.h>
8*4882a593Smuzhiyun #include <linux/platform_device.h>
9*4882a593Smuzhiyun #include <dt-bindings/clock/mt6779-clk.h>
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include "clk-mtk.h"
12*4882a593Smuzhiyun #include "clk-gate.h"
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun static const struct mtk_gate_regs cam_cg_regs = {
15*4882a593Smuzhiyun .set_ofs = 0x0004,
16*4882a593Smuzhiyun .clr_ofs = 0x0008,
17*4882a593Smuzhiyun .sta_ofs = 0x0000,
18*4882a593Smuzhiyun };
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #define GATE_CAM(_id, _name, _parent, _shift) \
21*4882a593Smuzhiyun GATE_MTK(_id, _name, _parent, &cam_cg_regs, _shift, \
22*4882a593Smuzhiyun &mtk_clk_gate_ops_setclr)
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun static const struct mtk_gate cam_clks[] = {
25*4882a593Smuzhiyun GATE_CAM(CLK_CAM_LARB10, "camsys_larb10", "cam_sel", 0),
26*4882a593Smuzhiyun GATE_CAM(CLK_CAM_DFP_VAD, "camsys_dfp_vad", "cam_sel", 1),
27*4882a593Smuzhiyun GATE_CAM(CLK_CAM_LARB11, "camsys_larb11", "cam_sel", 2),
28*4882a593Smuzhiyun GATE_CAM(CLK_CAM_LARB9, "camsys_larb9", "cam_sel", 3),
29*4882a593Smuzhiyun GATE_CAM(CLK_CAM_CAM, "camsys_cam", "cam_sel", 6),
30*4882a593Smuzhiyun GATE_CAM(CLK_CAM_CAMTG, "camsys_camtg", "cam_sel", 7),
31*4882a593Smuzhiyun GATE_CAM(CLK_CAM_SENINF, "camsys_seninf", "cam_sel", 8),
32*4882a593Smuzhiyun GATE_CAM(CLK_CAM_CAMSV0, "camsys_camsv0", "cam_sel", 9),
33*4882a593Smuzhiyun GATE_CAM(CLK_CAM_CAMSV1, "camsys_camsv1", "cam_sel", 10),
34*4882a593Smuzhiyun GATE_CAM(CLK_CAM_CAMSV2, "camsys_camsv2", "cam_sel", 11),
35*4882a593Smuzhiyun GATE_CAM(CLK_CAM_CAMSV3, "camsys_camsv3", "cam_sel", 12),
36*4882a593Smuzhiyun GATE_CAM(CLK_CAM_CCU, "camsys_ccu", "cam_sel", 13),
37*4882a593Smuzhiyun GATE_CAM(CLK_CAM_FAKE_ENG, "camsys_fake_eng", "cam_sel", 14),
38*4882a593Smuzhiyun };
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun static const struct of_device_id of_match_clk_mt6779_cam[] = {
41*4882a593Smuzhiyun { .compatible = "mediatek,mt6779-camsys", },
42*4882a593Smuzhiyun {}
43*4882a593Smuzhiyun };
44*4882a593Smuzhiyun
clk_mt6779_cam_probe(struct platform_device * pdev)45*4882a593Smuzhiyun static int clk_mt6779_cam_probe(struct platform_device *pdev)
46*4882a593Smuzhiyun {
47*4882a593Smuzhiyun struct clk_onecell_data *clk_data;
48*4882a593Smuzhiyun struct device_node *node = pdev->dev.of_node;
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun clk_data = mtk_alloc_clk_data(CLK_CAM_NR_CLK);
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun mtk_clk_register_gates(node, cam_clks, ARRAY_SIZE(cam_clks),
53*4882a593Smuzhiyun clk_data);
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun return of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
56*4882a593Smuzhiyun }
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun static struct platform_driver clk_mt6779_cam_drv = {
59*4882a593Smuzhiyun .probe = clk_mt6779_cam_probe,
60*4882a593Smuzhiyun .driver = {
61*4882a593Smuzhiyun .name = "clk-mt6779-cam",
62*4882a593Smuzhiyun .of_match_table = of_match_clk_mt6779_cam,
63*4882a593Smuzhiyun },
64*4882a593Smuzhiyun };
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun builtin_platform_driver(clk_mt6779_cam_drv);
67