1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright 2012 Freescale Semiconductor, Inc.
4*4882a593Smuzhiyun * Copyright 2012 Linaro Ltd.
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <linux/bits.h>
8*4882a593Smuzhiyun #include <linux/clk.h>
9*4882a593Smuzhiyun #include <linux/clk-provider.h>
10*4882a593Smuzhiyun #include <linux/io.h>
11*4882a593Smuzhiyun #include <linux/slab.h>
12*4882a593Smuzhiyun #include <linux/jiffies.h>
13*4882a593Smuzhiyun #include <linux/err.h>
14*4882a593Smuzhiyun #include "clk.h"
15*4882a593Smuzhiyun
clk_busy_wait(void __iomem * reg,u8 shift)16*4882a593Smuzhiyun static int clk_busy_wait(void __iomem *reg, u8 shift)
17*4882a593Smuzhiyun {
18*4882a593Smuzhiyun unsigned long timeout = jiffies + msecs_to_jiffies(10);
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun while (readl_relaxed(reg) & (1 << shift))
21*4882a593Smuzhiyun if (time_after(jiffies, timeout))
22*4882a593Smuzhiyun return -ETIMEDOUT;
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun return 0;
25*4882a593Smuzhiyun }
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun struct clk_busy_divider {
28*4882a593Smuzhiyun struct clk_divider div;
29*4882a593Smuzhiyun const struct clk_ops *div_ops;
30*4882a593Smuzhiyun void __iomem *reg;
31*4882a593Smuzhiyun u8 shift;
32*4882a593Smuzhiyun };
33*4882a593Smuzhiyun
to_clk_busy_divider(struct clk_hw * hw)34*4882a593Smuzhiyun static inline struct clk_busy_divider *to_clk_busy_divider(struct clk_hw *hw)
35*4882a593Smuzhiyun {
36*4882a593Smuzhiyun struct clk_divider *div = to_clk_divider(hw);
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun return container_of(div, struct clk_busy_divider, div);
39*4882a593Smuzhiyun }
40*4882a593Smuzhiyun
clk_busy_divider_recalc_rate(struct clk_hw * hw,unsigned long parent_rate)41*4882a593Smuzhiyun static unsigned long clk_busy_divider_recalc_rate(struct clk_hw *hw,
42*4882a593Smuzhiyun unsigned long parent_rate)
43*4882a593Smuzhiyun {
44*4882a593Smuzhiyun struct clk_busy_divider *busy = to_clk_busy_divider(hw);
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun return busy->div_ops->recalc_rate(&busy->div.hw, parent_rate);
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun
clk_busy_divider_round_rate(struct clk_hw * hw,unsigned long rate,unsigned long * prate)49*4882a593Smuzhiyun static long clk_busy_divider_round_rate(struct clk_hw *hw, unsigned long rate,
50*4882a593Smuzhiyun unsigned long *prate)
51*4882a593Smuzhiyun {
52*4882a593Smuzhiyun struct clk_busy_divider *busy = to_clk_busy_divider(hw);
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun return busy->div_ops->round_rate(&busy->div.hw, rate, prate);
55*4882a593Smuzhiyun }
56*4882a593Smuzhiyun
clk_busy_divider_set_rate(struct clk_hw * hw,unsigned long rate,unsigned long parent_rate)57*4882a593Smuzhiyun static int clk_busy_divider_set_rate(struct clk_hw *hw, unsigned long rate,
58*4882a593Smuzhiyun unsigned long parent_rate)
59*4882a593Smuzhiyun {
60*4882a593Smuzhiyun struct clk_busy_divider *busy = to_clk_busy_divider(hw);
61*4882a593Smuzhiyun int ret;
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun ret = busy->div_ops->set_rate(&busy->div.hw, rate, parent_rate);
64*4882a593Smuzhiyun if (!ret)
65*4882a593Smuzhiyun ret = clk_busy_wait(busy->reg, busy->shift);
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun return ret;
68*4882a593Smuzhiyun }
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun static const struct clk_ops clk_busy_divider_ops = {
71*4882a593Smuzhiyun .recalc_rate = clk_busy_divider_recalc_rate,
72*4882a593Smuzhiyun .round_rate = clk_busy_divider_round_rate,
73*4882a593Smuzhiyun .set_rate = clk_busy_divider_set_rate,
74*4882a593Smuzhiyun };
75*4882a593Smuzhiyun
imx_clk_hw_busy_divider(const char * name,const char * parent_name,void __iomem * reg,u8 shift,u8 width,void __iomem * busy_reg,u8 busy_shift)76*4882a593Smuzhiyun struct clk_hw *imx_clk_hw_busy_divider(const char *name, const char *parent_name,
77*4882a593Smuzhiyun void __iomem *reg, u8 shift, u8 width,
78*4882a593Smuzhiyun void __iomem *busy_reg, u8 busy_shift)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun struct clk_busy_divider *busy;
81*4882a593Smuzhiyun struct clk_hw *hw;
82*4882a593Smuzhiyun struct clk_init_data init;
83*4882a593Smuzhiyun int ret;
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun busy = kzalloc(sizeof(*busy), GFP_KERNEL);
86*4882a593Smuzhiyun if (!busy)
87*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun busy->reg = busy_reg;
90*4882a593Smuzhiyun busy->shift = busy_shift;
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun busy->div.reg = reg;
93*4882a593Smuzhiyun busy->div.shift = shift;
94*4882a593Smuzhiyun busy->div.width = width;
95*4882a593Smuzhiyun busy->div.lock = &imx_ccm_lock;
96*4882a593Smuzhiyun busy->div_ops = &clk_divider_ops;
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun init.name = name;
99*4882a593Smuzhiyun init.ops = &clk_busy_divider_ops;
100*4882a593Smuzhiyun init.flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL;
101*4882a593Smuzhiyun init.parent_names = &parent_name;
102*4882a593Smuzhiyun init.num_parents = 1;
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun busy->div.hw.init = &init;
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun hw = &busy->div.hw;
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun ret = clk_hw_register(NULL, hw);
109*4882a593Smuzhiyun if (ret) {
110*4882a593Smuzhiyun kfree(busy);
111*4882a593Smuzhiyun return ERR_PTR(ret);
112*4882a593Smuzhiyun }
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun return hw;
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun struct clk_busy_mux {
118*4882a593Smuzhiyun struct clk_mux mux;
119*4882a593Smuzhiyun const struct clk_ops *mux_ops;
120*4882a593Smuzhiyun void __iomem *reg;
121*4882a593Smuzhiyun u8 shift;
122*4882a593Smuzhiyun };
123*4882a593Smuzhiyun
to_clk_busy_mux(struct clk_hw * hw)124*4882a593Smuzhiyun static inline struct clk_busy_mux *to_clk_busy_mux(struct clk_hw *hw)
125*4882a593Smuzhiyun {
126*4882a593Smuzhiyun struct clk_mux *mux = to_clk_mux(hw);
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun return container_of(mux, struct clk_busy_mux, mux);
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun
clk_busy_mux_get_parent(struct clk_hw * hw)131*4882a593Smuzhiyun static u8 clk_busy_mux_get_parent(struct clk_hw *hw)
132*4882a593Smuzhiyun {
133*4882a593Smuzhiyun struct clk_busy_mux *busy = to_clk_busy_mux(hw);
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun return busy->mux_ops->get_parent(&busy->mux.hw);
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun
clk_busy_mux_set_parent(struct clk_hw * hw,u8 index)138*4882a593Smuzhiyun static int clk_busy_mux_set_parent(struct clk_hw *hw, u8 index)
139*4882a593Smuzhiyun {
140*4882a593Smuzhiyun struct clk_busy_mux *busy = to_clk_busy_mux(hw);
141*4882a593Smuzhiyun int ret;
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun ret = busy->mux_ops->set_parent(&busy->mux.hw, index);
144*4882a593Smuzhiyun if (!ret)
145*4882a593Smuzhiyun ret = clk_busy_wait(busy->reg, busy->shift);
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun return ret;
148*4882a593Smuzhiyun }
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun static const struct clk_ops clk_busy_mux_ops = {
151*4882a593Smuzhiyun .get_parent = clk_busy_mux_get_parent,
152*4882a593Smuzhiyun .set_parent = clk_busy_mux_set_parent,
153*4882a593Smuzhiyun };
154*4882a593Smuzhiyun
imx_clk_hw_busy_mux(const char * name,void __iomem * reg,u8 shift,u8 width,void __iomem * busy_reg,u8 busy_shift,const char * const * parent_names,int num_parents)155*4882a593Smuzhiyun struct clk_hw *imx_clk_hw_busy_mux(const char *name, void __iomem *reg, u8 shift,
156*4882a593Smuzhiyun u8 width, void __iomem *busy_reg, u8 busy_shift,
157*4882a593Smuzhiyun const char * const *parent_names, int num_parents)
158*4882a593Smuzhiyun {
159*4882a593Smuzhiyun struct clk_busy_mux *busy;
160*4882a593Smuzhiyun struct clk_hw *hw;
161*4882a593Smuzhiyun struct clk_init_data init;
162*4882a593Smuzhiyun int ret;
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun busy = kzalloc(sizeof(*busy), GFP_KERNEL);
165*4882a593Smuzhiyun if (!busy)
166*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun busy->reg = busy_reg;
169*4882a593Smuzhiyun busy->shift = busy_shift;
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun busy->mux.reg = reg;
172*4882a593Smuzhiyun busy->mux.shift = shift;
173*4882a593Smuzhiyun busy->mux.mask = BIT(width) - 1;
174*4882a593Smuzhiyun busy->mux.lock = &imx_ccm_lock;
175*4882a593Smuzhiyun busy->mux_ops = &clk_mux_ops;
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun init.name = name;
178*4882a593Smuzhiyun init.ops = &clk_busy_mux_ops;
179*4882a593Smuzhiyun init.flags = CLK_IS_CRITICAL;
180*4882a593Smuzhiyun init.parent_names = parent_names;
181*4882a593Smuzhiyun init.num_parents = num_parents;
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun busy->mux.hw.init = &init;
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun hw = &busy->mux.hw;
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun ret = clk_hw_register(NULL, hw);
188*4882a593Smuzhiyun if (ret) {
189*4882a593Smuzhiyun kfree(busy);
190*4882a593Smuzhiyun return ERR_PTR(ret);
191*4882a593Smuzhiyun }
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun return hw;
194*4882a593Smuzhiyun }
195