xref: /OK3568_Linux_fs/kernel/drivers/clk/hisilicon/crg.h (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * HiSilicon Clock and Reset Driver Header
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (c) 2016 HiSilicon Limited.
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #ifndef __HISI_CRG_H
9*4882a593Smuzhiyun #define __HISI_CRG_H
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun struct hisi_clock_data;
12*4882a593Smuzhiyun struct hisi_reset_controller;
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun struct hisi_crg_funcs {
15*4882a593Smuzhiyun 	struct hisi_clock_data*	(*register_clks)(struct platform_device *pdev);
16*4882a593Smuzhiyun 	void (*unregister_clks)(struct platform_device *pdev);
17*4882a593Smuzhiyun };
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun struct hisi_crg_dev {
20*4882a593Smuzhiyun 	struct hisi_clock_data *clk_data;
21*4882a593Smuzhiyun 	struct hisi_reset_controller *rstc;
22*4882a593Smuzhiyun 	const struct hisi_crg_funcs *funcs;
23*4882a593Smuzhiyun };
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun #endif	/* __HISI_CRG_H */
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