1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // clk-s2mps11.c - Clock driver for S2MPS11.
4*4882a593Smuzhiyun //
5*4882a593Smuzhiyun // Copyright (C) 2013,2014 Samsung Electornics
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <linux/module.h>
8*4882a593Smuzhiyun #include <linux/err.h>
9*4882a593Smuzhiyun #include <linux/of.h>
10*4882a593Smuzhiyun #include <linux/clkdev.h>
11*4882a593Smuzhiyun #include <linux/regmap.h>
12*4882a593Smuzhiyun #include <linux/clk-provider.h>
13*4882a593Smuzhiyun #include <linux/platform_device.h>
14*4882a593Smuzhiyun #include <linux/mfd/samsung/s2mps11.h>
15*4882a593Smuzhiyun #include <linux/mfd/samsung/s2mps13.h>
16*4882a593Smuzhiyun #include <linux/mfd/samsung/s2mps14.h>
17*4882a593Smuzhiyun #include <linux/mfd/samsung/s5m8767.h>
18*4882a593Smuzhiyun #include <linux/mfd/samsung/core.h>
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #include <dt-bindings/clock/samsung,s2mps11.h>
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun struct s2mps11_clk {
23*4882a593Smuzhiyun struct sec_pmic_dev *iodev;
24*4882a593Smuzhiyun struct device_node *clk_np;
25*4882a593Smuzhiyun struct clk_hw hw;
26*4882a593Smuzhiyun struct clk *clk;
27*4882a593Smuzhiyun struct clk_lookup *lookup;
28*4882a593Smuzhiyun u32 mask;
29*4882a593Smuzhiyun unsigned int reg;
30*4882a593Smuzhiyun };
31*4882a593Smuzhiyun
to_s2mps11_clk(struct clk_hw * hw)32*4882a593Smuzhiyun static struct s2mps11_clk *to_s2mps11_clk(struct clk_hw *hw)
33*4882a593Smuzhiyun {
34*4882a593Smuzhiyun return container_of(hw, struct s2mps11_clk, hw);
35*4882a593Smuzhiyun }
36*4882a593Smuzhiyun
s2mps11_clk_prepare(struct clk_hw * hw)37*4882a593Smuzhiyun static int s2mps11_clk_prepare(struct clk_hw *hw)
38*4882a593Smuzhiyun {
39*4882a593Smuzhiyun struct s2mps11_clk *s2mps11 = to_s2mps11_clk(hw);
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun return regmap_update_bits(s2mps11->iodev->regmap_pmic,
42*4882a593Smuzhiyun s2mps11->reg,
43*4882a593Smuzhiyun s2mps11->mask, s2mps11->mask);
44*4882a593Smuzhiyun }
45*4882a593Smuzhiyun
s2mps11_clk_unprepare(struct clk_hw * hw)46*4882a593Smuzhiyun static void s2mps11_clk_unprepare(struct clk_hw *hw)
47*4882a593Smuzhiyun {
48*4882a593Smuzhiyun struct s2mps11_clk *s2mps11 = to_s2mps11_clk(hw);
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun regmap_update_bits(s2mps11->iodev->regmap_pmic, s2mps11->reg,
51*4882a593Smuzhiyun s2mps11->mask, ~s2mps11->mask);
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun
s2mps11_clk_is_prepared(struct clk_hw * hw)54*4882a593Smuzhiyun static int s2mps11_clk_is_prepared(struct clk_hw *hw)
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun int ret;
57*4882a593Smuzhiyun u32 val;
58*4882a593Smuzhiyun struct s2mps11_clk *s2mps11 = to_s2mps11_clk(hw);
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun ret = regmap_read(s2mps11->iodev->regmap_pmic,
61*4882a593Smuzhiyun s2mps11->reg, &val);
62*4882a593Smuzhiyun if (ret < 0)
63*4882a593Smuzhiyun return -EINVAL;
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun return val & s2mps11->mask;
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun
s2mps11_clk_recalc_rate(struct clk_hw * hw,unsigned long parent_rate)68*4882a593Smuzhiyun static unsigned long s2mps11_clk_recalc_rate(struct clk_hw *hw,
69*4882a593Smuzhiyun unsigned long parent_rate)
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun return 32768;
72*4882a593Smuzhiyun }
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun static const struct clk_ops s2mps11_clk_ops = {
75*4882a593Smuzhiyun .prepare = s2mps11_clk_prepare,
76*4882a593Smuzhiyun .unprepare = s2mps11_clk_unprepare,
77*4882a593Smuzhiyun .is_prepared = s2mps11_clk_is_prepared,
78*4882a593Smuzhiyun .recalc_rate = s2mps11_clk_recalc_rate,
79*4882a593Smuzhiyun };
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun /* This s2mps11_clks_init tructure is common to s2mps11, s2mps13 and s2mps14 */
82*4882a593Smuzhiyun static struct clk_init_data s2mps11_clks_init[S2MPS11_CLKS_NUM] = {
83*4882a593Smuzhiyun [S2MPS11_CLK_AP] = {
84*4882a593Smuzhiyun .name = "s2mps11_ap",
85*4882a593Smuzhiyun .ops = &s2mps11_clk_ops,
86*4882a593Smuzhiyun },
87*4882a593Smuzhiyun [S2MPS11_CLK_CP] = {
88*4882a593Smuzhiyun .name = "s2mps11_cp",
89*4882a593Smuzhiyun .ops = &s2mps11_clk_ops,
90*4882a593Smuzhiyun },
91*4882a593Smuzhiyun [S2MPS11_CLK_BT] = {
92*4882a593Smuzhiyun .name = "s2mps11_bt",
93*4882a593Smuzhiyun .ops = &s2mps11_clk_ops,
94*4882a593Smuzhiyun },
95*4882a593Smuzhiyun };
96*4882a593Smuzhiyun
s2mps11_clk_parse_dt(struct platform_device * pdev,struct clk_init_data * clks_init)97*4882a593Smuzhiyun static struct device_node *s2mps11_clk_parse_dt(struct platform_device *pdev,
98*4882a593Smuzhiyun struct clk_init_data *clks_init)
99*4882a593Smuzhiyun {
100*4882a593Smuzhiyun struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
101*4882a593Smuzhiyun struct device_node *clk_np;
102*4882a593Smuzhiyun int i;
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun if (!iodev->dev->of_node)
105*4882a593Smuzhiyun return ERR_PTR(-EINVAL);
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun clk_np = of_get_child_by_name(iodev->dev->of_node, "clocks");
108*4882a593Smuzhiyun if (!clk_np) {
109*4882a593Smuzhiyun dev_err(&pdev->dev, "could not find clock sub-node\n");
110*4882a593Smuzhiyun return ERR_PTR(-EINVAL);
111*4882a593Smuzhiyun }
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun for (i = 0; i < S2MPS11_CLKS_NUM; i++)
114*4882a593Smuzhiyun of_property_read_string_index(clk_np, "clock-output-names", i,
115*4882a593Smuzhiyun &clks_init[i].name);
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun return clk_np;
118*4882a593Smuzhiyun }
119*4882a593Smuzhiyun
s2mps11_clk_probe(struct platform_device * pdev)120*4882a593Smuzhiyun static int s2mps11_clk_probe(struct platform_device *pdev)
121*4882a593Smuzhiyun {
122*4882a593Smuzhiyun struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
123*4882a593Smuzhiyun struct s2mps11_clk *s2mps11_clks;
124*4882a593Smuzhiyun struct clk_hw_onecell_data *clk_data;
125*4882a593Smuzhiyun unsigned int s2mps11_reg;
126*4882a593Smuzhiyun int i, ret = 0;
127*4882a593Smuzhiyun enum sec_device_type hwid = platform_get_device_id(pdev)->driver_data;
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun s2mps11_clks = devm_kcalloc(&pdev->dev, S2MPS11_CLKS_NUM,
130*4882a593Smuzhiyun sizeof(*s2mps11_clks), GFP_KERNEL);
131*4882a593Smuzhiyun if (!s2mps11_clks)
132*4882a593Smuzhiyun return -ENOMEM;
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun clk_data = devm_kzalloc(&pdev->dev,
135*4882a593Smuzhiyun struct_size(clk_data, hws, S2MPS11_CLKS_NUM),
136*4882a593Smuzhiyun GFP_KERNEL);
137*4882a593Smuzhiyun if (!clk_data)
138*4882a593Smuzhiyun return -ENOMEM;
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun switch (hwid) {
141*4882a593Smuzhiyun case S2MPS11X:
142*4882a593Smuzhiyun s2mps11_reg = S2MPS11_REG_RTC_CTRL;
143*4882a593Smuzhiyun break;
144*4882a593Smuzhiyun case S2MPS13X:
145*4882a593Smuzhiyun s2mps11_reg = S2MPS13_REG_RTCCTRL;
146*4882a593Smuzhiyun break;
147*4882a593Smuzhiyun case S2MPS14X:
148*4882a593Smuzhiyun s2mps11_reg = S2MPS14_REG_RTCCTRL;
149*4882a593Smuzhiyun break;
150*4882a593Smuzhiyun case S5M8767X:
151*4882a593Smuzhiyun s2mps11_reg = S5M8767_REG_CTRL1;
152*4882a593Smuzhiyun break;
153*4882a593Smuzhiyun default:
154*4882a593Smuzhiyun dev_err(&pdev->dev, "Invalid device type\n");
155*4882a593Smuzhiyun return -EINVAL;
156*4882a593Smuzhiyun }
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun /* Store clocks of_node in first element of s2mps11_clks array */
159*4882a593Smuzhiyun s2mps11_clks->clk_np = s2mps11_clk_parse_dt(pdev, s2mps11_clks_init);
160*4882a593Smuzhiyun if (IS_ERR(s2mps11_clks->clk_np))
161*4882a593Smuzhiyun return PTR_ERR(s2mps11_clks->clk_np);
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun for (i = 0; i < S2MPS11_CLKS_NUM; i++) {
164*4882a593Smuzhiyun if (i == S2MPS11_CLK_CP && hwid == S2MPS14X)
165*4882a593Smuzhiyun continue; /* Skip clocks not present in some devices */
166*4882a593Smuzhiyun s2mps11_clks[i].iodev = iodev;
167*4882a593Smuzhiyun s2mps11_clks[i].hw.init = &s2mps11_clks_init[i];
168*4882a593Smuzhiyun s2mps11_clks[i].mask = 1 << i;
169*4882a593Smuzhiyun s2mps11_clks[i].reg = s2mps11_reg;
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun s2mps11_clks[i].clk = devm_clk_register(&pdev->dev,
172*4882a593Smuzhiyun &s2mps11_clks[i].hw);
173*4882a593Smuzhiyun if (IS_ERR(s2mps11_clks[i].clk)) {
174*4882a593Smuzhiyun dev_err(&pdev->dev, "Fail to register : %s\n",
175*4882a593Smuzhiyun s2mps11_clks_init[i].name);
176*4882a593Smuzhiyun ret = PTR_ERR(s2mps11_clks[i].clk);
177*4882a593Smuzhiyun goto err_reg;
178*4882a593Smuzhiyun }
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun s2mps11_clks[i].lookup = clkdev_hw_create(&s2mps11_clks[i].hw,
181*4882a593Smuzhiyun s2mps11_clks_init[i].name, NULL);
182*4882a593Smuzhiyun if (!s2mps11_clks[i].lookup) {
183*4882a593Smuzhiyun ret = -ENOMEM;
184*4882a593Smuzhiyun goto err_reg;
185*4882a593Smuzhiyun }
186*4882a593Smuzhiyun clk_data->hws[i] = &s2mps11_clks[i].hw;
187*4882a593Smuzhiyun }
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun clk_data->num = S2MPS11_CLKS_NUM;
190*4882a593Smuzhiyun of_clk_add_hw_provider(s2mps11_clks->clk_np, of_clk_hw_onecell_get,
191*4882a593Smuzhiyun clk_data);
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun platform_set_drvdata(pdev, s2mps11_clks);
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun return ret;
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun err_reg:
198*4882a593Smuzhiyun of_node_put(s2mps11_clks[0].clk_np);
199*4882a593Smuzhiyun while (--i >= 0)
200*4882a593Smuzhiyun clkdev_drop(s2mps11_clks[i].lookup);
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun return ret;
203*4882a593Smuzhiyun }
204*4882a593Smuzhiyun
s2mps11_clk_remove(struct platform_device * pdev)205*4882a593Smuzhiyun static int s2mps11_clk_remove(struct platform_device *pdev)
206*4882a593Smuzhiyun {
207*4882a593Smuzhiyun struct s2mps11_clk *s2mps11_clks = platform_get_drvdata(pdev);
208*4882a593Smuzhiyun int i;
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun of_clk_del_provider(s2mps11_clks[0].clk_np);
211*4882a593Smuzhiyun /* Drop the reference obtained in s2mps11_clk_parse_dt */
212*4882a593Smuzhiyun of_node_put(s2mps11_clks[0].clk_np);
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun for (i = 0; i < S2MPS11_CLKS_NUM; i++) {
215*4882a593Smuzhiyun /* Skip clocks not present on S2MPS14 */
216*4882a593Smuzhiyun if (!s2mps11_clks[i].lookup)
217*4882a593Smuzhiyun continue;
218*4882a593Smuzhiyun clkdev_drop(s2mps11_clks[i].lookup);
219*4882a593Smuzhiyun }
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun return 0;
222*4882a593Smuzhiyun }
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun static const struct platform_device_id s2mps11_clk_id[] = {
225*4882a593Smuzhiyun { "s2mps11-clk", S2MPS11X},
226*4882a593Smuzhiyun { "s2mps13-clk", S2MPS13X},
227*4882a593Smuzhiyun { "s2mps14-clk", S2MPS14X},
228*4882a593Smuzhiyun { "s5m8767-clk", S5M8767X},
229*4882a593Smuzhiyun { },
230*4882a593Smuzhiyun };
231*4882a593Smuzhiyun MODULE_DEVICE_TABLE(platform, s2mps11_clk_id);
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun #ifdef CONFIG_OF
234*4882a593Smuzhiyun /*
235*4882a593Smuzhiyun * Device is instantiated through parent MFD device and device matching is done
236*4882a593Smuzhiyun * through platform_device_id.
237*4882a593Smuzhiyun *
238*4882a593Smuzhiyun * However if device's DT node contains proper clock compatible and driver is
239*4882a593Smuzhiyun * built as a module, then the *module* matching will be done trough DT aliases.
240*4882a593Smuzhiyun * This requires of_device_id table. In the same time this will not change the
241*4882a593Smuzhiyun * actual *device* matching so do not add .of_match_table.
242*4882a593Smuzhiyun */
243*4882a593Smuzhiyun static const struct of_device_id s2mps11_dt_match[] __used = {
244*4882a593Smuzhiyun {
245*4882a593Smuzhiyun .compatible = "samsung,s2mps11-clk",
246*4882a593Smuzhiyun .data = (void *)S2MPS11X,
247*4882a593Smuzhiyun }, {
248*4882a593Smuzhiyun .compatible = "samsung,s2mps13-clk",
249*4882a593Smuzhiyun .data = (void *)S2MPS13X,
250*4882a593Smuzhiyun }, {
251*4882a593Smuzhiyun .compatible = "samsung,s2mps14-clk",
252*4882a593Smuzhiyun .data = (void *)S2MPS14X,
253*4882a593Smuzhiyun }, {
254*4882a593Smuzhiyun .compatible = "samsung,s5m8767-clk",
255*4882a593Smuzhiyun .data = (void *)S5M8767X,
256*4882a593Smuzhiyun }, {
257*4882a593Smuzhiyun /* Sentinel */
258*4882a593Smuzhiyun },
259*4882a593Smuzhiyun };
260*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, s2mps11_dt_match);
261*4882a593Smuzhiyun #endif
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun static struct platform_driver s2mps11_clk_driver = {
264*4882a593Smuzhiyun .driver = {
265*4882a593Smuzhiyun .name = "s2mps11-clk",
266*4882a593Smuzhiyun },
267*4882a593Smuzhiyun .probe = s2mps11_clk_probe,
268*4882a593Smuzhiyun .remove = s2mps11_clk_remove,
269*4882a593Smuzhiyun .id_table = s2mps11_clk_id,
270*4882a593Smuzhiyun };
271*4882a593Smuzhiyun module_platform_driver(s2mps11_clk_driver);
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun MODULE_DESCRIPTION("S2MPS11 Clock Driver");
274*4882a593Smuzhiyun MODULE_AUTHOR("Yadwinder Singh Brar <yadi.brar@samsung.com>");
275*4882a593Smuzhiyun MODULE_LICENSE("GPL");
276