xref: /OK3568_Linux_fs/kernel/drivers/clk/clk-fixed-rate.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
4*4882a593Smuzhiyun  * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * Fixed rate clock implementation
7*4882a593Smuzhiyun  */
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #include <linux/clk-provider.h>
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/slab.h>
12*4882a593Smuzhiyun #include <linux/io.h>
13*4882a593Smuzhiyun #include <linux/err.h>
14*4882a593Smuzhiyun #include <linux/of.h>
15*4882a593Smuzhiyun #include <linux/platform_device.h>
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun /*
18*4882a593Smuzhiyun  * DOC: basic fixed-rate clock that cannot gate
19*4882a593Smuzhiyun  *
20*4882a593Smuzhiyun  * Traits of this clock:
21*4882a593Smuzhiyun  * prepare - clk_(un)prepare only ensures parents are prepared
22*4882a593Smuzhiyun  * enable - clk_enable only ensures parents are enabled
23*4882a593Smuzhiyun  * rate - rate is always a fixed value.  No clk_set_rate support
24*4882a593Smuzhiyun  * parent - fixed parent.  No clk_set_parent support
25*4882a593Smuzhiyun  */
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun #define to_clk_fixed_rate(_hw) container_of(_hw, struct clk_fixed_rate, hw)
28*4882a593Smuzhiyun 
clk_fixed_rate_recalc_rate(struct clk_hw * hw,unsigned long parent_rate)29*4882a593Smuzhiyun static unsigned long clk_fixed_rate_recalc_rate(struct clk_hw *hw,
30*4882a593Smuzhiyun 		unsigned long parent_rate)
31*4882a593Smuzhiyun {
32*4882a593Smuzhiyun 	return to_clk_fixed_rate(hw)->fixed_rate;
33*4882a593Smuzhiyun }
34*4882a593Smuzhiyun 
clk_fixed_rate_recalc_accuracy(struct clk_hw * hw,unsigned long parent_accuracy)35*4882a593Smuzhiyun static unsigned long clk_fixed_rate_recalc_accuracy(struct clk_hw *hw,
36*4882a593Smuzhiyun 		unsigned long parent_accuracy)
37*4882a593Smuzhiyun {
38*4882a593Smuzhiyun 	struct clk_fixed_rate *fixed = to_clk_fixed_rate(hw);
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun 	if (fixed->flags & CLK_FIXED_RATE_PARENT_ACCURACY)
41*4882a593Smuzhiyun 		return parent_accuracy;
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun 	return fixed->fixed_accuracy;
44*4882a593Smuzhiyun }
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun const struct clk_ops clk_fixed_rate_ops = {
47*4882a593Smuzhiyun 	.recalc_rate = clk_fixed_rate_recalc_rate,
48*4882a593Smuzhiyun 	.recalc_accuracy = clk_fixed_rate_recalc_accuracy,
49*4882a593Smuzhiyun };
50*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(clk_fixed_rate_ops);
51*4882a593Smuzhiyun 
__clk_hw_register_fixed_rate(struct device * dev,struct device_node * np,const char * name,const char * parent_name,const struct clk_hw * parent_hw,const struct clk_parent_data * parent_data,unsigned long flags,unsigned long fixed_rate,unsigned long fixed_accuracy,unsigned long clk_fixed_flags)52*4882a593Smuzhiyun struct clk_hw *__clk_hw_register_fixed_rate(struct device *dev,
53*4882a593Smuzhiyun 		struct device_node *np, const char *name,
54*4882a593Smuzhiyun 		const char *parent_name, const struct clk_hw *parent_hw,
55*4882a593Smuzhiyun 		const struct clk_parent_data *parent_data, unsigned long flags,
56*4882a593Smuzhiyun 		unsigned long fixed_rate, unsigned long fixed_accuracy,
57*4882a593Smuzhiyun 		unsigned long clk_fixed_flags)
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun 	struct clk_fixed_rate *fixed;
60*4882a593Smuzhiyun 	struct clk_hw *hw;
61*4882a593Smuzhiyun 	struct clk_init_data init = {};
62*4882a593Smuzhiyun 	int ret = -EINVAL;
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun 	/* allocate fixed-rate clock */
65*4882a593Smuzhiyun 	fixed = kzalloc(sizeof(*fixed), GFP_KERNEL);
66*4882a593Smuzhiyun 	if (!fixed)
67*4882a593Smuzhiyun 		return ERR_PTR(-ENOMEM);
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun 	init.name = name;
70*4882a593Smuzhiyun 	init.ops = &clk_fixed_rate_ops;
71*4882a593Smuzhiyun 	init.flags = flags;
72*4882a593Smuzhiyun 	init.parent_names = parent_name ? &parent_name : NULL;
73*4882a593Smuzhiyun 	init.parent_hws = parent_hw ? &parent_hw : NULL;
74*4882a593Smuzhiyun 	init.parent_data = parent_data;
75*4882a593Smuzhiyun 	if (parent_name || parent_hw || parent_data)
76*4882a593Smuzhiyun 		init.num_parents = 1;
77*4882a593Smuzhiyun 	else
78*4882a593Smuzhiyun 		init.num_parents = 0;
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun 	/* struct clk_fixed_rate assignments */
81*4882a593Smuzhiyun 	fixed->flags = clk_fixed_flags;
82*4882a593Smuzhiyun 	fixed->fixed_rate = fixed_rate;
83*4882a593Smuzhiyun 	fixed->fixed_accuracy = fixed_accuracy;
84*4882a593Smuzhiyun 	fixed->hw.init = &init;
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun 	/* register the clock */
87*4882a593Smuzhiyun 	hw = &fixed->hw;
88*4882a593Smuzhiyun 	if (dev || !np)
89*4882a593Smuzhiyun 		ret = clk_hw_register(dev, hw);
90*4882a593Smuzhiyun 	else if (np)
91*4882a593Smuzhiyun 		ret = of_clk_hw_register(np, hw);
92*4882a593Smuzhiyun 	if (ret) {
93*4882a593Smuzhiyun 		kfree(fixed);
94*4882a593Smuzhiyun 		hw = ERR_PTR(ret);
95*4882a593Smuzhiyun 	}
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun 	return hw;
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(__clk_hw_register_fixed_rate);
100*4882a593Smuzhiyun 
clk_register_fixed_rate(struct device * dev,const char * name,const char * parent_name,unsigned long flags,unsigned long fixed_rate)101*4882a593Smuzhiyun struct clk *clk_register_fixed_rate(struct device *dev, const char *name,
102*4882a593Smuzhiyun 		const char *parent_name, unsigned long flags,
103*4882a593Smuzhiyun 		unsigned long fixed_rate)
104*4882a593Smuzhiyun {
105*4882a593Smuzhiyun 	struct clk_hw *hw;
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun 	hw = clk_hw_register_fixed_rate_with_accuracy(dev, name, parent_name,
108*4882a593Smuzhiyun 						      flags, fixed_rate, 0);
109*4882a593Smuzhiyun 	if (IS_ERR(hw))
110*4882a593Smuzhiyun 		return ERR_CAST(hw);
111*4882a593Smuzhiyun 	return hw->clk;
112*4882a593Smuzhiyun }
113*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(clk_register_fixed_rate);
114*4882a593Smuzhiyun 
clk_unregister_fixed_rate(struct clk * clk)115*4882a593Smuzhiyun void clk_unregister_fixed_rate(struct clk *clk)
116*4882a593Smuzhiyun {
117*4882a593Smuzhiyun 	struct clk_hw *hw;
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun 	hw = __clk_get_hw(clk);
120*4882a593Smuzhiyun 	if (!hw)
121*4882a593Smuzhiyun 		return;
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun 	clk_unregister(clk);
124*4882a593Smuzhiyun 	kfree(to_clk_fixed_rate(hw));
125*4882a593Smuzhiyun }
126*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(clk_unregister_fixed_rate);
127*4882a593Smuzhiyun 
clk_hw_unregister_fixed_rate(struct clk_hw * hw)128*4882a593Smuzhiyun void clk_hw_unregister_fixed_rate(struct clk_hw *hw)
129*4882a593Smuzhiyun {
130*4882a593Smuzhiyun 	struct clk_fixed_rate *fixed;
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun 	fixed = to_clk_fixed_rate(hw);
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun 	clk_hw_unregister(hw);
135*4882a593Smuzhiyun 	kfree(fixed);
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(clk_hw_unregister_fixed_rate);
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun #ifdef CONFIG_OF
_of_fixed_clk_setup(struct device_node * node)140*4882a593Smuzhiyun static struct clk_hw *_of_fixed_clk_setup(struct device_node *node)
141*4882a593Smuzhiyun {
142*4882a593Smuzhiyun 	struct clk_hw *hw;
143*4882a593Smuzhiyun 	const char *clk_name = node->name;
144*4882a593Smuzhiyun 	u32 rate;
145*4882a593Smuzhiyun 	u32 accuracy = 0;
146*4882a593Smuzhiyun 	int ret;
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun 	if (of_property_read_u32(node, "clock-frequency", &rate))
149*4882a593Smuzhiyun 		return ERR_PTR(-EIO);
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun 	of_property_read_u32(node, "clock-accuracy", &accuracy);
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun 	of_property_read_string(node, "clock-output-names", &clk_name);
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun 	hw = clk_hw_register_fixed_rate_with_accuracy(NULL, clk_name, NULL,
156*4882a593Smuzhiyun 						    0, rate, accuracy);
157*4882a593Smuzhiyun 	if (IS_ERR(hw))
158*4882a593Smuzhiyun 		return hw;
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun 	ret = of_clk_add_hw_provider(node, of_clk_hw_simple_get, hw);
161*4882a593Smuzhiyun 	if (ret) {
162*4882a593Smuzhiyun 		clk_hw_unregister_fixed_rate(hw);
163*4882a593Smuzhiyun 		return ERR_PTR(ret);
164*4882a593Smuzhiyun 	}
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun 	return hw;
167*4882a593Smuzhiyun }
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun /**
170*4882a593Smuzhiyun  * of_fixed_clk_setup() - Setup function for simple fixed rate clock
171*4882a593Smuzhiyun  * @node:	device node for the clock
172*4882a593Smuzhiyun  */
of_fixed_clk_setup(struct device_node * node)173*4882a593Smuzhiyun void __init of_fixed_clk_setup(struct device_node *node)
174*4882a593Smuzhiyun {
175*4882a593Smuzhiyun 	_of_fixed_clk_setup(node);
176*4882a593Smuzhiyun }
177*4882a593Smuzhiyun CLK_OF_DECLARE(fixed_clk, "fixed-clock", of_fixed_clk_setup);
178*4882a593Smuzhiyun 
of_fixed_clk_remove(struct platform_device * pdev)179*4882a593Smuzhiyun static int of_fixed_clk_remove(struct platform_device *pdev)
180*4882a593Smuzhiyun {
181*4882a593Smuzhiyun 	struct clk_hw *hw = platform_get_drvdata(pdev);
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun 	of_clk_del_provider(pdev->dev.of_node);
184*4882a593Smuzhiyun 	clk_hw_unregister_fixed_rate(hw);
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun 	return 0;
187*4882a593Smuzhiyun }
188*4882a593Smuzhiyun 
of_fixed_clk_probe(struct platform_device * pdev)189*4882a593Smuzhiyun static int of_fixed_clk_probe(struct platform_device *pdev)
190*4882a593Smuzhiyun {
191*4882a593Smuzhiyun 	struct clk_hw *hw;
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun 	/*
194*4882a593Smuzhiyun 	 * This function is not executed when of_fixed_clk_setup
195*4882a593Smuzhiyun 	 * succeeded.
196*4882a593Smuzhiyun 	 */
197*4882a593Smuzhiyun 	hw = _of_fixed_clk_setup(pdev->dev.of_node);
198*4882a593Smuzhiyun 	if (IS_ERR(hw))
199*4882a593Smuzhiyun 		return PTR_ERR(hw);
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun 	platform_set_drvdata(pdev, hw);
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun 	return 0;
204*4882a593Smuzhiyun }
205*4882a593Smuzhiyun 
206*4882a593Smuzhiyun static const struct of_device_id of_fixed_clk_ids[] = {
207*4882a593Smuzhiyun 	{ .compatible = "fixed-clock" },
208*4882a593Smuzhiyun 	{ }
209*4882a593Smuzhiyun };
210*4882a593Smuzhiyun 
211*4882a593Smuzhiyun static struct platform_driver of_fixed_clk_driver = {
212*4882a593Smuzhiyun 	.driver = {
213*4882a593Smuzhiyun 		.name = "of_fixed_clk",
214*4882a593Smuzhiyun 		.of_match_table = of_fixed_clk_ids,
215*4882a593Smuzhiyun 	},
216*4882a593Smuzhiyun 	.probe = of_fixed_clk_probe,
217*4882a593Smuzhiyun 	.remove = of_fixed_clk_remove,
218*4882a593Smuzhiyun };
219*4882a593Smuzhiyun builtin_platform_driver(of_fixed_clk_driver);
220*4882a593Smuzhiyun #endif
221