xref: /OK3568_Linux_fs/kernel/drivers/clk/clk-fixed-factor.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (C) 2011 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
4*4882a593Smuzhiyun  */
5*4882a593Smuzhiyun #include <linux/module.h>
6*4882a593Smuzhiyun #include <linux/clk-provider.h>
7*4882a593Smuzhiyun #include <linux/slab.h>
8*4882a593Smuzhiyun #include <linux/err.h>
9*4882a593Smuzhiyun #include <linux/of.h>
10*4882a593Smuzhiyun #include <linux/platform_device.h>
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun /*
13*4882a593Smuzhiyun  * DOC: basic fixed multiplier and divider clock that cannot gate
14*4882a593Smuzhiyun  *
15*4882a593Smuzhiyun  * Traits of this clock:
16*4882a593Smuzhiyun  * prepare - clk_prepare only ensures that parents are prepared
17*4882a593Smuzhiyun  * enable - clk_enable only ensures that parents are enabled
18*4882a593Smuzhiyun  * rate - rate is fixed.  clk->rate = parent->rate / div * mult
19*4882a593Smuzhiyun  * parent - fixed parent.  No clk_set_parent support
20*4882a593Smuzhiyun  */
21*4882a593Smuzhiyun 
clk_factor_recalc_rate(struct clk_hw * hw,unsigned long parent_rate)22*4882a593Smuzhiyun static unsigned long clk_factor_recalc_rate(struct clk_hw *hw,
23*4882a593Smuzhiyun 		unsigned long parent_rate)
24*4882a593Smuzhiyun {
25*4882a593Smuzhiyun 	struct clk_fixed_factor *fix = to_clk_fixed_factor(hw);
26*4882a593Smuzhiyun 	unsigned long long int rate;
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun 	rate = (unsigned long long int)parent_rate * fix->mult;
29*4882a593Smuzhiyun 	do_div(rate, fix->div);
30*4882a593Smuzhiyun 	return (unsigned long)rate;
31*4882a593Smuzhiyun }
32*4882a593Smuzhiyun 
clk_factor_round_rate(struct clk_hw * hw,unsigned long rate,unsigned long * prate)33*4882a593Smuzhiyun static long clk_factor_round_rate(struct clk_hw *hw, unsigned long rate,
34*4882a593Smuzhiyun 				unsigned long *prate)
35*4882a593Smuzhiyun {
36*4882a593Smuzhiyun 	struct clk_fixed_factor *fix = to_clk_fixed_factor(hw);
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun 	if (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) {
39*4882a593Smuzhiyun 		unsigned long best_parent;
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun 		best_parent = (rate / fix->mult) * fix->div;
42*4882a593Smuzhiyun 		*prate = clk_hw_round_rate(clk_hw_get_parent(hw), best_parent);
43*4882a593Smuzhiyun 	}
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun 	return (*prate / fix->div) * fix->mult;
46*4882a593Smuzhiyun }
47*4882a593Smuzhiyun 
clk_factor_set_rate(struct clk_hw * hw,unsigned long rate,unsigned long parent_rate)48*4882a593Smuzhiyun static int clk_factor_set_rate(struct clk_hw *hw, unsigned long rate,
49*4882a593Smuzhiyun 				unsigned long parent_rate)
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun 	/*
52*4882a593Smuzhiyun 	 * We must report success but we can do so unconditionally because
53*4882a593Smuzhiyun 	 * clk_factor_round_rate returns values that ensure this call is a
54*4882a593Smuzhiyun 	 * nop.
55*4882a593Smuzhiyun 	 */
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun 	return 0;
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun const struct clk_ops clk_fixed_factor_ops = {
61*4882a593Smuzhiyun 	.round_rate = clk_factor_round_rate,
62*4882a593Smuzhiyun 	.set_rate = clk_factor_set_rate,
63*4882a593Smuzhiyun 	.recalc_rate = clk_factor_recalc_rate,
64*4882a593Smuzhiyun };
65*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(clk_fixed_factor_ops);
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun static struct clk_hw *
__clk_hw_register_fixed_factor(struct device * dev,struct device_node * np,const char * name,const char * parent_name,int index,unsigned long flags,unsigned int mult,unsigned int div)68*4882a593Smuzhiyun __clk_hw_register_fixed_factor(struct device *dev, struct device_node *np,
69*4882a593Smuzhiyun 		const char *name, const char *parent_name, int index,
70*4882a593Smuzhiyun 		unsigned long flags, unsigned int mult, unsigned int div)
71*4882a593Smuzhiyun {
72*4882a593Smuzhiyun 	struct clk_fixed_factor *fix;
73*4882a593Smuzhiyun 	struct clk_init_data init = { };
74*4882a593Smuzhiyun 	struct clk_parent_data pdata = { .index = index };
75*4882a593Smuzhiyun 	struct clk_hw *hw;
76*4882a593Smuzhiyun 	int ret;
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun 	fix = kmalloc(sizeof(*fix), GFP_KERNEL);
79*4882a593Smuzhiyun 	if (!fix)
80*4882a593Smuzhiyun 		return ERR_PTR(-ENOMEM);
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun 	/* struct clk_fixed_factor assignments */
83*4882a593Smuzhiyun 	fix->mult = mult;
84*4882a593Smuzhiyun 	fix->div = div;
85*4882a593Smuzhiyun 	fix->hw.init = &init;
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun 	init.name = name;
88*4882a593Smuzhiyun 	init.ops = &clk_fixed_factor_ops;
89*4882a593Smuzhiyun 	init.flags = flags;
90*4882a593Smuzhiyun 	if (parent_name)
91*4882a593Smuzhiyun 		init.parent_names = &parent_name;
92*4882a593Smuzhiyun 	else
93*4882a593Smuzhiyun 		init.parent_data = &pdata;
94*4882a593Smuzhiyun 	init.num_parents = 1;
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun 	hw = &fix->hw;
97*4882a593Smuzhiyun 	if (dev)
98*4882a593Smuzhiyun 		ret = clk_hw_register(dev, hw);
99*4882a593Smuzhiyun 	else
100*4882a593Smuzhiyun 		ret = of_clk_hw_register(np, hw);
101*4882a593Smuzhiyun 	if (ret) {
102*4882a593Smuzhiyun 		kfree(fix);
103*4882a593Smuzhiyun 		hw = ERR_PTR(ret);
104*4882a593Smuzhiyun 	}
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun 	return hw;
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun 
clk_hw_register_fixed_factor(struct device * dev,const char * name,const char * parent_name,unsigned long flags,unsigned int mult,unsigned int div)109*4882a593Smuzhiyun struct clk_hw *clk_hw_register_fixed_factor(struct device *dev,
110*4882a593Smuzhiyun 		const char *name, const char *parent_name, unsigned long flags,
111*4882a593Smuzhiyun 		unsigned int mult, unsigned int div)
112*4882a593Smuzhiyun {
113*4882a593Smuzhiyun 	return __clk_hw_register_fixed_factor(dev, NULL, name, parent_name, -1,
114*4882a593Smuzhiyun 					      flags, mult, div);
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(clk_hw_register_fixed_factor);
117*4882a593Smuzhiyun 
clk_register_fixed_factor(struct device * dev,const char * name,const char * parent_name,unsigned long flags,unsigned int mult,unsigned int div)118*4882a593Smuzhiyun struct clk *clk_register_fixed_factor(struct device *dev, const char *name,
119*4882a593Smuzhiyun 		const char *parent_name, unsigned long flags,
120*4882a593Smuzhiyun 		unsigned int mult, unsigned int div)
121*4882a593Smuzhiyun {
122*4882a593Smuzhiyun 	struct clk_hw *hw;
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun 	hw = clk_hw_register_fixed_factor(dev, name, parent_name, flags, mult,
125*4882a593Smuzhiyun 					  div);
126*4882a593Smuzhiyun 	if (IS_ERR(hw))
127*4882a593Smuzhiyun 		return ERR_CAST(hw);
128*4882a593Smuzhiyun 	return hw->clk;
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(clk_register_fixed_factor);
131*4882a593Smuzhiyun 
clk_unregister_fixed_factor(struct clk * clk)132*4882a593Smuzhiyun void clk_unregister_fixed_factor(struct clk *clk)
133*4882a593Smuzhiyun {
134*4882a593Smuzhiyun 	struct clk_hw *hw;
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun 	hw = __clk_get_hw(clk);
137*4882a593Smuzhiyun 	if (!hw)
138*4882a593Smuzhiyun 		return;
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 	clk_unregister(clk);
141*4882a593Smuzhiyun 	kfree(to_clk_fixed_factor(hw));
142*4882a593Smuzhiyun }
143*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(clk_unregister_fixed_factor);
144*4882a593Smuzhiyun 
clk_hw_unregister_fixed_factor(struct clk_hw * hw)145*4882a593Smuzhiyun void clk_hw_unregister_fixed_factor(struct clk_hw *hw)
146*4882a593Smuzhiyun {
147*4882a593Smuzhiyun 	struct clk_fixed_factor *fix;
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun 	fix = to_clk_fixed_factor(hw);
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun 	clk_hw_unregister(hw);
152*4882a593Smuzhiyun 	kfree(fix);
153*4882a593Smuzhiyun }
154*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(clk_hw_unregister_fixed_factor);
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun #ifdef CONFIG_OF
157*4882a593Smuzhiyun static const struct of_device_id set_rate_parent_matches[] = {
158*4882a593Smuzhiyun 	{ .compatible = "allwinner,sun4i-a10-pll3-2x-clk" },
159*4882a593Smuzhiyun 	{ /* Sentinel */ },
160*4882a593Smuzhiyun };
161*4882a593Smuzhiyun 
_of_fixed_factor_clk_setup(struct device_node * node)162*4882a593Smuzhiyun static struct clk_hw *_of_fixed_factor_clk_setup(struct device_node *node)
163*4882a593Smuzhiyun {
164*4882a593Smuzhiyun 	struct clk_hw *hw;
165*4882a593Smuzhiyun 	const char *clk_name = node->name;
166*4882a593Smuzhiyun 	unsigned long flags = 0;
167*4882a593Smuzhiyun 	u32 div, mult;
168*4882a593Smuzhiyun 	int ret;
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun 	if (of_property_read_u32(node, "clock-div", &div)) {
171*4882a593Smuzhiyun 		pr_err("%s Fixed factor clock <%pOFn> must have a clock-div property\n",
172*4882a593Smuzhiyun 			__func__, node);
173*4882a593Smuzhiyun 		return ERR_PTR(-EIO);
174*4882a593Smuzhiyun 	}
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun 	if (of_property_read_u32(node, "clock-mult", &mult)) {
177*4882a593Smuzhiyun 		pr_err("%s Fixed factor clock <%pOFn> must have a clock-mult property\n",
178*4882a593Smuzhiyun 			__func__, node);
179*4882a593Smuzhiyun 		return ERR_PTR(-EIO);
180*4882a593Smuzhiyun 	}
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun 	of_property_read_string(node, "clock-output-names", &clk_name);
183*4882a593Smuzhiyun 
184*4882a593Smuzhiyun 	if (of_match_node(set_rate_parent_matches, node))
185*4882a593Smuzhiyun 		flags |= CLK_SET_RATE_PARENT;
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun 	hw = __clk_hw_register_fixed_factor(NULL, node, clk_name, NULL, 0,
188*4882a593Smuzhiyun 					    flags, mult, div);
189*4882a593Smuzhiyun 	if (IS_ERR(hw)) {
190*4882a593Smuzhiyun 		/*
191*4882a593Smuzhiyun 		 * Clear OF_POPULATED flag so that clock registration can be
192*4882a593Smuzhiyun 		 * attempted again from probe function.
193*4882a593Smuzhiyun 		 */
194*4882a593Smuzhiyun 		of_node_clear_flag(node, OF_POPULATED);
195*4882a593Smuzhiyun 		return ERR_CAST(hw);
196*4882a593Smuzhiyun 	}
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun 	ret = of_clk_add_hw_provider(node, of_clk_hw_simple_get, hw);
199*4882a593Smuzhiyun 	if (ret) {
200*4882a593Smuzhiyun 		clk_hw_unregister_fixed_factor(hw);
201*4882a593Smuzhiyun 		return ERR_PTR(ret);
202*4882a593Smuzhiyun 	}
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun 	return hw;
205*4882a593Smuzhiyun }
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun /**
208*4882a593Smuzhiyun  * of_fixed_factor_clk_setup() - Setup function for simple fixed factor clock
209*4882a593Smuzhiyun  * @node:	device node for the clock
210*4882a593Smuzhiyun  */
of_fixed_factor_clk_setup(struct device_node * node)211*4882a593Smuzhiyun void __init of_fixed_factor_clk_setup(struct device_node *node)
212*4882a593Smuzhiyun {
213*4882a593Smuzhiyun 	_of_fixed_factor_clk_setup(node);
214*4882a593Smuzhiyun }
215*4882a593Smuzhiyun CLK_OF_DECLARE(fixed_factor_clk, "fixed-factor-clock",
216*4882a593Smuzhiyun 		of_fixed_factor_clk_setup);
217*4882a593Smuzhiyun 
of_fixed_factor_clk_remove(struct platform_device * pdev)218*4882a593Smuzhiyun static int of_fixed_factor_clk_remove(struct platform_device *pdev)
219*4882a593Smuzhiyun {
220*4882a593Smuzhiyun 	struct clk_hw *clk = platform_get_drvdata(pdev);
221*4882a593Smuzhiyun 
222*4882a593Smuzhiyun 	of_clk_del_provider(pdev->dev.of_node);
223*4882a593Smuzhiyun 	clk_hw_unregister_fixed_factor(clk);
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun 	return 0;
226*4882a593Smuzhiyun }
227*4882a593Smuzhiyun 
of_fixed_factor_clk_probe(struct platform_device * pdev)228*4882a593Smuzhiyun static int of_fixed_factor_clk_probe(struct platform_device *pdev)
229*4882a593Smuzhiyun {
230*4882a593Smuzhiyun 	struct clk_hw *clk;
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun 	/*
233*4882a593Smuzhiyun 	 * This function is not executed when of_fixed_factor_clk_setup
234*4882a593Smuzhiyun 	 * succeeded.
235*4882a593Smuzhiyun 	 */
236*4882a593Smuzhiyun 	clk = _of_fixed_factor_clk_setup(pdev->dev.of_node);
237*4882a593Smuzhiyun 	if (IS_ERR(clk))
238*4882a593Smuzhiyun 		return PTR_ERR(clk);
239*4882a593Smuzhiyun 
240*4882a593Smuzhiyun 	platform_set_drvdata(pdev, clk);
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun 	return 0;
243*4882a593Smuzhiyun }
244*4882a593Smuzhiyun 
245*4882a593Smuzhiyun static const struct of_device_id of_fixed_factor_clk_ids[] = {
246*4882a593Smuzhiyun 	{ .compatible = "fixed-factor-clock" },
247*4882a593Smuzhiyun 	{ }
248*4882a593Smuzhiyun };
249*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, of_fixed_factor_clk_ids);
250*4882a593Smuzhiyun 
251*4882a593Smuzhiyun static struct platform_driver of_fixed_factor_clk_driver = {
252*4882a593Smuzhiyun 	.driver = {
253*4882a593Smuzhiyun 		.name = "of_fixed_factor_clk",
254*4882a593Smuzhiyun 		.of_match_table = of_fixed_factor_clk_ids,
255*4882a593Smuzhiyun 	},
256*4882a593Smuzhiyun 	.probe = of_fixed_factor_clk_probe,
257*4882a593Smuzhiyun 	.remove = of_fixed_factor_clk_remove,
258*4882a593Smuzhiyun };
259*4882a593Smuzhiyun builtin_platform_driver(of_fixed_factor_clk_driver);
260*4882a593Smuzhiyun #endif
261