xref: /OK3568_Linux_fs/kernel/drivers/clk/bcm/clk-raspberrypi.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Raspberry Pi driver for firmware controlled clocks
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Even though clk-bcm2835 provides an interface to the hardware registers for
6*4882a593Smuzhiyun  * the system clocks we've had to factor out 'pllb' as the firmware 'owns' it.
7*4882a593Smuzhiyun  * We're not allowed to change it directly as we might race with the
8*4882a593Smuzhiyun  * over-temperature and under-voltage protections provided by the firmware.
9*4882a593Smuzhiyun  *
10*4882a593Smuzhiyun  * Copyright (C) 2019 Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
11*4882a593Smuzhiyun  */
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #include <linux/clkdev.h>
14*4882a593Smuzhiyun #include <linux/clk-provider.h>
15*4882a593Smuzhiyun #include <linux/io.h>
16*4882a593Smuzhiyun #include <linux/module.h>
17*4882a593Smuzhiyun #include <linux/platform_device.h>
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #include <soc/bcm2835/raspberrypi-firmware.h>
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun enum rpi_firmware_clk_id {
22*4882a593Smuzhiyun 	RPI_FIRMWARE_EMMC_CLK_ID = 1,
23*4882a593Smuzhiyun 	RPI_FIRMWARE_UART_CLK_ID,
24*4882a593Smuzhiyun 	RPI_FIRMWARE_ARM_CLK_ID,
25*4882a593Smuzhiyun 	RPI_FIRMWARE_CORE_CLK_ID,
26*4882a593Smuzhiyun 	RPI_FIRMWARE_V3D_CLK_ID,
27*4882a593Smuzhiyun 	RPI_FIRMWARE_H264_CLK_ID,
28*4882a593Smuzhiyun 	RPI_FIRMWARE_ISP_CLK_ID,
29*4882a593Smuzhiyun 	RPI_FIRMWARE_SDRAM_CLK_ID,
30*4882a593Smuzhiyun 	RPI_FIRMWARE_PIXEL_CLK_ID,
31*4882a593Smuzhiyun 	RPI_FIRMWARE_PWM_CLK_ID,
32*4882a593Smuzhiyun 	RPI_FIRMWARE_HEVC_CLK_ID,
33*4882a593Smuzhiyun 	RPI_FIRMWARE_EMMC2_CLK_ID,
34*4882a593Smuzhiyun 	RPI_FIRMWARE_M2MC_CLK_ID,
35*4882a593Smuzhiyun 	RPI_FIRMWARE_PIXEL_BVB_CLK_ID,
36*4882a593Smuzhiyun 	RPI_FIRMWARE_NUM_CLK_ID,
37*4882a593Smuzhiyun };
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun static char *rpi_firmware_clk_names[] = {
40*4882a593Smuzhiyun 	[RPI_FIRMWARE_EMMC_CLK_ID]	= "emmc",
41*4882a593Smuzhiyun 	[RPI_FIRMWARE_UART_CLK_ID]	= "uart",
42*4882a593Smuzhiyun 	[RPI_FIRMWARE_ARM_CLK_ID]	= "arm",
43*4882a593Smuzhiyun 	[RPI_FIRMWARE_CORE_CLK_ID]	= "core",
44*4882a593Smuzhiyun 	[RPI_FIRMWARE_V3D_CLK_ID]	= "v3d",
45*4882a593Smuzhiyun 	[RPI_FIRMWARE_H264_CLK_ID]	= "h264",
46*4882a593Smuzhiyun 	[RPI_FIRMWARE_ISP_CLK_ID]	= "isp",
47*4882a593Smuzhiyun 	[RPI_FIRMWARE_SDRAM_CLK_ID]	= "sdram",
48*4882a593Smuzhiyun 	[RPI_FIRMWARE_PIXEL_CLK_ID]	= "pixel",
49*4882a593Smuzhiyun 	[RPI_FIRMWARE_PWM_CLK_ID]	= "pwm",
50*4882a593Smuzhiyun 	[RPI_FIRMWARE_HEVC_CLK_ID]	= "hevc",
51*4882a593Smuzhiyun 	[RPI_FIRMWARE_EMMC2_CLK_ID]	= "emmc2",
52*4882a593Smuzhiyun 	[RPI_FIRMWARE_M2MC_CLK_ID]	= "m2mc",
53*4882a593Smuzhiyun 	[RPI_FIRMWARE_PIXEL_BVB_CLK_ID]	= "pixel-bvb",
54*4882a593Smuzhiyun };
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun #define RPI_FIRMWARE_STATE_ENABLE_BIT	BIT(0)
57*4882a593Smuzhiyun #define RPI_FIRMWARE_STATE_WAIT_BIT	BIT(1)
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun struct raspberrypi_clk {
60*4882a593Smuzhiyun 	struct device *dev;
61*4882a593Smuzhiyun 	struct rpi_firmware *firmware;
62*4882a593Smuzhiyun 	struct platform_device *cpufreq;
63*4882a593Smuzhiyun };
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun struct raspberrypi_clk_data {
66*4882a593Smuzhiyun 	struct clk_hw hw;
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun 	unsigned int id;
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun 	struct raspberrypi_clk *rpi;
71*4882a593Smuzhiyun };
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun /*
74*4882a593Smuzhiyun  * Structure of the message passed to Raspberry Pi's firmware in order to
75*4882a593Smuzhiyun  * change clock rates. The 'disable_turbo' option is only available to the ARM
76*4882a593Smuzhiyun  * clock (pllb) which we enable by default as turbo mode will alter multiple
77*4882a593Smuzhiyun  * clocks at once.
78*4882a593Smuzhiyun  *
79*4882a593Smuzhiyun  * Even though we're able to access the clock registers directly we're bound to
80*4882a593Smuzhiyun  * use the firmware interface as the firmware ultimately takes care of
81*4882a593Smuzhiyun  * mitigating overheating/undervoltage situations and we would be changing
82*4882a593Smuzhiyun  * frequencies behind his back.
83*4882a593Smuzhiyun  *
84*4882a593Smuzhiyun  * For more information on the firmware interface check:
85*4882a593Smuzhiyun  * https://github.com/raspberrypi/firmware/wiki/Mailbox-property-interface
86*4882a593Smuzhiyun  */
87*4882a593Smuzhiyun struct raspberrypi_firmware_prop {
88*4882a593Smuzhiyun 	__le32 id;
89*4882a593Smuzhiyun 	__le32 val;
90*4882a593Smuzhiyun 	__le32 disable_turbo;
91*4882a593Smuzhiyun } __packed;
92*4882a593Smuzhiyun 
raspberrypi_clock_property(struct rpi_firmware * firmware,const struct raspberrypi_clk_data * data,u32 tag,u32 * val)93*4882a593Smuzhiyun static int raspberrypi_clock_property(struct rpi_firmware *firmware,
94*4882a593Smuzhiyun 				      const struct raspberrypi_clk_data *data,
95*4882a593Smuzhiyun 				      u32 tag, u32 *val)
96*4882a593Smuzhiyun {
97*4882a593Smuzhiyun 	struct raspberrypi_firmware_prop msg = {
98*4882a593Smuzhiyun 		.id = cpu_to_le32(data->id),
99*4882a593Smuzhiyun 		.val = cpu_to_le32(*val),
100*4882a593Smuzhiyun 		.disable_turbo = cpu_to_le32(1),
101*4882a593Smuzhiyun 	};
102*4882a593Smuzhiyun 	int ret;
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun 	ret = rpi_firmware_property(firmware, tag, &msg, sizeof(msg));
105*4882a593Smuzhiyun 	if (ret)
106*4882a593Smuzhiyun 		return ret;
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun 	*val = le32_to_cpu(msg.val);
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun 	return 0;
111*4882a593Smuzhiyun }
112*4882a593Smuzhiyun 
raspberrypi_fw_is_prepared(struct clk_hw * hw)113*4882a593Smuzhiyun static int raspberrypi_fw_is_prepared(struct clk_hw *hw)
114*4882a593Smuzhiyun {
115*4882a593Smuzhiyun 	struct raspberrypi_clk_data *data =
116*4882a593Smuzhiyun 		container_of(hw, struct raspberrypi_clk_data, hw);
117*4882a593Smuzhiyun 	struct raspberrypi_clk *rpi = data->rpi;
118*4882a593Smuzhiyun 	u32 val = 0;
119*4882a593Smuzhiyun 	int ret;
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun 	ret = raspberrypi_clock_property(rpi->firmware, data,
122*4882a593Smuzhiyun 					 RPI_FIRMWARE_GET_CLOCK_STATE, &val);
123*4882a593Smuzhiyun 	if (ret)
124*4882a593Smuzhiyun 		return 0;
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun 	return !!(val & RPI_FIRMWARE_STATE_ENABLE_BIT);
127*4882a593Smuzhiyun }
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun 
raspberrypi_fw_get_rate(struct clk_hw * hw,unsigned long parent_rate)130*4882a593Smuzhiyun static unsigned long raspberrypi_fw_get_rate(struct clk_hw *hw,
131*4882a593Smuzhiyun 					     unsigned long parent_rate)
132*4882a593Smuzhiyun {
133*4882a593Smuzhiyun 	struct raspberrypi_clk_data *data =
134*4882a593Smuzhiyun 		container_of(hw, struct raspberrypi_clk_data, hw);
135*4882a593Smuzhiyun 	struct raspberrypi_clk *rpi = data->rpi;
136*4882a593Smuzhiyun 	u32 val = 0;
137*4882a593Smuzhiyun 	int ret;
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun 	ret = raspberrypi_clock_property(rpi->firmware, data,
140*4882a593Smuzhiyun 					 RPI_FIRMWARE_GET_CLOCK_RATE, &val);
141*4882a593Smuzhiyun 	if (ret)
142*4882a593Smuzhiyun 		return 0;
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 	return val;
145*4882a593Smuzhiyun }
146*4882a593Smuzhiyun 
raspberrypi_fw_set_rate(struct clk_hw * hw,unsigned long rate,unsigned long parent_rate)147*4882a593Smuzhiyun static int raspberrypi_fw_set_rate(struct clk_hw *hw, unsigned long rate,
148*4882a593Smuzhiyun 				   unsigned long parent_rate)
149*4882a593Smuzhiyun {
150*4882a593Smuzhiyun 	struct raspberrypi_clk_data *data =
151*4882a593Smuzhiyun 		container_of(hw, struct raspberrypi_clk_data, hw);
152*4882a593Smuzhiyun 	struct raspberrypi_clk *rpi = data->rpi;
153*4882a593Smuzhiyun 	u32 _rate = rate;
154*4882a593Smuzhiyun 	int ret;
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun 	ret = raspberrypi_clock_property(rpi->firmware, data,
157*4882a593Smuzhiyun 					 RPI_FIRMWARE_SET_CLOCK_RATE, &_rate);
158*4882a593Smuzhiyun 	if (ret)
159*4882a593Smuzhiyun 		dev_err_ratelimited(rpi->dev, "Failed to change %s frequency: %d\n",
160*4882a593Smuzhiyun 				    clk_hw_get_name(hw), ret);
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun 	return ret;
163*4882a593Smuzhiyun }
164*4882a593Smuzhiyun 
raspberrypi_fw_dumb_determine_rate(struct clk_hw * hw,struct clk_rate_request * req)165*4882a593Smuzhiyun static int raspberrypi_fw_dumb_determine_rate(struct clk_hw *hw,
166*4882a593Smuzhiyun 					      struct clk_rate_request *req)
167*4882a593Smuzhiyun {
168*4882a593Smuzhiyun 	/*
169*4882a593Smuzhiyun 	 * The firmware will do the rounding but that isn't part of
170*4882a593Smuzhiyun 	 * the interface with the firmware, so we just do our best
171*4882a593Smuzhiyun 	 * here.
172*4882a593Smuzhiyun 	 */
173*4882a593Smuzhiyun 	req->rate = clamp(req->rate, req->min_rate, req->max_rate);
174*4882a593Smuzhiyun 	return 0;
175*4882a593Smuzhiyun }
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun static const struct clk_ops raspberrypi_firmware_clk_ops = {
178*4882a593Smuzhiyun 	.is_prepared	= raspberrypi_fw_is_prepared,
179*4882a593Smuzhiyun 	.recalc_rate	= raspberrypi_fw_get_rate,
180*4882a593Smuzhiyun 	.determine_rate	= raspberrypi_fw_dumb_determine_rate,
181*4882a593Smuzhiyun 	.set_rate	= raspberrypi_fw_set_rate,
182*4882a593Smuzhiyun };
183*4882a593Smuzhiyun 
raspberrypi_clk_register(struct raspberrypi_clk * rpi,unsigned int parent,unsigned int id)184*4882a593Smuzhiyun static struct clk_hw *raspberrypi_clk_register(struct raspberrypi_clk *rpi,
185*4882a593Smuzhiyun 					       unsigned int parent,
186*4882a593Smuzhiyun 					       unsigned int id)
187*4882a593Smuzhiyun {
188*4882a593Smuzhiyun 	struct raspberrypi_clk_data *data;
189*4882a593Smuzhiyun 	struct clk_init_data init = {};
190*4882a593Smuzhiyun 	u32 min_rate, max_rate;
191*4882a593Smuzhiyun 	int ret;
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun 	data = devm_kzalloc(rpi->dev, sizeof(*data), GFP_KERNEL);
194*4882a593Smuzhiyun 	if (!data)
195*4882a593Smuzhiyun 		return ERR_PTR(-ENOMEM);
196*4882a593Smuzhiyun 	data->rpi = rpi;
197*4882a593Smuzhiyun 	data->id = id;
198*4882a593Smuzhiyun 
199*4882a593Smuzhiyun 	init.name = devm_kasprintf(rpi->dev, GFP_KERNEL,
200*4882a593Smuzhiyun 				   "fw-clk-%s",
201*4882a593Smuzhiyun 				   rpi_firmware_clk_names[id]);
202*4882a593Smuzhiyun 	init.ops = &raspberrypi_firmware_clk_ops;
203*4882a593Smuzhiyun 	init.flags = CLK_GET_RATE_NOCACHE;
204*4882a593Smuzhiyun 
205*4882a593Smuzhiyun 	data->hw.init = &init;
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun 	ret = raspberrypi_clock_property(rpi->firmware, data,
208*4882a593Smuzhiyun 					 RPI_FIRMWARE_GET_MIN_CLOCK_RATE,
209*4882a593Smuzhiyun 					 &min_rate);
210*4882a593Smuzhiyun 	if (ret) {
211*4882a593Smuzhiyun 		dev_err(rpi->dev, "Failed to get clock %d min freq: %d\n",
212*4882a593Smuzhiyun 			id, ret);
213*4882a593Smuzhiyun 		return ERR_PTR(ret);
214*4882a593Smuzhiyun 	}
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun 	ret = raspberrypi_clock_property(rpi->firmware, data,
217*4882a593Smuzhiyun 					 RPI_FIRMWARE_GET_MAX_CLOCK_RATE,
218*4882a593Smuzhiyun 					 &max_rate);
219*4882a593Smuzhiyun 	if (ret) {
220*4882a593Smuzhiyun 		dev_err(rpi->dev, "Failed to get clock %d max freq: %d\n",
221*4882a593Smuzhiyun 			id, ret);
222*4882a593Smuzhiyun 		return ERR_PTR(ret);
223*4882a593Smuzhiyun 	}
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun 	ret = devm_clk_hw_register(rpi->dev, &data->hw);
226*4882a593Smuzhiyun 	if (ret)
227*4882a593Smuzhiyun 		return ERR_PTR(ret);
228*4882a593Smuzhiyun 
229*4882a593Smuzhiyun 	clk_hw_set_rate_range(&data->hw, min_rate, max_rate);
230*4882a593Smuzhiyun 
231*4882a593Smuzhiyun 	if (id == RPI_FIRMWARE_ARM_CLK_ID) {
232*4882a593Smuzhiyun 		ret = devm_clk_hw_register_clkdev(rpi->dev, &data->hw,
233*4882a593Smuzhiyun 						  NULL, "cpu0");
234*4882a593Smuzhiyun 		if (ret) {
235*4882a593Smuzhiyun 			dev_err(rpi->dev, "Failed to initialize clkdev\n");
236*4882a593Smuzhiyun 			return ERR_PTR(ret);
237*4882a593Smuzhiyun 		}
238*4882a593Smuzhiyun 	}
239*4882a593Smuzhiyun 
240*4882a593Smuzhiyun 	return &data->hw;
241*4882a593Smuzhiyun }
242*4882a593Smuzhiyun 
243*4882a593Smuzhiyun struct rpi_firmware_get_clocks_response {
244*4882a593Smuzhiyun 	u32 parent;
245*4882a593Smuzhiyun 	u32 id;
246*4882a593Smuzhiyun };
247*4882a593Smuzhiyun 
raspberrypi_discover_clocks(struct raspberrypi_clk * rpi,struct clk_hw_onecell_data * data)248*4882a593Smuzhiyun static int raspberrypi_discover_clocks(struct raspberrypi_clk *rpi,
249*4882a593Smuzhiyun 				       struct clk_hw_onecell_data *data)
250*4882a593Smuzhiyun {
251*4882a593Smuzhiyun 	struct rpi_firmware_get_clocks_response *clks;
252*4882a593Smuzhiyun 	int ret;
253*4882a593Smuzhiyun 
254*4882a593Smuzhiyun 	/*
255*4882a593Smuzhiyun 	 * The firmware doesn't guarantee that the last element of
256*4882a593Smuzhiyun 	 * RPI_FIRMWARE_GET_CLOCKS is zeroed. So allocate an additional
257*4882a593Smuzhiyun 	 * zero element as sentinel.
258*4882a593Smuzhiyun 	 */
259*4882a593Smuzhiyun 	clks = devm_kcalloc(rpi->dev,
260*4882a593Smuzhiyun 			    RPI_FIRMWARE_NUM_CLK_ID + 1, sizeof(*clks),
261*4882a593Smuzhiyun 			    GFP_KERNEL);
262*4882a593Smuzhiyun 	if (!clks)
263*4882a593Smuzhiyun 		return -ENOMEM;
264*4882a593Smuzhiyun 
265*4882a593Smuzhiyun 	ret = rpi_firmware_property(rpi->firmware, RPI_FIRMWARE_GET_CLOCKS,
266*4882a593Smuzhiyun 				    clks,
267*4882a593Smuzhiyun 				    sizeof(*clks) * RPI_FIRMWARE_NUM_CLK_ID);
268*4882a593Smuzhiyun 	if (ret)
269*4882a593Smuzhiyun 		return ret;
270*4882a593Smuzhiyun 
271*4882a593Smuzhiyun 	while (clks->id) {
272*4882a593Smuzhiyun 		struct clk_hw *hw;
273*4882a593Smuzhiyun 
274*4882a593Smuzhiyun 		switch (clks->id) {
275*4882a593Smuzhiyun 		case RPI_FIRMWARE_ARM_CLK_ID:
276*4882a593Smuzhiyun 		case RPI_FIRMWARE_CORE_CLK_ID:
277*4882a593Smuzhiyun 		case RPI_FIRMWARE_M2MC_CLK_ID:
278*4882a593Smuzhiyun 		case RPI_FIRMWARE_V3D_CLK_ID:
279*4882a593Smuzhiyun 		case RPI_FIRMWARE_PIXEL_BVB_CLK_ID:
280*4882a593Smuzhiyun 			hw = raspberrypi_clk_register(rpi, clks->parent,
281*4882a593Smuzhiyun 						      clks->id);
282*4882a593Smuzhiyun 			if (IS_ERR(hw))
283*4882a593Smuzhiyun 				return PTR_ERR(hw);
284*4882a593Smuzhiyun 
285*4882a593Smuzhiyun 			data->hws[clks->id] = hw;
286*4882a593Smuzhiyun 			data->num = clks->id + 1;
287*4882a593Smuzhiyun 			fallthrough;
288*4882a593Smuzhiyun 
289*4882a593Smuzhiyun 		default:
290*4882a593Smuzhiyun 			clks++;
291*4882a593Smuzhiyun 			break;
292*4882a593Smuzhiyun 		}
293*4882a593Smuzhiyun 	}
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun 	return 0;
296*4882a593Smuzhiyun }
297*4882a593Smuzhiyun 
raspberrypi_clk_probe(struct platform_device * pdev)298*4882a593Smuzhiyun static int raspberrypi_clk_probe(struct platform_device *pdev)
299*4882a593Smuzhiyun {
300*4882a593Smuzhiyun 	struct clk_hw_onecell_data *clk_data;
301*4882a593Smuzhiyun 	struct device_node *firmware_node;
302*4882a593Smuzhiyun 	struct device *dev = &pdev->dev;
303*4882a593Smuzhiyun 	struct rpi_firmware *firmware;
304*4882a593Smuzhiyun 	struct raspberrypi_clk *rpi;
305*4882a593Smuzhiyun 	int ret;
306*4882a593Smuzhiyun 
307*4882a593Smuzhiyun 	/*
308*4882a593Smuzhiyun 	 * We can be probed either through the an old-fashioned
309*4882a593Smuzhiyun 	 * platform device registration or through a DT node that is a
310*4882a593Smuzhiyun 	 * child of the firmware node. Handle both cases.
311*4882a593Smuzhiyun 	 */
312*4882a593Smuzhiyun 	if (dev->of_node)
313*4882a593Smuzhiyun 		firmware_node = of_get_parent(dev->of_node);
314*4882a593Smuzhiyun 	else
315*4882a593Smuzhiyun 		firmware_node = of_find_compatible_node(NULL, NULL,
316*4882a593Smuzhiyun 							"raspberrypi,bcm2835-firmware");
317*4882a593Smuzhiyun 	if (!firmware_node) {
318*4882a593Smuzhiyun 		dev_err(dev, "Missing firmware node\n");
319*4882a593Smuzhiyun 		return -ENOENT;
320*4882a593Smuzhiyun 	}
321*4882a593Smuzhiyun 
322*4882a593Smuzhiyun 	firmware = rpi_firmware_get(firmware_node);
323*4882a593Smuzhiyun 	of_node_put(firmware_node);
324*4882a593Smuzhiyun 	if (!firmware)
325*4882a593Smuzhiyun 		return -EPROBE_DEFER;
326*4882a593Smuzhiyun 
327*4882a593Smuzhiyun 	rpi = devm_kzalloc(dev, sizeof(*rpi), GFP_KERNEL);
328*4882a593Smuzhiyun 	if (!rpi)
329*4882a593Smuzhiyun 		return -ENOMEM;
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun 	rpi->dev = dev;
332*4882a593Smuzhiyun 	rpi->firmware = firmware;
333*4882a593Smuzhiyun 	platform_set_drvdata(pdev, rpi);
334*4882a593Smuzhiyun 
335*4882a593Smuzhiyun 	clk_data = devm_kzalloc(dev, struct_size(clk_data, hws,
336*4882a593Smuzhiyun 						 RPI_FIRMWARE_NUM_CLK_ID),
337*4882a593Smuzhiyun 				GFP_KERNEL);
338*4882a593Smuzhiyun 	if (!clk_data)
339*4882a593Smuzhiyun 		return -ENOMEM;
340*4882a593Smuzhiyun 
341*4882a593Smuzhiyun 	ret = raspberrypi_discover_clocks(rpi, clk_data);
342*4882a593Smuzhiyun 	if (ret)
343*4882a593Smuzhiyun 		return ret;
344*4882a593Smuzhiyun 
345*4882a593Smuzhiyun 	ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get,
346*4882a593Smuzhiyun 					  clk_data);
347*4882a593Smuzhiyun 	if (ret)
348*4882a593Smuzhiyun 		return ret;
349*4882a593Smuzhiyun 
350*4882a593Smuzhiyun 	rpi->cpufreq = platform_device_register_data(dev, "raspberrypi-cpufreq",
351*4882a593Smuzhiyun 						     -1, NULL, 0);
352*4882a593Smuzhiyun 
353*4882a593Smuzhiyun 	return 0;
354*4882a593Smuzhiyun }
355*4882a593Smuzhiyun 
raspberrypi_clk_remove(struct platform_device * pdev)356*4882a593Smuzhiyun static int raspberrypi_clk_remove(struct platform_device *pdev)
357*4882a593Smuzhiyun {
358*4882a593Smuzhiyun 	struct raspberrypi_clk *rpi = platform_get_drvdata(pdev);
359*4882a593Smuzhiyun 
360*4882a593Smuzhiyun 	platform_device_unregister(rpi->cpufreq);
361*4882a593Smuzhiyun 
362*4882a593Smuzhiyun 	return 0;
363*4882a593Smuzhiyun }
364*4882a593Smuzhiyun 
365*4882a593Smuzhiyun static const struct of_device_id raspberrypi_clk_match[] = {
366*4882a593Smuzhiyun 	{ .compatible = "raspberrypi,firmware-clocks" },
367*4882a593Smuzhiyun 	{ },
368*4882a593Smuzhiyun };
369*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, raspberrypi_clk_match);
370*4882a593Smuzhiyun 
371*4882a593Smuzhiyun static struct platform_driver raspberrypi_clk_driver = {
372*4882a593Smuzhiyun 	.driver = {
373*4882a593Smuzhiyun 		.name = "raspberrypi-clk",
374*4882a593Smuzhiyun 		.of_match_table = raspberrypi_clk_match,
375*4882a593Smuzhiyun 	},
376*4882a593Smuzhiyun 	.probe          = raspberrypi_clk_probe,
377*4882a593Smuzhiyun 	.remove		= raspberrypi_clk_remove,
378*4882a593Smuzhiyun };
379*4882a593Smuzhiyun module_platform_driver(raspberrypi_clk_driver);
380*4882a593Smuzhiyun 
381*4882a593Smuzhiyun MODULE_AUTHOR("Nicolas Saenz Julienne <nsaenzjulienne@suse.de>");
382*4882a593Smuzhiyun MODULE_DESCRIPTION("Raspberry Pi firmware clock driver");
383*4882a593Smuzhiyun MODULE_LICENSE("GPL");
384*4882a593Smuzhiyun MODULE_ALIAS("platform:raspberrypi-clk");
385