1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * linux/drivers/misc/xillybus_of.c
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright 2011 Xillybus Ltd, http://xillybus.com
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Driver for the Xillybus FPGA/host framework using Open Firmware.
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/device.h>
12*4882a593Smuzhiyun #include <linux/slab.h>
13*4882a593Smuzhiyun #include <linux/platform_device.h>
14*4882a593Smuzhiyun #include <linux/of.h>
15*4882a593Smuzhiyun #include <linux/err.h>
16*4882a593Smuzhiyun #include "xillybus.h"
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun MODULE_DESCRIPTION("Xillybus driver for Open Firmware");
19*4882a593Smuzhiyun MODULE_AUTHOR("Eli Billauer, Xillybus Ltd.");
20*4882a593Smuzhiyun MODULE_VERSION("1.06");
21*4882a593Smuzhiyun MODULE_ALIAS("xillybus_of");
22*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun static const char xillyname[] = "xillybus_of";
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun /* Match table for of_platform binding */
27*4882a593Smuzhiyun static const struct of_device_id xillybus_of_match[] = {
28*4882a593Smuzhiyun { .compatible = "xillybus,xillybus-1.00.a", },
29*4882a593Smuzhiyun { .compatible = "xlnx,xillybus-1.00.a", }, /* Deprecated */
30*4882a593Smuzhiyun {}
31*4882a593Smuzhiyun };
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, xillybus_of_match);
34*4882a593Smuzhiyun
xilly_dma_sync_single_for_cpu_of(struct xilly_endpoint * ep,dma_addr_t dma_handle,size_t size,int direction)35*4882a593Smuzhiyun static void xilly_dma_sync_single_for_cpu_of(struct xilly_endpoint *ep,
36*4882a593Smuzhiyun dma_addr_t dma_handle,
37*4882a593Smuzhiyun size_t size,
38*4882a593Smuzhiyun int direction)
39*4882a593Smuzhiyun {
40*4882a593Smuzhiyun dma_sync_single_for_cpu(ep->dev, dma_handle, size, direction);
41*4882a593Smuzhiyun }
42*4882a593Smuzhiyun
xilly_dma_sync_single_for_device_of(struct xilly_endpoint * ep,dma_addr_t dma_handle,size_t size,int direction)43*4882a593Smuzhiyun static void xilly_dma_sync_single_for_device_of(struct xilly_endpoint *ep,
44*4882a593Smuzhiyun dma_addr_t dma_handle,
45*4882a593Smuzhiyun size_t size,
46*4882a593Smuzhiyun int direction)
47*4882a593Smuzhiyun {
48*4882a593Smuzhiyun dma_sync_single_for_device(ep->dev, dma_handle, size, direction);
49*4882a593Smuzhiyun }
50*4882a593Smuzhiyun
xilly_dma_sync_single_nop(struct xilly_endpoint * ep,dma_addr_t dma_handle,size_t size,int direction)51*4882a593Smuzhiyun static void xilly_dma_sync_single_nop(struct xilly_endpoint *ep,
52*4882a593Smuzhiyun dma_addr_t dma_handle,
53*4882a593Smuzhiyun size_t size,
54*4882a593Smuzhiyun int direction)
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun }
57*4882a593Smuzhiyun
xilly_of_unmap(void * ptr)58*4882a593Smuzhiyun static void xilly_of_unmap(void *ptr)
59*4882a593Smuzhiyun {
60*4882a593Smuzhiyun struct xilly_mapping *data = ptr;
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun dma_unmap_single(data->device, data->dma_addr,
63*4882a593Smuzhiyun data->size, data->direction);
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun kfree(ptr);
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun
xilly_map_single_of(struct xilly_endpoint * ep,void * ptr,size_t size,int direction,dma_addr_t * ret_dma_handle)68*4882a593Smuzhiyun static int xilly_map_single_of(struct xilly_endpoint *ep,
69*4882a593Smuzhiyun void *ptr,
70*4882a593Smuzhiyun size_t size,
71*4882a593Smuzhiyun int direction,
72*4882a593Smuzhiyun dma_addr_t *ret_dma_handle
73*4882a593Smuzhiyun )
74*4882a593Smuzhiyun {
75*4882a593Smuzhiyun dma_addr_t addr;
76*4882a593Smuzhiyun struct xilly_mapping *this;
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun this = kzalloc(sizeof(*this), GFP_KERNEL);
79*4882a593Smuzhiyun if (!this)
80*4882a593Smuzhiyun return -ENOMEM;
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun addr = dma_map_single(ep->dev, ptr, size, direction);
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun if (dma_mapping_error(ep->dev, addr)) {
85*4882a593Smuzhiyun kfree(this);
86*4882a593Smuzhiyun return -ENODEV;
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun this->device = ep->dev;
90*4882a593Smuzhiyun this->dma_addr = addr;
91*4882a593Smuzhiyun this->size = size;
92*4882a593Smuzhiyun this->direction = direction;
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun *ret_dma_handle = addr;
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun return devm_add_action_or_reset(ep->dev, xilly_of_unmap, this);
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun static struct xilly_endpoint_hardware of_hw = {
100*4882a593Smuzhiyun .owner = THIS_MODULE,
101*4882a593Smuzhiyun .hw_sync_sgl_for_cpu = xilly_dma_sync_single_for_cpu_of,
102*4882a593Smuzhiyun .hw_sync_sgl_for_device = xilly_dma_sync_single_for_device_of,
103*4882a593Smuzhiyun .map_single = xilly_map_single_of,
104*4882a593Smuzhiyun };
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun static struct xilly_endpoint_hardware of_hw_coherent = {
107*4882a593Smuzhiyun .owner = THIS_MODULE,
108*4882a593Smuzhiyun .hw_sync_sgl_for_cpu = xilly_dma_sync_single_nop,
109*4882a593Smuzhiyun .hw_sync_sgl_for_device = xilly_dma_sync_single_nop,
110*4882a593Smuzhiyun .map_single = xilly_map_single_of,
111*4882a593Smuzhiyun };
112*4882a593Smuzhiyun
xilly_drv_probe(struct platform_device * op)113*4882a593Smuzhiyun static int xilly_drv_probe(struct platform_device *op)
114*4882a593Smuzhiyun {
115*4882a593Smuzhiyun struct device *dev = &op->dev;
116*4882a593Smuzhiyun struct xilly_endpoint *endpoint;
117*4882a593Smuzhiyun int rc;
118*4882a593Smuzhiyun int irq;
119*4882a593Smuzhiyun struct xilly_endpoint_hardware *ephw = &of_hw;
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun if (of_property_read_bool(dev->of_node, "dma-coherent"))
122*4882a593Smuzhiyun ephw = &of_hw_coherent;
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun endpoint = xillybus_init_endpoint(NULL, dev, ephw);
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun if (!endpoint)
127*4882a593Smuzhiyun return -ENOMEM;
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun dev_set_drvdata(dev, endpoint);
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun endpoint->registers = devm_platform_ioremap_resource(op, 0);
132*4882a593Smuzhiyun if (IS_ERR(endpoint->registers))
133*4882a593Smuzhiyun return PTR_ERR(endpoint->registers);
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun irq = platform_get_irq(op, 0);
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun rc = devm_request_irq(dev, irq, xillybus_isr, 0, xillyname, endpoint);
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun if (rc) {
140*4882a593Smuzhiyun dev_err(endpoint->dev,
141*4882a593Smuzhiyun "Failed to register IRQ handler. Aborting.\n");
142*4882a593Smuzhiyun return -ENODEV;
143*4882a593Smuzhiyun }
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun return xillybus_endpoint_discovery(endpoint);
146*4882a593Smuzhiyun }
147*4882a593Smuzhiyun
xilly_drv_remove(struct platform_device * op)148*4882a593Smuzhiyun static int xilly_drv_remove(struct platform_device *op)
149*4882a593Smuzhiyun {
150*4882a593Smuzhiyun struct device *dev = &op->dev;
151*4882a593Smuzhiyun struct xilly_endpoint *endpoint = dev_get_drvdata(dev);
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun xillybus_endpoint_remove(endpoint);
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun return 0;
156*4882a593Smuzhiyun }
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun static struct platform_driver xillybus_platform_driver = {
159*4882a593Smuzhiyun .probe = xilly_drv_probe,
160*4882a593Smuzhiyun .remove = xilly_drv_remove,
161*4882a593Smuzhiyun .driver = {
162*4882a593Smuzhiyun .name = xillyname,
163*4882a593Smuzhiyun .of_match_table = xillybus_of_match,
164*4882a593Smuzhiyun },
165*4882a593Smuzhiyun };
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun module_platform_driver(xillybus_platform_driver);
168