xref: /OK3568_Linux_fs/kernel/drivers/char/tpm/tpm_tis_synquacer.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (C) 2020 Linaro Ltd.
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * This device driver implements MMIO TPM on SynQuacer Platform.
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun #include <linux/acpi.h>
8*4882a593Smuzhiyun #include <linux/init.h>
9*4882a593Smuzhiyun #include <linux/module.h>
10*4882a593Smuzhiyun #include <linux/slab.h>
11*4882a593Smuzhiyun #include <linux/of.h>
12*4882a593Smuzhiyun #include <linux/of_device.h>
13*4882a593Smuzhiyun #include <linux/kernel.h>
14*4882a593Smuzhiyun #include "tpm.h"
15*4882a593Smuzhiyun #include "tpm_tis_core.h"
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun /*
18*4882a593Smuzhiyun  * irq > 0 means: use irq $irq;
19*4882a593Smuzhiyun  * irq = 0 means: autoprobe for an irq;
20*4882a593Smuzhiyun  * irq = -1 means: no irq support
21*4882a593Smuzhiyun  */
22*4882a593Smuzhiyun struct tpm_tis_synquacer_info {
23*4882a593Smuzhiyun 	struct resource res;
24*4882a593Smuzhiyun 	int irq;
25*4882a593Smuzhiyun };
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun struct tpm_tis_synquacer_phy {
28*4882a593Smuzhiyun 	struct tpm_tis_data priv;
29*4882a593Smuzhiyun 	void __iomem *iobase;
30*4882a593Smuzhiyun };
31*4882a593Smuzhiyun 
to_tpm_tis_tcg_phy(struct tpm_tis_data * data)32*4882a593Smuzhiyun static inline struct tpm_tis_synquacer_phy *to_tpm_tis_tcg_phy(struct tpm_tis_data *data)
33*4882a593Smuzhiyun {
34*4882a593Smuzhiyun 	return container_of(data, struct tpm_tis_synquacer_phy, priv);
35*4882a593Smuzhiyun }
36*4882a593Smuzhiyun 
tpm_tis_synquacer_read_bytes(struct tpm_tis_data * data,u32 addr,u16 len,u8 * result)37*4882a593Smuzhiyun static int tpm_tis_synquacer_read_bytes(struct tpm_tis_data *data, u32 addr,
38*4882a593Smuzhiyun 					u16 len, u8 *result)
39*4882a593Smuzhiyun {
40*4882a593Smuzhiyun 	struct tpm_tis_synquacer_phy *phy = to_tpm_tis_tcg_phy(data);
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun 	while (len--)
43*4882a593Smuzhiyun 		*result++ = ioread8(phy->iobase + addr);
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun 	return 0;
46*4882a593Smuzhiyun }
47*4882a593Smuzhiyun 
tpm_tis_synquacer_write_bytes(struct tpm_tis_data * data,u32 addr,u16 len,const u8 * value)48*4882a593Smuzhiyun static int tpm_tis_synquacer_write_bytes(struct tpm_tis_data *data, u32 addr,
49*4882a593Smuzhiyun 					 u16 len, const u8 *value)
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun 	struct tpm_tis_synquacer_phy *phy = to_tpm_tis_tcg_phy(data);
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun 	while (len--)
54*4882a593Smuzhiyun 		iowrite8(*value++, phy->iobase + addr);
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun 	return 0;
57*4882a593Smuzhiyun }
58*4882a593Smuzhiyun 
tpm_tis_synquacer_read16_bw(struct tpm_tis_data * data,u32 addr,u16 * result)59*4882a593Smuzhiyun static int tpm_tis_synquacer_read16_bw(struct tpm_tis_data *data,
60*4882a593Smuzhiyun 				       u32 addr, u16 *result)
61*4882a593Smuzhiyun {
62*4882a593Smuzhiyun 	struct tpm_tis_synquacer_phy *phy = to_tpm_tis_tcg_phy(data);
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun 	/*
65*4882a593Smuzhiyun 	 * Due to the limitation of SPI controller on SynQuacer,
66*4882a593Smuzhiyun 	 * 16/32 bits access must be done in byte-wise and descending order.
67*4882a593Smuzhiyun 	 */
68*4882a593Smuzhiyun 	*result = (ioread8(phy->iobase + addr + 1) << 8) |
69*4882a593Smuzhiyun 		  (ioread8(phy->iobase + addr));
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun 	return 0;
72*4882a593Smuzhiyun }
73*4882a593Smuzhiyun 
tpm_tis_synquacer_read32_bw(struct tpm_tis_data * data,u32 addr,u32 * result)74*4882a593Smuzhiyun static int tpm_tis_synquacer_read32_bw(struct tpm_tis_data *data,
75*4882a593Smuzhiyun 				       u32 addr, u32 *result)
76*4882a593Smuzhiyun {
77*4882a593Smuzhiyun 	struct tpm_tis_synquacer_phy *phy = to_tpm_tis_tcg_phy(data);
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun 	/*
80*4882a593Smuzhiyun 	 * Due to the limitation of SPI controller on SynQuacer,
81*4882a593Smuzhiyun 	 * 16/32 bits access must be done in byte-wise and descending order.
82*4882a593Smuzhiyun 	 */
83*4882a593Smuzhiyun 	*result = (ioread8(phy->iobase + addr + 3) << 24) |
84*4882a593Smuzhiyun 		  (ioread8(phy->iobase + addr + 2) << 16) |
85*4882a593Smuzhiyun 		  (ioread8(phy->iobase + addr + 1) << 8) |
86*4882a593Smuzhiyun 		  (ioread8(phy->iobase + addr));
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun 	return 0;
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun 
tpm_tis_synquacer_write32_bw(struct tpm_tis_data * data,u32 addr,u32 value)91*4882a593Smuzhiyun static int tpm_tis_synquacer_write32_bw(struct tpm_tis_data *data,
92*4882a593Smuzhiyun 					u32 addr, u32 value)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun 	struct tpm_tis_synquacer_phy *phy = to_tpm_tis_tcg_phy(data);
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun 	/*
97*4882a593Smuzhiyun 	 * Due to the limitation of SPI controller on SynQuacer,
98*4882a593Smuzhiyun 	 * 16/32 bits access must be done in byte-wise and descending order.
99*4882a593Smuzhiyun 	 */
100*4882a593Smuzhiyun 	iowrite8(value >> 24, phy->iobase + addr + 3);
101*4882a593Smuzhiyun 	iowrite8(value >> 16, phy->iobase + addr + 2);
102*4882a593Smuzhiyun 	iowrite8(value >> 8, phy->iobase + addr + 1);
103*4882a593Smuzhiyun 	iowrite8(value, phy->iobase + addr);
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun 	return 0;
106*4882a593Smuzhiyun }
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun static const struct tpm_tis_phy_ops tpm_tcg_bw = {
109*4882a593Smuzhiyun 	.read_bytes	= tpm_tis_synquacer_read_bytes,
110*4882a593Smuzhiyun 	.write_bytes	= tpm_tis_synquacer_write_bytes,
111*4882a593Smuzhiyun 	.read16		= tpm_tis_synquacer_read16_bw,
112*4882a593Smuzhiyun 	.read32		= tpm_tis_synquacer_read32_bw,
113*4882a593Smuzhiyun 	.write32	= tpm_tis_synquacer_write32_bw,
114*4882a593Smuzhiyun };
115*4882a593Smuzhiyun 
tpm_tis_synquacer_init(struct device * dev,struct tpm_tis_synquacer_info * tpm_info)116*4882a593Smuzhiyun static int tpm_tis_synquacer_init(struct device *dev,
117*4882a593Smuzhiyun 				  struct tpm_tis_synquacer_info *tpm_info)
118*4882a593Smuzhiyun {
119*4882a593Smuzhiyun 	struct tpm_tis_synquacer_phy *phy;
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun 	phy = devm_kzalloc(dev, sizeof(struct tpm_tis_synquacer_phy), GFP_KERNEL);
122*4882a593Smuzhiyun 	if (phy == NULL)
123*4882a593Smuzhiyun 		return -ENOMEM;
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun 	phy->iobase = devm_ioremap_resource(dev, &tpm_info->res);
126*4882a593Smuzhiyun 	if (IS_ERR(phy->iobase))
127*4882a593Smuzhiyun 		return PTR_ERR(phy->iobase);
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun 	return tpm_tis_core_init(dev, &phy->priv, tpm_info->irq, &tpm_tcg_bw,
130*4882a593Smuzhiyun 				 ACPI_HANDLE(dev));
131*4882a593Smuzhiyun }
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun static SIMPLE_DEV_PM_OPS(tpm_tis_synquacer_pm, tpm_pm_suspend, tpm_tis_resume);
134*4882a593Smuzhiyun 
tpm_tis_synquacer_probe(struct platform_device * pdev)135*4882a593Smuzhiyun static int tpm_tis_synquacer_probe(struct platform_device *pdev)
136*4882a593Smuzhiyun {
137*4882a593Smuzhiyun 	struct tpm_tis_synquacer_info tpm_info = {};
138*4882a593Smuzhiyun 	struct resource *res;
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
141*4882a593Smuzhiyun 	if (res == NULL) {
142*4882a593Smuzhiyun 		dev_err(&pdev->dev, "no memory resource defined\n");
143*4882a593Smuzhiyun 		return -ENODEV;
144*4882a593Smuzhiyun 	}
145*4882a593Smuzhiyun 	tpm_info.res = *res;
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun 	tpm_info.irq = -1;
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun 	return tpm_tis_synquacer_init(&pdev->dev, &tpm_info);
150*4882a593Smuzhiyun }
151*4882a593Smuzhiyun 
tpm_tis_synquacer_remove(struct platform_device * pdev)152*4882a593Smuzhiyun static int tpm_tis_synquacer_remove(struct platform_device *pdev)
153*4882a593Smuzhiyun {
154*4882a593Smuzhiyun 	struct tpm_chip *chip = dev_get_drvdata(&pdev->dev);
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun 	tpm_chip_unregister(chip);
157*4882a593Smuzhiyun 	tpm_tis_remove(chip);
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun 	return 0;
160*4882a593Smuzhiyun }
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun #ifdef CONFIG_OF
163*4882a593Smuzhiyun static const struct of_device_id tis_synquacer_of_platform_match[] = {
164*4882a593Smuzhiyun 	{.compatible = "socionext,synquacer-tpm-mmio"},
165*4882a593Smuzhiyun 	{},
166*4882a593Smuzhiyun };
167*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, tis_synquacer_of_platform_match);
168*4882a593Smuzhiyun #endif
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun #ifdef CONFIG_ACPI
171*4882a593Smuzhiyun static const struct acpi_device_id tpm_synquacer_acpi_tbl[] = {
172*4882a593Smuzhiyun 	{ "SCX0009" },
173*4882a593Smuzhiyun 	{},
174*4882a593Smuzhiyun };
175*4882a593Smuzhiyun MODULE_DEVICE_TABLE(acpi, tpm_synquacer_acpi_tbl);
176*4882a593Smuzhiyun #endif
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun static struct platform_driver tis_synquacer_drv = {
179*4882a593Smuzhiyun 	.probe = tpm_tis_synquacer_probe,
180*4882a593Smuzhiyun 	.remove = tpm_tis_synquacer_remove,
181*4882a593Smuzhiyun 	.driver = {
182*4882a593Smuzhiyun 		.name		= "tpm_tis_synquacer",
183*4882a593Smuzhiyun 		.pm		= &tpm_tis_synquacer_pm,
184*4882a593Smuzhiyun 		.of_match_table = of_match_ptr(tis_synquacer_of_platform_match),
185*4882a593Smuzhiyun 		.acpi_match_table = ACPI_PTR(tpm_synquacer_acpi_tbl),
186*4882a593Smuzhiyun 	},
187*4882a593Smuzhiyun };
188*4882a593Smuzhiyun 
tpm_tis_synquacer_module_init(void)189*4882a593Smuzhiyun static int __init tpm_tis_synquacer_module_init(void)
190*4882a593Smuzhiyun {
191*4882a593Smuzhiyun 	int rc;
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun 	rc = platform_driver_register(&tis_synquacer_drv);
194*4882a593Smuzhiyun 	if (rc)
195*4882a593Smuzhiyun 		return rc;
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun 	return 0;
198*4882a593Smuzhiyun }
199*4882a593Smuzhiyun 
tpm_tis_synquacer_module_exit(void)200*4882a593Smuzhiyun static void __exit tpm_tis_synquacer_module_exit(void)
201*4882a593Smuzhiyun {
202*4882a593Smuzhiyun 	platform_driver_unregister(&tis_synquacer_drv);
203*4882a593Smuzhiyun }
204*4882a593Smuzhiyun 
205*4882a593Smuzhiyun module_init(tpm_tis_synquacer_module_init);
206*4882a593Smuzhiyun module_exit(tpm_tis_synquacer_module_exit);
207*4882a593Smuzhiyun MODULE_DESCRIPTION("TPM MMIO Driver for Socionext SynQuacer platform");
208*4882a593Smuzhiyun MODULE_LICENSE("GPL");
209