1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2015 Infineon Technologies AG
4*4882a593Smuzhiyun * Copyright (C) 2016 STMicroelectronics SAS
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #ifndef TPM_TIS_SPI_H
8*4882a593Smuzhiyun #define TPM_TIS_SPI_H
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include "tpm_tis_core.h"
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun struct tpm_tis_spi_phy {
13*4882a593Smuzhiyun struct tpm_tis_data priv;
14*4882a593Smuzhiyun struct spi_device *spi_device;
15*4882a593Smuzhiyun int (*flow_control)(struct tpm_tis_spi_phy *phy,
16*4882a593Smuzhiyun struct spi_transfer *xfer);
17*4882a593Smuzhiyun struct completion ready;
18*4882a593Smuzhiyun unsigned long wake_after;
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun u8 *iobuf;
21*4882a593Smuzhiyun };
22*4882a593Smuzhiyun
to_tpm_tis_spi_phy(struct tpm_tis_data * data)23*4882a593Smuzhiyun static inline struct tpm_tis_spi_phy *to_tpm_tis_spi_phy(struct tpm_tis_data *data)
24*4882a593Smuzhiyun {
25*4882a593Smuzhiyun return container_of(data, struct tpm_tis_spi_phy, priv);
26*4882a593Smuzhiyun }
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun extern int tpm_tis_spi_init(struct spi_device *spi, struct tpm_tis_spi_phy *phy,
29*4882a593Smuzhiyun int irq, const struct tpm_tis_phy_ops *phy_ops);
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun extern int tpm_tis_spi_transfer(struct tpm_tis_data *data, u32 addr, u16 len,
32*4882a593Smuzhiyun u8 *in, const u8 *out);
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun extern int tpm_tis_spi_read16(struct tpm_tis_data *data, u32 addr, u16 *result);
35*4882a593Smuzhiyun extern int tpm_tis_spi_read32(struct tpm_tis_data *data, u32 addr, u32 *result);
36*4882a593Smuzhiyun extern int tpm_tis_spi_write32(struct tpm_tis_data *data, u32 addr, u32 value);
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun #ifdef CONFIG_TCG_TIS_SPI_CR50
39*4882a593Smuzhiyun extern int cr50_spi_probe(struct spi_device *spi);
40*4882a593Smuzhiyun #else
cr50_spi_probe(struct spi_device * spi)41*4882a593Smuzhiyun static inline int cr50_spi_probe(struct spi_device *spi)
42*4882a593Smuzhiyun {
43*4882a593Smuzhiyun return -ENODEV;
44*4882a593Smuzhiyun }
45*4882a593Smuzhiyun #endif
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun #if defined(CONFIG_PM_SLEEP) && defined(CONFIG_TCG_TIS_SPI_CR50)
48*4882a593Smuzhiyun extern int tpm_tis_spi_resume(struct device *dev);
49*4882a593Smuzhiyun #else
50*4882a593Smuzhiyun #define tpm_tis_spi_resume NULL
51*4882a593Smuzhiyun #endif
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun #endif
54