xref: /OK3568_Linux_fs/kernel/drivers/char/tpm/tpm_crb.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (C) 2014 Intel Corporation
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Authors:
6*4882a593Smuzhiyun  * Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * Maintained by: <tpmdd-devel@lists.sourceforge.net>
9*4882a593Smuzhiyun  *
10*4882a593Smuzhiyun  * This device driver implements the TPM interface as defined in
11*4882a593Smuzhiyun  * the TCG CRB 2.0 TPM specification.
12*4882a593Smuzhiyun  */
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #include <linux/acpi.h>
15*4882a593Smuzhiyun #include <linux/highmem.h>
16*4882a593Smuzhiyun #include <linux/rculist.h>
17*4882a593Smuzhiyun #include <linux/module.h>
18*4882a593Smuzhiyun #include <linux/pm_runtime.h>
19*4882a593Smuzhiyun #ifdef CONFIG_ARM64
20*4882a593Smuzhiyun #include <linux/arm-smccc.h>
21*4882a593Smuzhiyun #endif
22*4882a593Smuzhiyun #include "tpm.h"
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun #define ACPI_SIG_TPM2 "TPM2"
25*4882a593Smuzhiyun #define TPM_CRB_MAX_RESOURCES 3
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun static const guid_t crb_acpi_start_guid =
28*4882a593Smuzhiyun 	GUID_INIT(0x6BBF6CAB, 0x5463, 0x4714,
29*4882a593Smuzhiyun 		  0xB7, 0xCD, 0xF0, 0x20, 0x3C, 0x03, 0x68, 0xD4);
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun enum crb_defaults {
32*4882a593Smuzhiyun 	CRB_ACPI_START_REVISION_ID = 1,
33*4882a593Smuzhiyun 	CRB_ACPI_START_INDEX = 1,
34*4882a593Smuzhiyun };
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun enum crb_loc_ctrl {
37*4882a593Smuzhiyun 	CRB_LOC_CTRL_REQUEST_ACCESS	= BIT(0),
38*4882a593Smuzhiyun 	CRB_LOC_CTRL_RELINQUISH		= BIT(1),
39*4882a593Smuzhiyun };
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun enum crb_loc_state {
42*4882a593Smuzhiyun 	CRB_LOC_STATE_LOC_ASSIGNED	= BIT(1),
43*4882a593Smuzhiyun 	CRB_LOC_STATE_TPM_REG_VALID_STS	= BIT(7),
44*4882a593Smuzhiyun };
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun enum crb_ctrl_req {
47*4882a593Smuzhiyun 	CRB_CTRL_REQ_CMD_READY	= BIT(0),
48*4882a593Smuzhiyun 	CRB_CTRL_REQ_GO_IDLE	= BIT(1),
49*4882a593Smuzhiyun };
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun enum crb_ctrl_sts {
52*4882a593Smuzhiyun 	CRB_CTRL_STS_ERROR	= BIT(0),
53*4882a593Smuzhiyun 	CRB_CTRL_STS_TPM_IDLE	= BIT(1),
54*4882a593Smuzhiyun };
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun enum crb_start {
57*4882a593Smuzhiyun 	CRB_START_INVOKE	= BIT(0),
58*4882a593Smuzhiyun };
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun enum crb_cancel {
61*4882a593Smuzhiyun 	CRB_CANCEL_INVOKE	= BIT(0),
62*4882a593Smuzhiyun };
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun struct crb_regs_head {
65*4882a593Smuzhiyun 	u32 loc_state;
66*4882a593Smuzhiyun 	u32 reserved1;
67*4882a593Smuzhiyun 	u32 loc_ctrl;
68*4882a593Smuzhiyun 	u32 loc_sts;
69*4882a593Smuzhiyun 	u8 reserved2[32];
70*4882a593Smuzhiyun 	u64 intf_id;
71*4882a593Smuzhiyun 	u64 ctrl_ext;
72*4882a593Smuzhiyun } __packed;
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun struct crb_regs_tail {
75*4882a593Smuzhiyun 	u32 ctrl_req;
76*4882a593Smuzhiyun 	u32 ctrl_sts;
77*4882a593Smuzhiyun 	u32 ctrl_cancel;
78*4882a593Smuzhiyun 	u32 ctrl_start;
79*4882a593Smuzhiyun 	u32 ctrl_int_enable;
80*4882a593Smuzhiyun 	u32 ctrl_int_sts;
81*4882a593Smuzhiyun 	u32 ctrl_cmd_size;
82*4882a593Smuzhiyun 	u32 ctrl_cmd_pa_low;
83*4882a593Smuzhiyun 	u32 ctrl_cmd_pa_high;
84*4882a593Smuzhiyun 	u32 ctrl_rsp_size;
85*4882a593Smuzhiyun 	u64 ctrl_rsp_pa;
86*4882a593Smuzhiyun } __packed;
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun enum crb_status {
89*4882a593Smuzhiyun 	CRB_DRV_STS_COMPLETE	= BIT(0),
90*4882a593Smuzhiyun };
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun struct crb_priv {
93*4882a593Smuzhiyun 	u32 sm;
94*4882a593Smuzhiyun 	const char *hid;
95*4882a593Smuzhiyun 	struct crb_regs_head __iomem *regs_h;
96*4882a593Smuzhiyun 	struct crb_regs_tail __iomem *regs_t;
97*4882a593Smuzhiyun 	u8 __iomem *cmd;
98*4882a593Smuzhiyun 	u8 __iomem *rsp;
99*4882a593Smuzhiyun 	u32 cmd_size;
100*4882a593Smuzhiyun 	u32 smc_func_id;
101*4882a593Smuzhiyun };
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun struct tpm2_crb_smc {
104*4882a593Smuzhiyun 	u32 interrupt;
105*4882a593Smuzhiyun 	u8 interrupt_flags;
106*4882a593Smuzhiyun 	u8 op_flags;
107*4882a593Smuzhiyun 	u16 reserved2;
108*4882a593Smuzhiyun 	u32 smc_func_id;
109*4882a593Smuzhiyun };
110*4882a593Smuzhiyun 
crb_wait_for_reg_32(u32 __iomem * reg,u32 mask,u32 value,unsigned long timeout)111*4882a593Smuzhiyun static bool crb_wait_for_reg_32(u32 __iomem *reg, u32 mask, u32 value,
112*4882a593Smuzhiyun 				unsigned long timeout)
113*4882a593Smuzhiyun {
114*4882a593Smuzhiyun 	ktime_t start;
115*4882a593Smuzhiyun 	ktime_t stop;
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun 	start = ktime_get();
118*4882a593Smuzhiyun 	stop = ktime_add(start, ms_to_ktime(timeout));
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun 	do {
121*4882a593Smuzhiyun 		if ((ioread32(reg) & mask) == value)
122*4882a593Smuzhiyun 			return true;
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun 		usleep_range(50, 100);
125*4882a593Smuzhiyun 	} while (ktime_before(ktime_get(), stop));
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun 	return ((ioread32(reg) & mask) == value);
128*4882a593Smuzhiyun }
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun /**
131*4882a593Smuzhiyun  * __crb_go_idle - request tpm crb device to go the idle state
132*4882a593Smuzhiyun  *
133*4882a593Smuzhiyun  * @dev:  crb device
134*4882a593Smuzhiyun  * @priv: crb private data
135*4882a593Smuzhiyun  *
136*4882a593Smuzhiyun  * Write CRB_CTRL_REQ_GO_IDLE to TPM_CRB_CTRL_REQ
137*4882a593Smuzhiyun  * The device should respond within TIMEOUT_C by clearing the bit.
138*4882a593Smuzhiyun  * Anyhow, we do not wait here as a consequent CMD_READY request
139*4882a593Smuzhiyun  * will be handled correctly even if idle was not completed.
140*4882a593Smuzhiyun  *
141*4882a593Smuzhiyun  * The function does nothing for devices with ACPI-start method
142*4882a593Smuzhiyun  * or SMC-start method.
143*4882a593Smuzhiyun  *
144*4882a593Smuzhiyun  * Return: 0 always
145*4882a593Smuzhiyun  */
__crb_go_idle(struct device * dev,struct crb_priv * priv)146*4882a593Smuzhiyun static int __crb_go_idle(struct device *dev, struct crb_priv *priv)
147*4882a593Smuzhiyun {
148*4882a593Smuzhiyun 	if ((priv->sm == ACPI_TPM2_START_METHOD) ||
149*4882a593Smuzhiyun 	    (priv->sm == ACPI_TPM2_COMMAND_BUFFER_WITH_START_METHOD) ||
150*4882a593Smuzhiyun 	    (priv->sm == ACPI_TPM2_COMMAND_BUFFER_WITH_ARM_SMC))
151*4882a593Smuzhiyun 		return 0;
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun 	iowrite32(CRB_CTRL_REQ_GO_IDLE, &priv->regs_t->ctrl_req);
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun 	if (!crb_wait_for_reg_32(&priv->regs_t->ctrl_req,
156*4882a593Smuzhiyun 				 CRB_CTRL_REQ_GO_IDLE/* mask */,
157*4882a593Smuzhiyun 				 0, /* value */
158*4882a593Smuzhiyun 				 TPM2_TIMEOUT_C)) {
159*4882a593Smuzhiyun 		dev_warn(dev, "goIdle timed out\n");
160*4882a593Smuzhiyun 		return -ETIME;
161*4882a593Smuzhiyun 	}
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun 	return 0;
164*4882a593Smuzhiyun }
165*4882a593Smuzhiyun 
crb_go_idle(struct tpm_chip * chip)166*4882a593Smuzhiyun static int crb_go_idle(struct tpm_chip *chip)
167*4882a593Smuzhiyun {
168*4882a593Smuzhiyun 	struct device *dev = &chip->dev;
169*4882a593Smuzhiyun 	struct crb_priv *priv = dev_get_drvdata(dev);
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun 	return __crb_go_idle(dev, priv);
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun /**
175*4882a593Smuzhiyun  * __crb_cmd_ready - request tpm crb device to enter ready state
176*4882a593Smuzhiyun  *
177*4882a593Smuzhiyun  * @dev:  crb device
178*4882a593Smuzhiyun  * @priv: crb private data
179*4882a593Smuzhiyun  *
180*4882a593Smuzhiyun  * Write CRB_CTRL_REQ_CMD_READY to TPM_CRB_CTRL_REQ
181*4882a593Smuzhiyun  * and poll till the device acknowledge it by clearing the bit.
182*4882a593Smuzhiyun  * The device should respond within TIMEOUT_C.
183*4882a593Smuzhiyun  *
184*4882a593Smuzhiyun  * The function does nothing for devices with ACPI-start method
185*4882a593Smuzhiyun  * or SMC-start method.
186*4882a593Smuzhiyun  *
187*4882a593Smuzhiyun  * Return: 0 on success -ETIME on timeout;
188*4882a593Smuzhiyun  */
__crb_cmd_ready(struct device * dev,struct crb_priv * priv)189*4882a593Smuzhiyun static int __crb_cmd_ready(struct device *dev, struct crb_priv *priv)
190*4882a593Smuzhiyun {
191*4882a593Smuzhiyun 	if ((priv->sm == ACPI_TPM2_START_METHOD) ||
192*4882a593Smuzhiyun 	    (priv->sm == ACPI_TPM2_COMMAND_BUFFER_WITH_START_METHOD) ||
193*4882a593Smuzhiyun 	    (priv->sm == ACPI_TPM2_COMMAND_BUFFER_WITH_ARM_SMC))
194*4882a593Smuzhiyun 		return 0;
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun 	iowrite32(CRB_CTRL_REQ_CMD_READY, &priv->regs_t->ctrl_req);
197*4882a593Smuzhiyun 	if (!crb_wait_for_reg_32(&priv->regs_t->ctrl_req,
198*4882a593Smuzhiyun 				 CRB_CTRL_REQ_CMD_READY /* mask */,
199*4882a593Smuzhiyun 				 0, /* value */
200*4882a593Smuzhiyun 				 TPM2_TIMEOUT_C)) {
201*4882a593Smuzhiyun 		dev_warn(dev, "cmdReady timed out\n");
202*4882a593Smuzhiyun 		return -ETIME;
203*4882a593Smuzhiyun 	}
204*4882a593Smuzhiyun 
205*4882a593Smuzhiyun 	return 0;
206*4882a593Smuzhiyun }
207*4882a593Smuzhiyun 
crb_cmd_ready(struct tpm_chip * chip)208*4882a593Smuzhiyun static int crb_cmd_ready(struct tpm_chip *chip)
209*4882a593Smuzhiyun {
210*4882a593Smuzhiyun 	struct device *dev = &chip->dev;
211*4882a593Smuzhiyun 	struct crb_priv *priv = dev_get_drvdata(dev);
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun 	return __crb_cmd_ready(dev, priv);
214*4882a593Smuzhiyun }
215*4882a593Smuzhiyun 
__crb_request_locality(struct device * dev,struct crb_priv * priv,int loc)216*4882a593Smuzhiyun static int __crb_request_locality(struct device *dev,
217*4882a593Smuzhiyun 				  struct crb_priv *priv, int loc)
218*4882a593Smuzhiyun {
219*4882a593Smuzhiyun 	u32 value = CRB_LOC_STATE_LOC_ASSIGNED |
220*4882a593Smuzhiyun 		    CRB_LOC_STATE_TPM_REG_VALID_STS;
221*4882a593Smuzhiyun 
222*4882a593Smuzhiyun 	if (!priv->regs_h)
223*4882a593Smuzhiyun 		return 0;
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun 	iowrite32(CRB_LOC_CTRL_REQUEST_ACCESS, &priv->regs_h->loc_ctrl);
226*4882a593Smuzhiyun 	if (!crb_wait_for_reg_32(&priv->regs_h->loc_state, value, value,
227*4882a593Smuzhiyun 				 TPM2_TIMEOUT_C)) {
228*4882a593Smuzhiyun 		dev_warn(dev, "TPM_LOC_STATE_x.requestAccess timed out\n");
229*4882a593Smuzhiyun 		return -ETIME;
230*4882a593Smuzhiyun 	}
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun 	return 0;
233*4882a593Smuzhiyun }
234*4882a593Smuzhiyun 
crb_request_locality(struct tpm_chip * chip,int loc)235*4882a593Smuzhiyun static int crb_request_locality(struct tpm_chip *chip, int loc)
236*4882a593Smuzhiyun {
237*4882a593Smuzhiyun 	struct crb_priv *priv = dev_get_drvdata(&chip->dev);
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun 	return __crb_request_locality(&chip->dev, priv, loc);
240*4882a593Smuzhiyun }
241*4882a593Smuzhiyun 
__crb_relinquish_locality(struct device * dev,struct crb_priv * priv,int loc)242*4882a593Smuzhiyun static int __crb_relinquish_locality(struct device *dev,
243*4882a593Smuzhiyun 				     struct crb_priv *priv, int loc)
244*4882a593Smuzhiyun {
245*4882a593Smuzhiyun 	u32 mask = CRB_LOC_STATE_LOC_ASSIGNED |
246*4882a593Smuzhiyun 		   CRB_LOC_STATE_TPM_REG_VALID_STS;
247*4882a593Smuzhiyun 	u32 value = CRB_LOC_STATE_TPM_REG_VALID_STS;
248*4882a593Smuzhiyun 
249*4882a593Smuzhiyun 	if (!priv->regs_h)
250*4882a593Smuzhiyun 		return 0;
251*4882a593Smuzhiyun 
252*4882a593Smuzhiyun 	iowrite32(CRB_LOC_CTRL_RELINQUISH, &priv->regs_h->loc_ctrl);
253*4882a593Smuzhiyun 	if (!crb_wait_for_reg_32(&priv->regs_h->loc_state, mask, value,
254*4882a593Smuzhiyun 				 TPM2_TIMEOUT_C)) {
255*4882a593Smuzhiyun 		dev_warn(dev, "TPM_LOC_STATE_x.requestAccess timed out\n");
256*4882a593Smuzhiyun 		return -ETIME;
257*4882a593Smuzhiyun 	}
258*4882a593Smuzhiyun 
259*4882a593Smuzhiyun 	return 0;
260*4882a593Smuzhiyun }
261*4882a593Smuzhiyun 
crb_relinquish_locality(struct tpm_chip * chip,int loc)262*4882a593Smuzhiyun static int crb_relinquish_locality(struct tpm_chip *chip, int loc)
263*4882a593Smuzhiyun {
264*4882a593Smuzhiyun 	struct crb_priv *priv = dev_get_drvdata(&chip->dev);
265*4882a593Smuzhiyun 
266*4882a593Smuzhiyun 	return __crb_relinquish_locality(&chip->dev, priv, loc);
267*4882a593Smuzhiyun }
268*4882a593Smuzhiyun 
crb_status(struct tpm_chip * chip)269*4882a593Smuzhiyun static u8 crb_status(struct tpm_chip *chip)
270*4882a593Smuzhiyun {
271*4882a593Smuzhiyun 	struct crb_priv *priv = dev_get_drvdata(&chip->dev);
272*4882a593Smuzhiyun 	u8 sts = 0;
273*4882a593Smuzhiyun 
274*4882a593Smuzhiyun 	if ((ioread32(&priv->regs_t->ctrl_start) & CRB_START_INVOKE) !=
275*4882a593Smuzhiyun 	    CRB_START_INVOKE)
276*4882a593Smuzhiyun 		sts |= CRB_DRV_STS_COMPLETE;
277*4882a593Smuzhiyun 
278*4882a593Smuzhiyun 	return sts;
279*4882a593Smuzhiyun }
280*4882a593Smuzhiyun 
crb_recv(struct tpm_chip * chip,u8 * buf,size_t count)281*4882a593Smuzhiyun static int crb_recv(struct tpm_chip *chip, u8 *buf, size_t count)
282*4882a593Smuzhiyun {
283*4882a593Smuzhiyun 	struct crb_priv *priv = dev_get_drvdata(&chip->dev);
284*4882a593Smuzhiyun 	unsigned int expected;
285*4882a593Smuzhiyun 
286*4882a593Smuzhiyun 	/* A sanity check that the upper layer wants to get at least the header
287*4882a593Smuzhiyun 	 * as that is the minimum size for any TPM response.
288*4882a593Smuzhiyun 	 */
289*4882a593Smuzhiyun 	if (count < TPM_HEADER_SIZE)
290*4882a593Smuzhiyun 		return -EIO;
291*4882a593Smuzhiyun 
292*4882a593Smuzhiyun 	/* If this bit is set, according to the spec, the TPM is in
293*4882a593Smuzhiyun 	 * unrecoverable condition.
294*4882a593Smuzhiyun 	 */
295*4882a593Smuzhiyun 	if (ioread32(&priv->regs_t->ctrl_sts) & CRB_CTRL_STS_ERROR)
296*4882a593Smuzhiyun 		return -EIO;
297*4882a593Smuzhiyun 
298*4882a593Smuzhiyun 	/* Read the first 8 bytes in order to get the length of the response.
299*4882a593Smuzhiyun 	 * We read exactly a quad word in order to make sure that the remaining
300*4882a593Smuzhiyun 	 * reads will be aligned.
301*4882a593Smuzhiyun 	 */
302*4882a593Smuzhiyun 	memcpy_fromio(buf, priv->rsp, 8);
303*4882a593Smuzhiyun 
304*4882a593Smuzhiyun 	expected = be32_to_cpup((__be32 *)&buf[2]);
305*4882a593Smuzhiyun 	if (expected > count || expected < TPM_HEADER_SIZE)
306*4882a593Smuzhiyun 		return -EIO;
307*4882a593Smuzhiyun 
308*4882a593Smuzhiyun 	memcpy_fromio(&buf[8], &priv->rsp[8], expected - 8);
309*4882a593Smuzhiyun 
310*4882a593Smuzhiyun 	return expected;
311*4882a593Smuzhiyun }
312*4882a593Smuzhiyun 
crb_do_acpi_start(struct tpm_chip * chip)313*4882a593Smuzhiyun static int crb_do_acpi_start(struct tpm_chip *chip)
314*4882a593Smuzhiyun {
315*4882a593Smuzhiyun 	union acpi_object *obj;
316*4882a593Smuzhiyun 	int rc;
317*4882a593Smuzhiyun 
318*4882a593Smuzhiyun 	obj = acpi_evaluate_dsm(chip->acpi_dev_handle,
319*4882a593Smuzhiyun 				&crb_acpi_start_guid,
320*4882a593Smuzhiyun 				CRB_ACPI_START_REVISION_ID,
321*4882a593Smuzhiyun 				CRB_ACPI_START_INDEX,
322*4882a593Smuzhiyun 				NULL);
323*4882a593Smuzhiyun 	if (!obj)
324*4882a593Smuzhiyun 		return -ENXIO;
325*4882a593Smuzhiyun 	rc = obj->integer.value == 0 ? 0 : -ENXIO;
326*4882a593Smuzhiyun 	ACPI_FREE(obj);
327*4882a593Smuzhiyun 	return rc;
328*4882a593Smuzhiyun }
329*4882a593Smuzhiyun 
330*4882a593Smuzhiyun #ifdef CONFIG_ARM64
331*4882a593Smuzhiyun /*
332*4882a593Smuzhiyun  * This is a TPM Command Response Buffer start method that invokes a
333*4882a593Smuzhiyun  * Secure Monitor Call to requrest the firmware to execute or cancel
334*4882a593Smuzhiyun  * a TPM 2.0 command.
335*4882a593Smuzhiyun  */
tpm_crb_smc_start(struct device * dev,unsigned long func_id)336*4882a593Smuzhiyun static int tpm_crb_smc_start(struct device *dev, unsigned long func_id)
337*4882a593Smuzhiyun {
338*4882a593Smuzhiyun 	struct arm_smccc_res res;
339*4882a593Smuzhiyun 
340*4882a593Smuzhiyun 	arm_smccc_smc(func_id, 0, 0, 0, 0, 0, 0, 0, &res);
341*4882a593Smuzhiyun 	if (res.a0 != 0) {
342*4882a593Smuzhiyun 		dev_err(dev,
343*4882a593Smuzhiyun 			FW_BUG "tpm_crb_smc_start() returns res.a0 = 0x%lx\n",
344*4882a593Smuzhiyun 			res.a0);
345*4882a593Smuzhiyun 		return -EIO;
346*4882a593Smuzhiyun 	}
347*4882a593Smuzhiyun 
348*4882a593Smuzhiyun 	return 0;
349*4882a593Smuzhiyun }
350*4882a593Smuzhiyun #else
tpm_crb_smc_start(struct device * dev,unsigned long func_id)351*4882a593Smuzhiyun static int tpm_crb_smc_start(struct device *dev, unsigned long func_id)
352*4882a593Smuzhiyun {
353*4882a593Smuzhiyun 	dev_err(dev, FW_BUG "tpm_crb: incorrect start method\n");
354*4882a593Smuzhiyun 	return -EINVAL;
355*4882a593Smuzhiyun }
356*4882a593Smuzhiyun #endif
357*4882a593Smuzhiyun 
crb_send(struct tpm_chip * chip,u8 * buf,size_t len)358*4882a593Smuzhiyun static int crb_send(struct tpm_chip *chip, u8 *buf, size_t len)
359*4882a593Smuzhiyun {
360*4882a593Smuzhiyun 	struct crb_priv *priv = dev_get_drvdata(&chip->dev);
361*4882a593Smuzhiyun 	int rc = 0;
362*4882a593Smuzhiyun 
363*4882a593Smuzhiyun 	/* Zero the cancel register so that the next command will not get
364*4882a593Smuzhiyun 	 * canceled.
365*4882a593Smuzhiyun 	 */
366*4882a593Smuzhiyun 	iowrite32(0, &priv->regs_t->ctrl_cancel);
367*4882a593Smuzhiyun 
368*4882a593Smuzhiyun 	if (len > priv->cmd_size) {
369*4882a593Smuzhiyun 		dev_err(&chip->dev, "invalid command count value %zd %d\n",
370*4882a593Smuzhiyun 			len, priv->cmd_size);
371*4882a593Smuzhiyun 		return -E2BIG;
372*4882a593Smuzhiyun 	}
373*4882a593Smuzhiyun 
374*4882a593Smuzhiyun 	memcpy_toio(priv->cmd, buf, len);
375*4882a593Smuzhiyun 
376*4882a593Smuzhiyun 	/* Make sure that cmd is populated before issuing start. */
377*4882a593Smuzhiyun 	wmb();
378*4882a593Smuzhiyun 
379*4882a593Smuzhiyun 	/* The reason for the extra quirk is that the PTT in 4th Gen Core CPUs
380*4882a593Smuzhiyun 	 * report only ACPI start but in practice seems to require both
381*4882a593Smuzhiyun 	 * CRB start, hence invoking CRB start method if hid == MSFT0101.
382*4882a593Smuzhiyun 	 */
383*4882a593Smuzhiyun 	if ((priv->sm == ACPI_TPM2_COMMAND_BUFFER) ||
384*4882a593Smuzhiyun 	    (priv->sm == ACPI_TPM2_MEMORY_MAPPED) ||
385*4882a593Smuzhiyun 	    (!strcmp(priv->hid, "MSFT0101")))
386*4882a593Smuzhiyun 		iowrite32(CRB_START_INVOKE, &priv->regs_t->ctrl_start);
387*4882a593Smuzhiyun 
388*4882a593Smuzhiyun 	if ((priv->sm == ACPI_TPM2_START_METHOD) ||
389*4882a593Smuzhiyun 	    (priv->sm == ACPI_TPM2_COMMAND_BUFFER_WITH_START_METHOD))
390*4882a593Smuzhiyun 		rc = crb_do_acpi_start(chip);
391*4882a593Smuzhiyun 
392*4882a593Smuzhiyun 	if (priv->sm == ACPI_TPM2_COMMAND_BUFFER_WITH_ARM_SMC) {
393*4882a593Smuzhiyun 		iowrite32(CRB_START_INVOKE, &priv->regs_t->ctrl_start);
394*4882a593Smuzhiyun 		rc = tpm_crb_smc_start(&chip->dev, priv->smc_func_id);
395*4882a593Smuzhiyun 	}
396*4882a593Smuzhiyun 
397*4882a593Smuzhiyun 	return rc;
398*4882a593Smuzhiyun }
399*4882a593Smuzhiyun 
crb_cancel(struct tpm_chip * chip)400*4882a593Smuzhiyun static void crb_cancel(struct tpm_chip *chip)
401*4882a593Smuzhiyun {
402*4882a593Smuzhiyun 	struct crb_priv *priv = dev_get_drvdata(&chip->dev);
403*4882a593Smuzhiyun 
404*4882a593Smuzhiyun 	iowrite32(CRB_CANCEL_INVOKE, &priv->regs_t->ctrl_cancel);
405*4882a593Smuzhiyun 
406*4882a593Smuzhiyun 	if (((priv->sm == ACPI_TPM2_START_METHOD) ||
407*4882a593Smuzhiyun 	    (priv->sm == ACPI_TPM2_COMMAND_BUFFER_WITH_START_METHOD)) &&
408*4882a593Smuzhiyun 	     crb_do_acpi_start(chip))
409*4882a593Smuzhiyun 		dev_err(&chip->dev, "ACPI Start failed\n");
410*4882a593Smuzhiyun }
411*4882a593Smuzhiyun 
crb_req_canceled(struct tpm_chip * chip,u8 status)412*4882a593Smuzhiyun static bool crb_req_canceled(struct tpm_chip *chip, u8 status)
413*4882a593Smuzhiyun {
414*4882a593Smuzhiyun 	struct crb_priv *priv = dev_get_drvdata(&chip->dev);
415*4882a593Smuzhiyun 	u32 cancel = ioread32(&priv->regs_t->ctrl_cancel);
416*4882a593Smuzhiyun 
417*4882a593Smuzhiyun 	return (cancel & CRB_CANCEL_INVOKE) == CRB_CANCEL_INVOKE;
418*4882a593Smuzhiyun }
419*4882a593Smuzhiyun 
420*4882a593Smuzhiyun static const struct tpm_class_ops tpm_crb = {
421*4882a593Smuzhiyun 	.flags = TPM_OPS_AUTO_STARTUP,
422*4882a593Smuzhiyun 	.status = crb_status,
423*4882a593Smuzhiyun 	.recv = crb_recv,
424*4882a593Smuzhiyun 	.send = crb_send,
425*4882a593Smuzhiyun 	.cancel = crb_cancel,
426*4882a593Smuzhiyun 	.req_canceled = crb_req_canceled,
427*4882a593Smuzhiyun 	.go_idle  = crb_go_idle,
428*4882a593Smuzhiyun 	.cmd_ready = crb_cmd_ready,
429*4882a593Smuzhiyun 	.request_locality = crb_request_locality,
430*4882a593Smuzhiyun 	.relinquish_locality = crb_relinquish_locality,
431*4882a593Smuzhiyun 	.req_complete_mask = CRB_DRV_STS_COMPLETE,
432*4882a593Smuzhiyun 	.req_complete_val = CRB_DRV_STS_COMPLETE,
433*4882a593Smuzhiyun };
434*4882a593Smuzhiyun 
crb_check_resource(struct acpi_resource * ares,void * data)435*4882a593Smuzhiyun static int crb_check_resource(struct acpi_resource *ares, void *data)
436*4882a593Smuzhiyun {
437*4882a593Smuzhiyun 	struct resource *iores_array = data;
438*4882a593Smuzhiyun 	struct resource_win win;
439*4882a593Smuzhiyun 	struct resource *res = &(win.res);
440*4882a593Smuzhiyun 	int i;
441*4882a593Smuzhiyun 
442*4882a593Smuzhiyun 	if (acpi_dev_resource_memory(ares, res) ||
443*4882a593Smuzhiyun 	    acpi_dev_resource_address_space(ares, &win)) {
444*4882a593Smuzhiyun 		for (i = 0; i < TPM_CRB_MAX_RESOURCES + 1; ++i) {
445*4882a593Smuzhiyun 			if (resource_type(iores_array + i) != IORESOURCE_MEM) {
446*4882a593Smuzhiyun 				iores_array[i] = *res;
447*4882a593Smuzhiyun 				iores_array[i].name = NULL;
448*4882a593Smuzhiyun 				break;
449*4882a593Smuzhiyun 			}
450*4882a593Smuzhiyun 		}
451*4882a593Smuzhiyun 	}
452*4882a593Smuzhiyun 
453*4882a593Smuzhiyun 	return 1;
454*4882a593Smuzhiyun }
455*4882a593Smuzhiyun 
crb_map_res(struct device * dev,struct resource * iores,void __iomem ** iobase_ptr,u64 start,u32 size)456*4882a593Smuzhiyun static void __iomem *crb_map_res(struct device *dev, struct resource *iores,
457*4882a593Smuzhiyun 				 void __iomem **iobase_ptr, u64 start, u32 size)
458*4882a593Smuzhiyun {
459*4882a593Smuzhiyun 	struct resource new_res = {
460*4882a593Smuzhiyun 		.start	= start,
461*4882a593Smuzhiyun 		.end	= start + size - 1,
462*4882a593Smuzhiyun 		.flags	= IORESOURCE_MEM,
463*4882a593Smuzhiyun 	};
464*4882a593Smuzhiyun 
465*4882a593Smuzhiyun 	/* Detect a 64 bit address on a 32 bit system */
466*4882a593Smuzhiyun 	if (start != new_res.start)
467*4882a593Smuzhiyun 		return (void __iomem *) ERR_PTR(-EINVAL);
468*4882a593Smuzhiyun 
469*4882a593Smuzhiyun 	if (!iores)
470*4882a593Smuzhiyun 		return devm_ioremap_resource(dev, &new_res);
471*4882a593Smuzhiyun 
472*4882a593Smuzhiyun 	if (!*iobase_ptr) {
473*4882a593Smuzhiyun 		*iobase_ptr = devm_ioremap_resource(dev, iores);
474*4882a593Smuzhiyun 		if (IS_ERR(*iobase_ptr))
475*4882a593Smuzhiyun 			return *iobase_ptr;
476*4882a593Smuzhiyun 	}
477*4882a593Smuzhiyun 
478*4882a593Smuzhiyun 	return *iobase_ptr + (new_res.start - iores->start);
479*4882a593Smuzhiyun }
480*4882a593Smuzhiyun 
481*4882a593Smuzhiyun /*
482*4882a593Smuzhiyun  * Work around broken BIOSs that return inconsistent values from the ACPI
483*4882a593Smuzhiyun  * region vs the registers. Trust the ACPI region. Such broken systems
484*4882a593Smuzhiyun  * probably cannot send large TPM commands since the buffer will be truncated.
485*4882a593Smuzhiyun  */
crb_fixup_cmd_size(struct device * dev,struct resource * io_res,u64 start,u64 size)486*4882a593Smuzhiyun static u64 crb_fixup_cmd_size(struct device *dev, struct resource *io_res,
487*4882a593Smuzhiyun 			      u64 start, u64 size)
488*4882a593Smuzhiyun {
489*4882a593Smuzhiyun 	if (io_res->start > start || io_res->end < start)
490*4882a593Smuzhiyun 		return size;
491*4882a593Smuzhiyun 
492*4882a593Smuzhiyun 	if (start + size - 1 <= io_res->end)
493*4882a593Smuzhiyun 		return size;
494*4882a593Smuzhiyun 
495*4882a593Smuzhiyun 	dev_err(dev,
496*4882a593Smuzhiyun 		FW_BUG "ACPI region does not cover the entire command/response buffer. %pr vs %llx %llx\n",
497*4882a593Smuzhiyun 		io_res, start, size);
498*4882a593Smuzhiyun 
499*4882a593Smuzhiyun 	return io_res->end - start + 1;
500*4882a593Smuzhiyun }
501*4882a593Smuzhiyun 
crb_map_io(struct acpi_device * device,struct crb_priv * priv,struct acpi_table_tpm2 * buf)502*4882a593Smuzhiyun static int crb_map_io(struct acpi_device *device, struct crb_priv *priv,
503*4882a593Smuzhiyun 		      struct acpi_table_tpm2 *buf)
504*4882a593Smuzhiyun {
505*4882a593Smuzhiyun 	struct list_head acpi_resource_list;
506*4882a593Smuzhiyun 	struct resource iores_array[TPM_CRB_MAX_RESOURCES + 1] = { {0} };
507*4882a593Smuzhiyun 	void __iomem *iobase_array[TPM_CRB_MAX_RESOURCES] = {NULL};
508*4882a593Smuzhiyun 	struct device *dev = &device->dev;
509*4882a593Smuzhiyun 	struct resource *iores;
510*4882a593Smuzhiyun 	void __iomem **iobase_ptr;
511*4882a593Smuzhiyun 	int i;
512*4882a593Smuzhiyun 	u32 pa_high, pa_low;
513*4882a593Smuzhiyun 	u64 cmd_pa;
514*4882a593Smuzhiyun 	u32 cmd_size;
515*4882a593Smuzhiyun 	__le64 __rsp_pa;
516*4882a593Smuzhiyun 	u64 rsp_pa;
517*4882a593Smuzhiyun 	u32 rsp_size;
518*4882a593Smuzhiyun 	int ret;
519*4882a593Smuzhiyun 
520*4882a593Smuzhiyun 	INIT_LIST_HEAD(&acpi_resource_list);
521*4882a593Smuzhiyun 	ret = acpi_dev_get_resources(device, &acpi_resource_list,
522*4882a593Smuzhiyun 				     crb_check_resource, iores_array);
523*4882a593Smuzhiyun 	if (ret < 0)
524*4882a593Smuzhiyun 		return ret;
525*4882a593Smuzhiyun 	acpi_dev_free_resource_list(&acpi_resource_list);
526*4882a593Smuzhiyun 
527*4882a593Smuzhiyun 	if (resource_type(iores_array) != IORESOURCE_MEM) {
528*4882a593Smuzhiyun 		dev_err(dev, FW_BUG "TPM2 ACPI table does not define a memory resource\n");
529*4882a593Smuzhiyun 		return -EINVAL;
530*4882a593Smuzhiyun 	} else if (resource_type(iores_array + TPM_CRB_MAX_RESOURCES) ==
531*4882a593Smuzhiyun 		IORESOURCE_MEM) {
532*4882a593Smuzhiyun 		dev_warn(dev, "TPM2 ACPI table defines too many memory resources\n");
533*4882a593Smuzhiyun 		memset(iores_array + TPM_CRB_MAX_RESOURCES,
534*4882a593Smuzhiyun 		       0, sizeof(*iores_array));
535*4882a593Smuzhiyun 		iores_array[TPM_CRB_MAX_RESOURCES].flags = 0;
536*4882a593Smuzhiyun 	}
537*4882a593Smuzhiyun 
538*4882a593Smuzhiyun 	iores = NULL;
539*4882a593Smuzhiyun 	iobase_ptr = NULL;
540*4882a593Smuzhiyun 	for (i = 0; resource_type(iores_array + i) == IORESOURCE_MEM; ++i) {
541*4882a593Smuzhiyun 		if (buf->control_address >= iores_array[i].start &&
542*4882a593Smuzhiyun 		    buf->control_address + sizeof(struct crb_regs_tail) - 1 <=
543*4882a593Smuzhiyun 		    iores_array[i].end) {
544*4882a593Smuzhiyun 			iores = iores_array + i;
545*4882a593Smuzhiyun 			iobase_ptr = iobase_array + i;
546*4882a593Smuzhiyun 			break;
547*4882a593Smuzhiyun 		}
548*4882a593Smuzhiyun 	}
549*4882a593Smuzhiyun 
550*4882a593Smuzhiyun 	priv->regs_t = crb_map_res(dev, iores, iobase_ptr, buf->control_address,
551*4882a593Smuzhiyun 				   sizeof(struct crb_regs_tail));
552*4882a593Smuzhiyun 
553*4882a593Smuzhiyun 	if (IS_ERR(priv->regs_t))
554*4882a593Smuzhiyun 		return PTR_ERR(priv->regs_t);
555*4882a593Smuzhiyun 
556*4882a593Smuzhiyun 	/* The ACPI IO region starts at the head area and continues to include
557*4882a593Smuzhiyun 	 * the control area, as one nice sane region except for some older
558*4882a593Smuzhiyun 	 * stuff that puts the control area outside the ACPI IO region.
559*4882a593Smuzhiyun 	 */
560*4882a593Smuzhiyun 	if ((priv->sm == ACPI_TPM2_COMMAND_BUFFER) ||
561*4882a593Smuzhiyun 	    (priv->sm == ACPI_TPM2_MEMORY_MAPPED)) {
562*4882a593Smuzhiyun 		if (iores &&
563*4882a593Smuzhiyun 		    buf->control_address == iores->start +
564*4882a593Smuzhiyun 		    sizeof(*priv->regs_h))
565*4882a593Smuzhiyun 			priv->regs_h = *iobase_ptr;
566*4882a593Smuzhiyun 		else
567*4882a593Smuzhiyun 			dev_warn(dev, FW_BUG "Bad ACPI memory layout");
568*4882a593Smuzhiyun 	}
569*4882a593Smuzhiyun 
570*4882a593Smuzhiyun 	ret = __crb_request_locality(dev, priv, 0);
571*4882a593Smuzhiyun 	if (ret)
572*4882a593Smuzhiyun 		return ret;
573*4882a593Smuzhiyun 
574*4882a593Smuzhiyun 	/*
575*4882a593Smuzhiyun 	 * PTT HW bug w/a: wake up the device to access
576*4882a593Smuzhiyun 	 * possibly not retained registers.
577*4882a593Smuzhiyun 	 */
578*4882a593Smuzhiyun 	ret = __crb_cmd_ready(dev, priv);
579*4882a593Smuzhiyun 	if (ret)
580*4882a593Smuzhiyun 		goto out_relinquish_locality;
581*4882a593Smuzhiyun 
582*4882a593Smuzhiyun 	pa_high = ioread32(&priv->regs_t->ctrl_cmd_pa_high);
583*4882a593Smuzhiyun 	pa_low  = ioread32(&priv->regs_t->ctrl_cmd_pa_low);
584*4882a593Smuzhiyun 	cmd_pa = ((u64)pa_high << 32) | pa_low;
585*4882a593Smuzhiyun 	cmd_size = ioread32(&priv->regs_t->ctrl_cmd_size);
586*4882a593Smuzhiyun 
587*4882a593Smuzhiyun 	iores = NULL;
588*4882a593Smuzhiyun 	iobase_ptr = NULL;
589*4882a593Smuzhiyun 	for (i = 0; iores_array[i].end; ++i) {
590*4882a593Smuzhiyun 		if (cmd_pa >= iores_array[i].start &&
591*4882a593Smuzhiyun 		    cmd_pa <= iores_array[i].end) {
592*4882a593Smuzhiyun 			iores = iores_array + i;
593*4882a593Smuzhiyun 			iobase_ptr = iobase_array + i;
594*4882a593Smuzhiyun 			break;
595*4882a593Smuzhiyun 		}
596*4882a593Smuzhiyun 	}
597*4882a593Smuzhiyun 
598*4882a593Smuzhiyun 	if (iores)
599*4882a593Smuzhiyun 		cmd_size = crb_fixup_cmd_size(dev, iores, cmd_pa, cmd_size);
600*4882a593Smuzhiyun 
601*4882a593Smuzhiyun 	dev_dbg(dev, "cmd_hi = %X cmd_low = %X cmd_size %X\n",
602*4882a593Smuzhiyun 		pa_high, pa_low, cmd_size);
603*4882a593Smuzhiyun 
604*4882a593Smuzhiyun 	priv->cmd = crb_map_res(dev, iores, iobase_ptr,	cmd_pa, cmd_size);
605*4882a593Smuzhiyun 	if (IS_ERR(priv->cmd)) {
606*4882a593Smuzhiyun 		ret = PTR_ERR(priv->cmd);
607*4882a593Smuzhiyun 		goto out;
608*4882a593Smuzhiyun 	}
609*4882a593Smuzhiyun 
610*4882a593Smuzhiyun 	memcpy_fromio(&__rsp_pa, &priv->regs_t->ctrl_rsp_pa, 8);
611*4882a593Smuzhiyun 	rsp_pa = le64_to_cpu(__rsp_pa);
612*4882a593Smuzhiyun 	rsp_size = ioread32(&priv->regs_t->ctrl_rsp_size);
613*4882a593Smuzhiyun 
614*4882a593Smuzhiyun 	iores = NULL;
615*4882a593Smuzhiyun 	iobase_ptr = NULL;
616*4882a593Smuzhiyun 	for (i = 0; resource_type(iores_array + i) == IORESOURCE_MEM; ++i) {
617*4882a593Smuzhiyun 		if (rsp_pa >= iores_array[i].start &&
618*4882a593Smuzhiyun 		    rsp_pa <= iores_array[i].end) {
619*4882a593Smuzhiyun 			iores = iores_array + i;
620*4882a593Smuzhiyun 			iobase_ptr = iobase_array + i;
621*4882a593Smuzhiyun 			break;
622*4882a593Smuzhiyun 		}
623*4882a593Smuzhiyun 	}
624*4882a593Smuzhiyun 
625*4882a593Smuzhiyun 	if (iores)
626*4882a593Smuzhiyun 		rsp_size = crb_fixup_cmd_size(dev, iores, rsp_pa, rsp_size);
627*4882a593Smuzhiyun 
628*4882a593Smuzhiyun 	if (cmd_pa != rsp_pa) {
629*4882a593Smuzhiyun 		priv->rsp = crb_map_res(dev, iores, iobase_ptr,
630*4882a593Smuzhiyun 					rsp_pa, rsp_size);
631*4882a593Smuzhiyun 		ret = PTR_ERR_OR_ZERO(priv->rsp);
632*4882a593Smuzhiyun 		goto out;
633*4882a593Smuzhiyun 	}
634*4882a593Smuzhiyun 
635*4882a593Smuzhiyun 	/* According to the PTP specification, overlapping command and response
636*4882a593Smuzhiyun 	 * buffer sizes must be identical.
637*4882a593Smuzhiyun 	 */
638*4882a593Smuzhiyun 	if (cmd_size != rsp_size) {
639*4882a593Smuzhiyun 		dev_err(dev, FW_BUG "overlapping command and response buffer sizes are not identical");
640*4882a593Smuzhiyun 		ret = -EINVAL;
641*4882a593Smuzhiyun 		goto out;
642*4882a593Smuzhiyun 	}
643*4882a593Smuzhiyun 
644*4882a593Smuzhiyun 	priv->rsp = priv->cmd;
645*4882a593Smuzhiyun 
646*4882a593Smuzhiyun out:
647*4882a593Smuzhiyun 	if (!ret)
648*4882a593Smuzhiyun 		priv->cmd_size = cmd_size;
649*4882a593Smuzhiyun 
650*4882a593Smuzhiyun 	__crb_go_idle(dev, priv);
651*4882a593Smuzhiyun 
652*4882a593Smuzhiyun out_relinquish_locality:
653*4882a593Smuzhiyun 
654*4882a593Smuzhiyun 	__crb_relinquish_locality(dev, priv, 0);
655*4882a593Smuzhiyun 
656*4882a593Smuzhiyun 	return ret;
657*4882a593Smuzhiyun }
658*4882a593Smuzhiyun 
crb_acpi_add(struct acpi_device * device)659*4882a593Smuzhiyun static int crb_acpi_add(struct acpi_device *device)
660*4882a593Smuzhiyun {
661*4882a593Smuzhiyun 	struct acpi_table_tpm2 *buf;
662*4882a593Smuzhiyun 	struct crb_priv *priv;
663*4882a593Smuzhiyun 	struct tpm_chip *chip;
664*4882a593Smuzhiyun 	struct device *dev = &device->dev;
665*4882a593Smuzhiyun 	struct tpm2_crb_smc *crb_smc;
666*4882a593Smuzhiyun 	acpi_status status;
667*4882a593Smuzhiyun 	u32 sm;
668*4882a593Smuzhiyun 	int rc;
669*4882a593Smuzhiyun 
670*4882a593Smuzhiyun 	status = acpi_get_table(ACPI_SIG_TPM2, 1,
671*4882a593Smuzhiyun 				(struct acpi_table_header **) &buf);
672*4882a593Smuzhiyun 	if (ACPI_FAILURE(status) || buf->header.length < sizeof(*buf)) {
673*4882a593Smuzhiyun 		dev_err(dev, FW_BUG "failed to get TPM2 ACPI table\n");
674*4882a593Smuzhiyun 		return -EINVAL;
675*4882a593Smuzhiyun 	}
676*4882a593Smuzhiyun 
677*4882a593Smuzhiyun 	/* Should the FIFO driver handle this? */
678*4882a593Smuzhiyun 	sm = buf->start_method;
679*4882a593Smuzhiyun 	if (sm == ACPI_TPM2_MEMORY_MAPPED)
680*4882a593Smuzhiyun 		return -ENODEV;
681*4882a593Smuzhiyun 
682*4882a593Smuzhiyun 	priv = devm_kzalloc(dev, sizeof(struct crb_priv), GFP_KERNEL);
683*4882a593Smuzhiyun 	if (!priv)
684*4882a593Smuzhiyun 		return -ENOMEM;
685*4882a593Smuzhiyun 
686*4882a593Smuzhiyun 	if (sm == ACPI_TPM2_COMMAND_BUFFER_WITH_ARM_SMC) {
687*4882a593Smuzhiyun 		if (buf->header.length < (sizeof(*buf) + sizeof(*crb_smc))) {
688*4882a593Smuzhiyun 			dev_err(dev,
689*4882a593Smuzhiyun 				FW_BUG "TPM2 ACPI table has wrong size %u for start method type %d\n",
690*4882a593Smuzhiyun 				buf->header.length,
691*4882a593Smuzhiyun 				ACPI_TPM2_COMMAND_BUFFER_WITH_ARM_SMC);
692*4882a593Smuzhiyun 			return -EINVAL;
693*4882a593Smuzhiyun 		}
694*4882a593Smuzhiyun 		crb_smc = ACPI_ADD_PTR(struct tpm2_crb_smc, buf, sizeof(*buf));
695*4882a593Smuzhiyun 		priv->smc_func_id = crb_smc->smc_func_id;
696*4882a593Smuzhiyun 	}
697*4882a593Smuzhiyun 
698*4882a593Smuzhiyun 	priv->sm = sm;
699*4882a593Smuzhiyun 	priv->hid = acpi_device_hid(device);
700*4882a593Smuzhiyun 
701*4882a593Smuzhiyun 	rc = crb_map_io(device, priv, buf);
702*4882a593Smuzhiyun 	if (rc)
703*4882a593Smuzhiyun 		return rc;
704*4882a593Smuzhiyun 
705*4882a593Smuzhiyun 	chip = tpmm_chip_alloc(dev, &tpm_crb);
706*4882a593Smuzhiyun 	if (IS_ERR(chip))
707*4882a593Smuzhiyun 		return PTR_ERR(chip);
708*4882a593Smuzhiyun 
709*4882a593Smuzhiyun 	dev_set_drvdata(&chip->dev, priv);
710*4882a593Smuzhiyun 	chip->acpi_dev_handle = device->handle;
711*4882a593Smuzhiyun 	chip->flags = TPM_CHIP_FLAG_TPM2;
712*4882a593Smuzhiyun 
713*4882a593Smuzhiyun 	return tpm_chip_register(chip);
714*4882a593Smuzhiyun }
715*4882a593Smuzhiyun 
crb_acpi_remove(struct acpi_device * device)716*4882a593Smuzhiyun static int crb_acpi_remove(struct acpi_device *device)
717*4882a593Smuzhiyun {
718*4882a593Smuzhiyun 	struct device *dev = &device->dev;
719*4882a593Smuzhiyun 	struct tpm_chip *chip = dev_get_drvdata(dev);
720*4882a593Smuzhiyun 
721*4882a593Smuzhiyun 	tpm_chip_unregister(chip);
722*4882a593Smuzhiyun 
723*4882a593Smuzhiyun 	return 0;
724*4882a593Smuzhiyun }
725*4882a593Smuzhiyun 
726*4882a593Smuzhiyun static const struct dev_pm_ops crb_pm = {
727*4882a593Smuzhiyun 	SET_SYSTEM_SLEEP_PM_OPS(tpm_pm_suspend, tpm_pm_resume)
728*4882a593Smuzhiyun };
729*4882a593Smuzhiyun 
730*4882a593Smuzhiyun static const struct acpi_device_id crb_device_ids[] = {
731*4882a593Smuzhiyun 	{"MSFT0101", 0},
732*4882a593Smuzhiyun 	{"", 0},
733*4882a593Smuzhiyun };
734*4882a593Smuzhiyun MODULE_DEVICE_TABLE(acpi, crb_device_ids);
735*4882a593Smuzhiyun 
736*4882a593Smuzhiyun static struct acpi_driver crb_acpi_driver = {
737*4882a593Smuzhiyun 	.name = "tpm_crb",
738*4882a593Smuzhiyun 	.ids = crb_device_ids,
739*4882a593Smuzhiyun 	.ops = {
740*4882a593Smuzhiyun 		.add = crb_acpi_add,
741*4882a593Smuzhiyun 		.remove = crb_acpi_remove,
742*4882a593Smuzhiyun 	},
743*4882a593Smuzhiyun 	.drv = {
744*4882a593Smuzhiyun 		.pm = &crb_pm,
745*4882a593Smuzhiyun 	},
746*4882a593Smuzhiyun };
747*4882a593Smuzhiyun 
748*4882a593Smuzhiyun module_acpi_driver(crb_acpi_driver);
749*4882a593Smuzhiyun MODULE_AUTHOR("Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>");
750*4882a593Smuzhiyun MODULE_DESCRIPTION("TPM2 Driver");
751*4882a593Smuzhiyun MODULE_VERSION("0.1");
752*4882a593Smuzhiyun MODULE_LICENSE("GPL");
753