xref: /OK3568_Linux_fs/kernel/drivers/char/pcmcia/cm4000_cs.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun  /*
2*4882a593Smuzhiyun   * A driver for the PCMCIA Smartcard Reader "Omnikey CardMan Mobile 4000"
3*4882a593Smuzhiyun   *
4*4882a593Smuzhiyun   * cm4000_cs.c support.linux@omnikey.com
5*4882a593Smuzhiyun   *
6*4882a593Smuzhiyun   * Tue Oct 23 11:32:43 GMT 2001 herp - cleaned up header files
7*4882a593Smuzhiyun   * Sun Jan 20 10:11:15 MET 2002 herp - added modversion header files
8*4882a593Smuzhiyun   * Thu Nov 14 16:34:11 GMT 2002 mh   - added PPS functionality
9*4882a593Smuzhiyun   * Tue Nov 19 16:36:27 GMT 2002 mh   - added SUSPEND/RESUME functionailty
10*4882a593Smuzhiyun   * Wed Jul 28 12:55:01 CEST 2004 mh  - kernel 2.6 adjustments
11*4882a593Smuzhiyun   *
12*4882a593Smuzhiyun   * current version: 2.4.0gm4
13*4882a593Smuzhiyun   *
14*4882a593Smuzhiyun   * (C) 2000,2001,2002,2003,2004 Omnikey AG
15*4882a593Smuzhiyun   *
16*4882a593Smuzhiyun   * (C) 2005-2006 Harald Welte <laforge@gnumonks.org>
17*4882a593Smuzhiyun   * 	- Adhere to Kernel process/coding-style.rst
18*4882a593Smuzhiyun   * 	- Port to 2.6.13 "new" style PCMCIA
19*4882a593Smuzhiyun   * 	- Check for copy_{from,to}_user return values
20*4882a593Smuzhiyun   * 	- Use nonseekable_open()
21*4882a593Smuzhiyun   * 	- add class interface for udev device creation
22*4882a593Smuzhiyun   *
23*4882a593Smuzhiyun   * All rights reserved. Licensed under dual BSD/GPL license.
24*4882a593Smuzhiyun   */
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #include <linux/kernel.h>
27*4882a593Smuzhiyun #include <linux/module.h>
28*4882a593Smuzhiyun #include <linux/slab.h>
29*4882a593Smuzhiyun #include <linux/init.h>
30*4882a593Smuzhiyun #include <linux/fs.h>
31*4882a593Smuzhiyun #include <linux/delay.h>
32*4882a593Smuzhiyun #include <linux/bitrev.h>
33*4882a593Smuzhiyun #include <linux/mutex.h>
34*4882a593Smuzhiyun #include <linux/uaccess.h>
35*4882a593Smuzhiyun #include <linux/io.h>
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun #include <pcmcia/cistpl.h>
38*4882a593Smuzhiyun #include <pcmcia/cisreg.h>
39*4882a593Smuzhiyun #include <pcmcia/ciscode.h>
40*4882a593Smuzhiyun #include <pcmcia/ds.h>
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun #include <linux/cm4000_cs.h>
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun /* #define ATR_CSUM */
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun #define reader_to_dev(x)	(&x->p_dev->dev)
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun /* n (debug level) is ignored */
49*4882a593Smuzhiyun /* additional debug output may be enabled by re-compiling with
50*4882a593Smuzhiyun  * CM4000_DEBUG set */
51*4882a593Smuzhiyun /* #define CM4000_DEBUG */
52*4882a593Smuzhiyun #define DEBUGP(n, rdr, x, args...) do { 		\
53*4882a593Smuzhiyun 		dev_dbg(reader_to_dev(rdr), "%s:" x, 	\
54*4882a593Smuzhiyun 			   __func__ , ## args);		\
55*4882a593Smuzhiyun 	} while (0)
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun static DEFINE_MUTEX(cmm_mutex);
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun #define	T_1SEC		(HZ)
60*4882a593Smuzhiyun #define	T_10MSEC	msecs_to_jiffies(10)
61*4882a593Smuzhiyun #define	T_20MSEC	msecs_to_jiffies(20)
62*4882a593Smuzhiyun #define	T_40MSEC	msecs_to_jiffies(40)
63*4882a593Smuzhiyun #define	T_50MSEC	msecs_to_jiffies(50)
64*4882a593Smuzhiyun #define	T_100MSEC	msecs_to_jiffies(100)
65*4882a593Smuzhiyun #define	T_500MSEC	msecs_to_jiffies(500)
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun static void cm4000_release(struct pcmcia_device *link);
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun static int major;		/* major number we get from the kernel */
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun /* note: the first state has to have number 0 always */
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun #define	M_FETCH_ATR	0
74*4882a593Smuzhiyun #define	M_TIMEOUT_WAIT	1
75*4882a593Smuzhiyun #define	M_READ_ATR_LEN	2
76*4882a593Smuzhiyun #define	M_READ_ATR	3
77*4882a593Smuzhiyun #define	M_ATR_PRESENT	4
78*4882a593Smuzhiyun #define	M_BAD_CARD	5
79*4882a593Smuzhiyun #define M_CARDOFF	6
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun #define	LOCK_IO			0
82*4882a593Smuzhiyun #define	LOCK_MONITOR		1
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun #define IS_AUTOPPS_ACT		 6
85*4882a593Smuzhiyun #define	IS_PROCBYTE_PRESENT	 7
86*4882a593Smuzhiyun #define	IS_INVREV		 8
87*4882a593Smuzhiyun #define IS_ANY_T0		 9
88*4882a593Smuzhiyun #define	IS_ANY_T1		10
89*4882a593Smuzhiyun #define	IS_ATR_PRESENT		11
90*4882a593Smuzhiyun #define	IS_ATR_VALID		12
91*4882a593Smuzhiyun #define	IS_CMM_ABSENT		13
92*4882a593Smuzhiyun #define	IS_BAD_LENGTH		14
93*4882a593Smuzhiyun #define	IS_BAD_CSUM		15
94*4882a593Smuzhiyun #define	IS_BAD_CARD		16
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun #define REG_FLAGS0(x)		(x + 0)
97*4882a593Smuzhiyun #define REG_FLAGS1(x)		(x + 1)
98*4882a593Smuzhiyun #define REG_NUM_BYTES(x)	(x + 2)
99*4882a593Smuzhiyun #define REG_BUF_ADDR(x)		(x + 3)
100*4882a593Smuzhiyun #define REG_BUF_DATA(x)		(x + 4)
101*4882a593Smuzhiyun #define REG_NUM_SEND(x)		(x + 5)
102*4882a593Smuzhiyun #define REG_BAUDRATE(x)		(x + 6)
103*4882a593Smuzhiyun #define REG_STOPBITS(x)		(x + 7)
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun struct cm4000_dev {
106*4882a593Smuzhiyun 	struct pcmcia_device *p_dev;
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun 	unsigned char atr[MAX_ATR];
109*4882a593Smuzhiyun 	unsigned char rbuf[512];
110*4882a593Smuzhiyun 	unsigned char sbuf[512];
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun 	wait_queue_head_t devq;		/* when removing cardman must not be
113*4882a593Smuzhiyun 					   zeroed! */
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun 	wait_queue_head_t ioq;		/* if IO is locked, wait on this Q */
116*4882a593Smuzhiyun 	wait_queue_head_t atrq;		/* wait for ATR valid */
117*4882a593Smuzhiyun 	wait_queue_head_t readq;	/* used by write to wake blk.read */
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun 	/* warning: do not move this fields.
120*4882a593Smuzhiyun 	 * initialising to zero depends on it - see ZERO_DEV below.  */
121*4882a593Smuzhiyun 	unsigned char atr_csum;
122*4882a593Smuzhiyun 	unsigned char atr_len_retry;
123*4882a593Smuzhiyun 	unsigned short atr_len;
124*4882a593Smuzhiyun 	unsigned short rlen;	/* bytes avail. after write */
125*4882a593Smuzhiyun 	unsigned short rpos;	/* latest read pos. write zeroes */
126*4882a593Smuzhiyun 	unsigned char procbyte;	/* T=0 procedure byte */
127*4882a593Smuzhiyun 	unsigned char mstate;	/* state of card monitor */
128*4882a593Smuzhiyun 	unsigned char cwarn;	/* slow down warning */
129*4882a593Smuzhiyun 	unsigned char flags0;	/* cardman IO-flags 0 */
130*4882a593Smuzhiyun 	unsigned char flags1;	/* cardman IO-flags 1 */
131*4882a593Smuzhiyun 	unsigned int mdelay;	/* variable monitor speeds, in jiffies */
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun 	unsigned int baudv;	/* baud value for speed */
134*4882a593Smuzhiyun 	unsigned char ta1;
135*4882a593Smuzhiyun 	unsigned char proto;	/* T=0, T=1, ... */
136*4882a593Smuzhiyun 	unsigned long flags;	/* lock+flags (MONITOR,IO,ATR) * for concurrent
137*4882a593Smuzhiyun 				   access */
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun 	unsigned char pts[4];
140*4882a593Smuzhiyun 
141*4882a593Smuzhiyun 	struct timer_list timer;	/* used to keep monitor running */
142*4882a593Smuzhiyun 	int monitor_running;
143*4882a593Smuzhiyun };
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun #define	ZERO_DEV(dev)  						\
146*4882a593Smuzhiyun 	memset(&dev->atr_csum,0,				\
147*4882a593Smuzhiyun 		sizeof(struct cm4000_dev) - 			\
148*4882a593Smuzhiyun 		offsetof(struct cm4000_dev, atr_csum))
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun static struct pcmcia_device *dev_table[CM4000_MAX_DEV];
151*4882a593Smuzhiyun static struct class *cmm_class;
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun /* This table doesn't use spaces after the comma between fields and thus
154*4882a593Smuzhiyun  * violates process/coding-style.rst.  However, I don't really think wrapping it around will
155*4882a593Smuzhiyun  * make it any clearer to read -HW */
156*4882a593Smuzhiyun static unsigned char fi_di_table[10][14] = {
157*4882a593Smuzhiyun /*FI     00   01   02   03   04   05   06   07   08   09   10   11   12   13 */
158*4882a593Smuzhiyun /*DI */
159*4882a593Smuzhiyun /* 0 */ {0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11},
160*4882a593Smuzhiyun /* 1 */ {0x01,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x91,0x11,0x11,0x11,0x11},
161*4882a593Smuzhiyun /* 2 */ {0x02,0x12,0x22,0x32,0x11,0x11,0x11,0x11,0x11,0x92,0xA2,0xB2,0x11,0x11},
162*4882a593Smuzhiyun /* 3 */ {0x03,0x13,0x23,0x33,0x43,0x53,0x63,0x11,0x11,0x93,0xA3,0xB3,0xC3,0xD3},
163*4882a593Smuzhiyun /* 4 */ {0x04,0x14,0x24,0x34,0x44,0x54,0x64,0x11,0x11,0x94,0xA4,0xB4,0xC4,0xD4},
164*4882a593Smuzhiyun /* 5 */ {0x00,0x15,0x25,0x35,0x45,0x55,0x65,0x11,0x11,0x95,0xA5,0xB5,0xC5,0xD5},
165*4882a593Smuzhiyun /* 6 */ {0x06,0x16,0x26,0x36,0x46,0x56,0x66,0x11,0x11,0x96,0xA6,0xB6,0xC6,0xD6},
166*4882a593Smuzhiyun /* 7 */ {0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11},
167*4882a593Smuzhiyun /* 8 */ {0x08,0x11,0x28,0x38,0x48,0x58,0x68,0x11,0x11,0x98,0xA8,0xB8,0xC8,0xD8},
168*4882a593Smuzhiyun /* 9 */ {0x09,0x19,0x29,0x39,0x49,0x59,0x69,0x11,0x11,0x99,0xA9,0xB9,0xC9,0xD9}
169*4882a593Smuzhiyun };
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun #ifndef CM4000_DEBUG
172*4882a593Smuzhiyun #define	xoutb	outb
173*4882a593Smuzhiyun #define	xinb	inb
174*4882a593Smuzhiyun #else
xoutb(unsigned char val,unsigned short port)175*4882a593Smuzhiyun static inline void xoutb(unsigned char val, unsigned short port)
176*4882a593Smuzhiyun {
177*4882a593Smuzhiyun 	pr_debug("outb(val=%.2x,port=%.4x)\n", val, port);
178*4882a593Smuzhiyun 	outb(val, port);
179*4882a593Smuzhiyun }
xinb(unsigned short port)180*4882a593Smuzhiyun static inline unsigned char xinb(unsigned short port)
181*4882a593Smuzhiyun {
182*4882a593Smuzhiyun 	unsigned char val;
183*4882a593Smuzhiyun 
184*4882a593Smuzhiyun 	val = inb(port);
185*4882a593Smuzhiyun 	pr_debug("%.2x=inb(%.4x)\n", val, port);
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun 	return val;
188*4882a593Smuzhiyun }
189*4882a593Smuzhiyun #endif
190*4882a593Smuzhiyun 
invert_revert(unsigned char ch)191*4882a593Smuzhiyun static inline unsigned char invert_revert(unsigned char ch)
192*4882a593Smuzhiyun {
193*4882a593Smuzhiyun 	return bitrev8(~ch);
194*4882a593Smuzhiyun }
195*4882a593Smuzhiyun 
str_invert_revert(unsigned char * b,int len)196*4882a593Smuzhiyun static void str_invert_revert(unsigned char *b, int len)
197*4882a593Smuzhiyun {
198*4882a593Smuzhiyun 	int i;
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun 	for (i = 0; i < len; i++)
201*4882a593Smuzhiyun 		b[i] = invert_revert(b[i]);
202*4882a593Smuzhiyun }
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun #define	ATRLENCK(dev,pos) \
205*4882a593Smuzhiyun 	if (pos>=dev->atr_len || pos>=MAX_ATR) \
206*4882a593Smuzhiyun 		goto return_0;
207*4882a593Smuzhiyun 
calc_baudv(unsigned char fidi)208*4882a593Smuzhiyun static unsigned int calc_baudv(unsigned char fidi)
209*4882a593Smuzhiyun {
210*4882a593Smuzhiyun 	unsigned int wcrcf, wbrcf, fi_rfu, di_rfu;
211*4882a593Smuzhiyun 
212*4882a593Smuzhiyun 	fi_rfu = 372;
213*4882a593Smuzhiyun 	di_rfu = 1;
214*4882a593Smuzhiyun 
215*4882a593Smuzhiyun 	/* FI */
216*4882a593Smuzhiyun 	switch ((fidi >> 4) & 0x0F) {
217*4882a593Smuzhiyun 	case 0x00:
218*4882a593Smuzhiyun 		wcrcf = 372;
219*4882a593Smuzhiyun 		break;
220*4882a593Smuzhiyun 	case 0x01:
221*4882a593Smuzhiyun 		wcrcf = 372;
222*4882a593Smuzhiyun 		break;
223*4882a593Smuzhiyun 	case 0x02:
224*4882a593Smuzhiyun 		wcrcf = 558;
225*4882a593Smuzhiyun 		break;
226*4882a593Smuzhiyun 	case 0x03:
227*4882a593Smuzhiyun 		wcrcf = 744;
228*4882a593Smuzhiyun 		break;
229*4882a593Smuzhiyun 	case 0x04:
230*4882a593Smuzhiyun 		wcrcf = 1116;
231*4882a593Smuzhiyun 		break;
232*4882a593Smuzhiyun 	case 0x05:
233*4882a593Smuzhiyun 		wcrcf = 1488;
234*4882a593Smuzhiyun 		break;
235*4882a593Smuzhiyun 	case 0x06:
236*4882a593Smuzhiyun 		wcrcf = 1860;
237*4882a593Smuzhiyun 		break;
238*4882a593Smuzhiyun 	case 0x07:
239*4882a593Smuzhiyun 		wcrcf = fi_rfu;
240*4882a593Smuzhiyun 		break;
241*4882a593Smuzhiyun 	case 0x08:
242*4882a593Smuzhiyun 		wcrcf = fi_rfu;
243*4882a593Smuzhiyun 		break;
244*4882a593Smuzhiyun 	case 0x09:
245*4882a593Smuzhiyun 		wcrcf = 512;
246*4882a593Smuzhiyun 		break;
247*4882a593Smuzhiyun 	case 0x0A:
248*4882a593Smuzhiyun 		wcrcf = 768;
249*4882a593Smuzhiyun 		break;
250*4882a593Smuzhiyun 	case 0x0B:
251*4882a593Smuzhiyun 		wcrcf = 1024;
252*4882a593Smuzhiyun 		break;
253*4882a593Smuzhiyun 	case 0x0C:
254*4882a593Smuzhiyun 		wcrcf = 1536;
255*4882a593Smuzhiyun 		break;
256*4882a593Smuzhiyun 	case 0x0D:
257*4882a593Smuzhiyun 		wcrcf = 2048;
258*4882a593Smuzhiyun 		break;
259*4882a593Smuzhiyun 	default:
260*4882a593Smuzhiyun 		wcrcf = fi_rfu;
261*4882a593Smuzhiyun 		break;
262*4882a593Smuzhiyun 	}
263*4882a593Smuzhiyun 
264*4882a593Smuzhiyun 	/* DI */
265*4882a593Smuzhiyun 	switch (fidi & 0x0F) {
266*4882a593Smuzhiyun 	case 0x00:
267*4882a593Smuzhiyun 		wbrcf = di_rfu;
268*4882a593Smuzhiyun 		break;
269*4882a593Smuzhiyun 	case 0x01:
270*4882a593Smuzhiyun 		wbrcf = 1;
271*4882a593Smuzhiyun 		break;
272*4882a593Smuzhiyun 	case 0x02:
273*4882a593Smuzhiyun 		wbrcf = 2;
274*4882a593Smuzhiyun 		break;
275*4882a593Smuzhiyun 	case 0x03:
276*4882a593Smuzhiyun 		wbrcf = 4;
277*4882a593Smuzhiyun 		break;
278*4882a593Smuzhiyun 	case 0x04:
279*4882a593Smuzhiyun 		wbrcf = 8;
280*4882a593Smuzhiyun 		break;
281*4882a593Smuzhiyun 	case 0x05:
282*4882a593Smuzhiyun 		wbrcf = 16;
283*4882a593Smuzhiyun 		break;
284*4882a593Smuzhiyun 	case 0x06:
285*4882a593Smuzhiyun 		wbrcf = 32;
286*4882a593Smuzhiyun 		break;
287*4882a593Smuzhiyun 	case 0x07:
288*4882a593Smuzhiyun 		wbrcf = di_rfu;
289*4882a593Smuzhiyun 		break;
290*4882a593Smuzhiyun 	case 0x08:
291*4882a593Smuzhiyun 		wbrcf = 12;
292*4882a593Smuzhiyun 		break;
293*4882a593Smuzhiyun 	case 0x09:
294*4882a593Smuzhiyun 		wbrcf = 20;
295*4882a593Smuzhiyun 		break;
296*4882a593Smuzhiyun 	default:
297*4882a593Smuzhiyun 		wbrcf = di_rfu;
298*4882a593Smuzhiyun 		break;
299*4882a593Smuzhiyun 	}
300*4882a593Smuzhiyun 
301*4882a593Smuzhiyun 	return (wcrcf / wbrcf);
302*4882a593Smuzhiyun }
303*4882a593Smuzhiyun 
io_read_num_rec_bytes(unsigned int iobase,unsigned short * s)304*4882a593Smuzhiyun static unsigned short io_read_num_rec_bytes(unsigned int iobase,
305*4882a593Smuzhiyun 					    unsigned short *s)
306*4882a593Smuzhiyun {
307*4882a593Smuzhiyun 	unsigned short tmp;
308*4882a593Smuzhiyun 
309*4882a593Smuzhiyun 	tmp = *s = 0;
310*4882a593Smuzhiyun 	do {
311*4882a593Smuzhiyun 		*s = tmp;
312*4882a593Smuzhiyun 		tmp = inb(REG_NUM_BYTES(iobase)) |
313*4882a593Smuzhiyun 				(inb(REG_FLAGS0(iobase)) & 4 ? 0x100 : 0);
314*4882a593Smuzhiyun 	} while (tmp != *s);
315*4882a593Smuzhiyun 
316*4882a593Smuzhiyun 	return *s;
317*4882a593Smuzhiyun }
318*4882a593Smuzhiyun 
parse_atr(struct cm4000_dev * dev)319*4882a593Smuzhiyun static int parse_atr(struct cm4000_dev *dev)
320*4882a593Smuzhiyun {
321*4882a593Smuzhiyun 	unsigned char any_t1, any_t0;
322*4882a593Smuzhiyun 	unsigned char ch, ifno;
323*4882a593Smuzhiyun 	int ix, done;
324*4882a593Smuzhiyun 
325*4882a593Smuzhiyun 	DEBUGP(3, dev, "-> parse_atr: dev->atr_len = %i\n", dev->atr_len);
326*4882a593Smuzhiyun 
327*4882a593Smuzhiyun 	if (dev->atr_len < 3) {
328*4882a593Smuzhiyun 		DEBUGP(5, dev, "parse_atr: atr_len < 3\n");
329*4882a593Smuzhiyun 		return 0;
330*4882a593Smuzhiyun 	}
331*4882a593Smuzhiyun 
332*4882a593Smuzhiyun 	if (dev->atr[0] == 0x3f)
333*4882a593Smuzhiyun 		set_bit(IS_INVREV, &dev->flags);
334*4882a593Smuzhiyun 	else
335*4882a593Smuzhiyun 		clear_bit(IS_INVREV, &dev->flags);
336*4882a593Smuzhiyun 	ix = 1;
337*4882a593Smuzhiyun 	ifno = 1;
338*4882a593Smuzhiyun 	ch = dev->atr[1];
339*4882a593Smuzhiyun 	dev->proto = 0;		/* XXX PROTO */
340*4882a593Smuzhiyun 	any_t1 = any_t0 = done = 0;
341*4882a593Smuzhiyun 	dev->ta1 = 0x11;	/* defaults to 9600 baud */
342*4882a593Smuzhiyun 	do {
343*4882a593Smuzhiyun 		if (ifno == 1 && (ch & 0x10)) {
344*4882a593Smuzhiyun 			/* read first interface byte and TA1 is present */
345*4882a593Smuzhiyun 			dev->ta1 = dev->atr[2];
346*4882a593Smuzhiyun 			DEBUGP(5, dev, "Card says FiDi is 0x%.2x\n", dev->ta1);
347*4882a593Smuzhiyun 			ifno++;
348*4882a593Smuzhiyun 		} else if ((ifno == 2) && (ch & 0x10)) { /* TA(2) */
349*4882a593Smuzhiyun 			dev->ta1 = 0x11;
350*4882a593Smuzhiyun 			ifno++;
351*4882a593Smuzhiyun 		}
352*4882a593Smuzhiyun 
353*4882a593Smuzhiyun 		DEBUGP(5, dev, "Yi=%.2x\n", ch & 0xf0);
354*4882a593Smuzhiyun 		ix += ((ch & 0x10) >> 4)	/* no of int.face chars */
355*4882a593Smuzhiyun 		    +((ch & 0x20) >> 5)
356*4882a593Smuzhiyun 		    + ((ch & 0x40) >> 6)
357*4882a593Smuzhiyun 		    + ((ch & 0x80) >> 7);
358*4882a593Smuzhiyun 		/* ATRLENCK(dev,ix); */
359*4882a593Smuzhiyun 		if (ch & 0x80) {	/* TDi */
360*4882a593Smuzhiyun 			ch = dev->atr[ix];
361*4882a593Smuzhiyun 			if ((ch & 0x0f)) {
362*4882a593Smuzhiyun 				any_t1 = 1;
363*4882a593Smuzhiyun 				DEBUGP(5, dev, "card is capable of T=1\n");
364*4882a593Smuzhiyun 			} else {
365*4882a593Smuzhiyun 				any_t0 = 1;
366*4882a593Smuzhiyun 				DEBUGP(5, dev, "card is capable of T=0\n");
367*4882a593Smuzhiyun 			}
368*4882a593Smuzhiyun 		} else
369*4882a593Smuzhiyun 			done = 1;
370*4882a593Smuzhiyun 	} while (!done);
371*4882a593Smuzhiyun 
372*4882a593Smuzhiyun 	DEBUGP(5, dev, "ix=%d noHist=%d any_t1=%d\n",
373*4882a593Smuzhiyun 	      ix, dev->atr[1] & 15, any_t1);
374*4882a593Smuzhiyun 	if (ix + 1 + (dev->atr[1] & 0x0f) + any_t1 != dev->atr_len) {
375*4882a593Smuzhiyun 		DEBUGP(5, dev, "length error\n");
376*4882a593Smuzhiyun 		return 0;
377*4882a593Smuzhiyun 	}
378*4882a593Smuzhiyun 	if (any_t0)
379*4882a593Smuzhiyun 		set_bit(IS_ANY_T0, &dev->flags);
380*4882a593Smuzhiyun 
381*4882a593Smuzhiyun 	if (any_t1) {		/* compute csum */
382*4882a593Smuzhiyun 		dev->atr_csum = 0;
383*4882a593Smuzhiyun #ifdef ATR_CSUM
384*4882a593Smuzhiyun 		for (i = 1; i < dev->atr_len; i++)
385*4882a593Smuzhiyun 			dev->atr_csum ^= dev->atr[i];
386*4882a593Smuzhiyun 		if (dev->atr_csum) {
387*4882a593Smuzhiyun 			set_bit(IS_BAD_CSUM, &dev->flags);
388*4882a593Smuzhiyun 			DEBUGP(5, dev, "bad checksum\n");
389*4882a593Smuzhiyun 			goto return_0;
390*4882a593Smuzhiyun 		}
391*4882a593Smuzhiyun #endif
392*4882a593Smuzhiyun 		if (any_t0 == 0)
393*4882a593Smuzhiyun 			dev->proto = 1;	/* XXX PROTO */
394*4882a593Smuzhiyun 		set_bit(IS_ANY_T1, &dev->flags);
395*4882a593Smuzhiyun 	}
396*4882a593Smuzhiyun 
397*4882a593Smuzhiyun 	return 1;
398*4882a593Smuzhiyun }
399*4882a593Smuzhiyun 
400*4882a593Smuzhiyun struct card_fixup {
401*4882a593Smuzhiyun 	char atr[12];
402*4882a593Smuzhiyun 	u_int8_t atr_len;
403*4882a593Smuzhiyun 	u_int8_t stopbits;
404*4882a593Smuzhiyun };
405*4882a593Smuzhiyun 
406*4882a593Smuzhiyun static struct card_fixup card_fixups[] = {
407*4882a593Smuzhiyun 	{	/* ACOS */
408*4882a593Smuzhiyun 		.atr = { 0x3b, 0xb3, 0x11, 0x00, 0x00, 0x41, 0x01 },
409*4882a593Smuzhiyun 		.atr_len = 7,
410*4882a593Smuzhiyun 		.stopbits = 0x03,
411*4882a593Smuzhiyun 	},
412*4882a593Smuzhiyun 	{	/* Motorola */
413*4882a593Smuzhiyun 		.atr = {0x3b, 0x76, 0x13, 0x00, 0x00, 0x80, 0x62, 0x07,
414*4882a593Smuzhiyun 			0x41, 0x81, 0x81 },
415*4882a593Smuzhiyun 		.atr_len = 11,
416*4882a593Smuzhiyun 		.stopbits = 0x04,
417*4882a593Smuzhiyun 	},
418*4882a593Smuzhiyun };
419*4882a593Smuzhiyun 
set_cardparameter(struct cm4000_dev * dev)420*4882a593Smuzhiyun static void set_cardparameter(struct cm4000_dev *dev)
421*4882a593Smuzhiyun {
422*4882a593Smuzhiyun 	int i;
423*4882a593Smuzhiyun 	unsigned int iobase = dev->p_dev->resource[0]->start;
424*4882a593Smuzhiyun 	u_int8_t stopbits = 0x02; /* ISO default */
425*4882a593Smuzhiyun 
426*4882a593Smuzhiyun 	DEBUGP(3, dev, "-> set_cardparameter\n");
427*4882a593Smuzhiyun 
428*4882a593Smuzhiyun 	dev->flags1 = dev->flags1 | (((dev->baudv - 1) & 0x0100) >> 8);
429*4882a593Smuzhiyun 	xoutb(dev->flags1, REG_FLAGS1(iobase));
430*4882a593Smuzhiyun 	DEBUGP(5, dev, "flags1 = 0x%02x\n", dev->flags1);
431*4882a593Smuzhiyun 
432*4882a593Smuzhiyun 	/* set baudrate */
433*4882a593Smuzhiyun 	xoutb((unsigned char)((dev->baudv - 1) & 0xFF), REG_BAUDRATE(iobase));
434*4882a593Smuzhiyun 
435*4882a593Smuzhiyun 	DEBUGP(5, dev, "baudv = %i -> write 0x%02x\n", dev->baudv,
436*4882a593Smuzhiyun 	      ((dev->baudv - 1) & 0xFF));
437*4882a593Smuzhiyun 
438*4882a593Smuzhiyun 	/* set stopbits */
439*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(card_fixups); i++) {
440*4882a593Smuzhiyun 		if (!memcmp(dev->atr, card_fixups[i].atr,
441*4882a593Smuzhiyun 			    card_fixups[i].atr_len))
442*4882a593Smuzhiyun 			stopbits = card_fixups[i].stopbits;
443*4882a593Smuzhiyun 	}
444*4882a593Smuzhiyun 	xoutb(stopbits, REG_STOPBITS(iobase));
445*4882a593Smuzhiyun 
446*4882a593Smuzhiyun 	DEBUGP(3, dev, "<- set_cardparameter\n");
447*4882a593Smuzhiyun }
448*4882a593Smuzhiyun 
set_protocol(struct cm4000_dev * dev,struct ptsreq * ptsreq)449*4882a593Smuzhiyun static int set_protocol(struct cm4000_dev *dev, struct ptsreq *ptsreq)
450*4882a593Smuzhiyun {
451*4882a593Smuzhiyun 
452*4882a593Smuzhiyun 	unsigned long tmp, i;
453*4882a593Smuzhiyun 	unsigned short num_bytes_read;
454*4882a593Smuzhiyun 	unsigned char pts_reply[4];
455*4882a593Smuzhiyun 	ssize_t rc;
456*4882a593Smuzhiyun 	unsigned int iobase = dev->p_dev->resource[0]->start;
457*4882a593Smuzhiyun 
458*4882a593Smuzhiyun 	rc = 0;
459*4882a593Smuzhiyun 
460*4882a593Smuzhiyun 	DEBUGP(3, dev, "-> set_protocol\n");
461*4882a593Smuzhiyun 	DEBUGP(5, dev, "ptsreq->Protocol = 0x%.8x, ptsreq->Flags=0x%.8x, "
462*4882a593Smuzhiyun 		 "ptsreq->pts1=0x%.2x, ptsreq->pts2=0x%.2x, "
463*4882a593Smuzhiyun 		 "ptsreq->pts3=0x%.2x\n", (unsigned int)ptsreq->protocol,
464*4882a593Smuzhiyun 		 (unsigned int)ptsreq->flags, ptsreq->pts1, ptsreq->pts2,
465*4882a593Smuzhiyun 		 ptsreq->pts3);
466*4882a593Smuzhiyun 
467*4882a593Smuzhiyun 	/* Fill PTS structure */
468*4882a593Smuzhiyun 	dev->pts[0] = 0xff;
469*4882a593Smuzhiyun 	dev->pts[1] = 0x00;
470*4882a593Smuzhiyun 	tmp = ptsreq->protocol;
471*4882a593Smuzhiyun 	while ((tmp = (tmp >> 1)) > 0)
472*4882a593Smuzhiyun 		dev->pts[1]++;
473*4882a593Smuzhiyun 	dev->proto = dev->pts[1];	/* Set new protocol */
474*4882a593Smuzhiyun 	dev->pts[1] = (0x01 << 4) | (dev->pts[1]);
475*4882a593Smuzhiyun 
476*4882a593Smuzhiyun 	/* Correct Fi/Di according to CM4000 Fi/Di table */
477*4882a593Smuzhiyun 	DEBUGP(5, dev, "Ta(1) from ATR is 0x%.2x\n", dev->ta1);
478*4882a593Smuzhiyun 	/* set Fi/Di according to ATR TA(1) */
479*4882a593Smuzhiyun 	dev->pts[2] = fi_di_table[dev->ta1 & 0x0F][(dev->ta1 >> 4) & 0x0F];
480*4882a593Smuzhiyun 
481*4882a593Smuzhiyun 	/* Calculate PCK character */
482*4882a593Smuzhiyun 	dev->pts[3] = dev->pts[0] ^ dev->pts[1] ^ dev->pts[2];
483*4882a593Smuzhiyun 
484*4882a593Smuzhiyun 	DEBUGP(5, dev, "pts0=%.2x, pts1=%.2x, pts2=%.2x, pts3=%.2x\n",
485*4882a593Smuzhiyun 	       dev->pts[0], dev->pts[1], dev->pts[2], dev->pts[3]);
486*4882a593Smuzhiyun 
487*4882a593Smuzhiyun 	/* check card convention */
488*4882a593Smuzhiyun 	if (test_bit(IS_INVREV, &dev->flags))
489*4882a593Smuzhiyun 		str_invert_revert(dev->pts, 4);
490*4882a593Smuzhiyun 
491*4882a593Smuzhiyun 	/* reset SM */
492*4882a593Smuzhiyun 	xoutb(0x80, REG_FLAGS0(iobase));
493*4882a593Smuzhiyun 
494*4882a593Smuzhiyun 	/* Enable access to the message buffer */
495*4882a593Smuzhiyun 	DEBUGP(5, dev, "Enable access to the messages buffer\n");
496*4882a593Smuzhiyun 	dev->flags1 = 0x20	/* T_Active */
497*4882a593Smuzhiyun 	    | (test_bit(IS_INVREV, &dev->flags) ? 0x02 : 0x00) /* inv parity */
498*4882a593Smuzhiyun 	    | ((dev->baudv >> 8) & 0x01);	/* MSB-baud */
499*4882a593Smuzhiyun 	xoutb(dev->flags1, REG_FLAGS1(iobase));
500*4882a593Smuzhiyun 
501*4882a593Smuzhiyun 	DEBUGP(5, dev, "Enable message buffer -> flags1 = 0x%.2x\n",
502*4882a593Smuzhiyun 	       dev->flags1);
503*4882a593Smuzhiyun 
504*4882a593Smuzhiyun 	/* write challenge to the buffer */
505*4882a593Smuzhiyun 	DEBUGP(5, dev, "Write challenge to buffer: ");
506*4882a593Smuzhiyun 	for (i = 0; i < 4; i++) {
507*4882a593Smuzhiyun 		xoutb(i, REG_BUF_ADDR(iobase));
508*4882a593Smuzhiyun 		xoutb(dev->pts[i], REG_BUF_DATA(iobase));	/* buf data */
509*4882a593Smuzhiyun #ifdef CM4000_DEBUG
510*4882a593Smuzhiyun 		pr_debug("0x%.2x ", dev->pts[i]);
511*4882a593Smuzhiyun 	}
512*4882a593Smuzhiyun 	pr_debug("\n");
513*4882a593Smuzhiyun #else
514*4882a593Smuzhiyun 	}
515*4882a593Smuzhiyun #endif
516*4882a593Smuzhiyun 
517*4882a593Smuzhiyun 	/* set number of bytes to write */
518*4882a593Smuzhiyun 	DEBUGP(5, dev, "Set number of bytes to write\n");
519*4882a593Smuzhiyun 	xoutb(0x04, REG_NUM_SEND(iobase));
520*4882a593Smuzhiyun 
521*4882a593Smuzhiyun 	/* Trigger CARDMAN CONTROLLER */
522*4882a593Smuzhiyun 	xoutb(0x50, REG_FLAGS0(iobase));
523*4882a593Smuzhiyun 
524*4882a593Smuzhiyun 	/* Monitor progress */
525*4882a593Smuzhiyun 	/* wait for xmit done */
526*4882a593Smuzhiyun 	DEBUGP(5, dev, "Waiting for NumRecBytes getting valid\n");
527*4882a593Smuzhiyun 
528*4882a593Smuzhiyun 	for (i = 0; i < 100; i++) {
529*4882a593Smuzhiyun 		if (inb(REG_FLAGS0(iobase)) & 0x08) {
530*4882a593Smuzhiyun 			DEBUGP(5, dev, "NumRecBytes is valid\n");
531*4882a593Smuzhiyun 			break;
532*4882a593Smuzhiyun 		}
533*4882a593Smuzhiyun 		usleep_range(10000, 11000);
534*4882a593Smuzhiyun 	}
535*4882a593Smuzhiyun 	if (i == 100) {
536*4882a593Smuzhiyun 		DEBUGP(5, dev, "Timeout waiting for NumRecBytes getting "
537*4882a593Smuzhiyun 		       "valid\n");
538*4882a593Smuzhiyun 		rc = -EIO;
539*4882a593Smuzhiyun 		goto exit_setprotocol;
540*4882a593Smuzhiyun 	}
541*4882a593Smuzhiyun 
542*4882a593Smuzhiyun 	DEBUGP(5, dev, "Reading NumRecBytes\n");
543*4882a593Smuzhiyun 	for (i = 0; i < 100; i++) {
544*4882a593Smuzhiyun 		io_read_num_rec_bytes(iobase, &num_bytes_read);
545*4882a593Smuzhiyun 		if (num_bytes_read >= 4) {
546*4882a593Smuzhiyun 			DEBUGP(2, dev, "NumRecBytes = %i\n", num_bytes_read);
547*4882a593Smuzhiyun 			if (num_bytes_read > 4) {
548*4882a593Smuzhiyun 				rc = -EIO;
549*4882a593Smuzhiyun 				goto exit_setprotocol;
550*4882a593Smuzhiyun 			}
551*4882a593Smuzhiyun 			break;
552*4882a593Smuzhiyun 		}
553*4882a593Smuzhiyun 		usleep_range(10000, 11000);
554*4882a593Smuzhiyun 	}
555*4882a593Smuzhiyun 
556*4882a593Smuzhiyun 	/* check whether it is a short PTS reply? */
557*4882a593Smuzhiyun 	if (num_bytes_read == 3)
558*4882a593Smuzhiyun 		i = 0;
559*4882a593Smuzhiyun 
560*4882a593Smuzhiyun 	if (i == 100) {
561*4882a593Smuzhiyun 		DEBUGP(5, dev, "Timeout reading num_bytes_read\n");
562*4882a593Smuzhiyun 		rc = -EIO;
563*4882a593Smuzhiyun 		goto exit_setprotocol;
564*4882a593Smuzhiyun 	}
565*4882a593Smuzhiyun 
566*4882a593Smuzhiyun 	DEBUGP(5, dev, "Reset the CARDMAN CONTROLLER\n");
567*4882a593Smuzhiyun 	xoutb(0x80, REG_FLAGS0(iobase));
568*4882a593Smuzhiyun 
569*4882a593Smuzhiyun 	/* Read PPS reply */
570*4882a593Smuzhiyun 	DEBUGP(5, dev, "Read PPS reply\n");
571*4882a593Smuzhiyun 	for (i = 0; i < num_bytes_read; i++) {
572*4882a593Smuzhiyun 		xoutb(i, REG_BUF_ADDR(iobase));
573*4882a593Smuzhiyun 		pts_reply[i] = inb(REG_BUF_DATA(iobase));
574*4882a593Smuzhiyun 	}
575*4882a593Smuzhiyun 
576*4882a593Smuzhiyun #ifdef CM4000_DEBUG
577*4882a593Smuzhiyun 	DEBUGP(2, dev, "PTSreply: ");
578*4882a593Smuzhiyun 	for (i = 0; i < num_bytes_read; i++) {
579*4882a593Smuzhiyun 		pr_debug("0x%.2x ", pts_reply[i]);
580*4882a593Smuzhiyun 	}
581*4882a593Smuzhiyun 	pr_debug("\n");
582*4882a593Smuzhiyun #endif	/* CM4000_DEBUG */
583*4882a593Smuzhiyun 
584*4882a593Smuzhiyun 	DEBUGP(5, dev, "Clear Tactive in Flags1\n");
585*4882a593Smuzhiyun 	xoutb(0x20, REG_FLAGS1(iobase));
586*4882a593Smuzhiyun 
587*4882a593Smuzhiyun 	/* Compare ptsreq and ptsreply */
588*4882a593Smuzhiyun 	if ((dev->pts[0] == pts_reply[0]) &&
589*4882a593Smuzhiyun 	    (dev->pts[1] == pts_reply[1]) &&
590*4882a593Smuzhiyun 	    (dev->pts[2] == pts_reply[2]) && (dev->pts[3] == pts_reply[3])) {
591*4882a593Smuzhiyun 		/* setcardparameter according to PPS */
592*4882a593Smuzhiyun 		dev->baudv = calc_baudv(dev->pts[2]);
593*4882a593Smuzhiyun 		set_cardparameter(dev);
594*4882a593Smuzhiyun 	} else if ((dev->pts[0] == pts_reply[0]) &&
595*4882a593Smuzhiyun 		   ((dev->pts[1] & 0xef) == pts_reply[1]) &&
596*4882a593Smuzhiyun 		   ((pts_reply[0] ^ pts_reply[1]) == pts_reply[2])) {
597*4882a593Smuzhiyun 		/* short PTS reply, set card parameter to default values */
598*4882a593Smuzhiyun 		dev->baudv = calc_baudv(0x11);
599*4882a593Smuzhiyun 		set_cardparameter(dev);
600*4882a593Smuzhiyun 	} else
601*4882a593Smuzhiyun 		rc = -EIO;
602*4882a593Smuzhiyun 
603*4882a593Smuzhiyun exit_setprotocol:
604*4882a593Smuzhiyun 	DEBUGP(3, dev, "<- set_protocol\n");
605*4882a593Smuzhiyun 	return rc;
606*4882a593Smuzhiyun }
607*4882a593Smuzhiyun 
io_detect_cm4000(unsigned int iobase,struct cm4000_dev * dev)608*4882a593Smuzhiyun static int io_detect_cm4000(unsigned int iobase, struct cm4000_dev *dev)
609*4882a593Smuzhiyun {
610*4882a593Smuzhiyun 
611*4882a593Smuzhiyun 	/* note: statemachine is assumed to be reset */
612*4882a593Smuzhiyun 	if (inb(REG_FLAGS0(iobase)) & 8) {
613*4882a593Smuzhiyun 		clear_bit(IS_ATR_VALID, &dev->flags);
614*4882a593Smuzhiyun 		set_bit(IS_CMM_ABSENT, &dev->flags);
615*4882a593Smuzhiyun 		return 0;	/* detect CMM = 1 -> failure */
616*4882a593Smuzhiyun 	}
617*4882a593Smuzhiyun 	/* xoutb(0x40, REG_FLAGS1(iobase)); detectCMM */
618*4882a593Smuzhiyun 	xoutb(dev->flags1 | 0x40, REG_FLAGS1(iobase));
619*4882a593Smuzhiyun 	if ((inb(REG_FLAGS0(iobase)) & 8) == 0) {
620*4882a593Smuzhiyun 		clear_bit(IS_ATR_VALID, &dev->flags);
621*4882a593Smuzhiyun 		set_bit(IS_CMM_ABSENT, &dev->flags);
622*4882a593Smuzhiyun 		return 0;	/* detect CMM=0 -> failure */
623*4882a593Smuzhiyun 	}
624*4882a593Smuzhiyun 	/* clear detectCMM again by restoring original flags1 */
625*4882a593Smuzhiyun 	xoutb(dev->flags1, REG_FLAGS1(iobase));
626*4882a593Smuzhiyun 	return 1;
627*4882a593Smuzhiyun }
628*4882a593Smuzhiyun 
terminate_monitor(struct cm4000_dev * dev)629*4882a593Smuzhiyun static void terminate_monitor(struct cm4000_dev *dev)
630*4882a593Smuzhiyun {
631*4882a593Smuzhiyun 
632*4882a593Smuzhiyun 	/* tell the monitor to stop and wait until
633*4882a593Smuzhiyun 	 * it terminates.
634*4882a593Smuzhiyun 	 */
635*4882a593Smuzhiyun 	DEBUGP(3, dev, "-> terminate_monitor\n");
636*4882a593Smuzhiyun 	wait_event_interruptible(dev->devq,
637*4882a593Smuzhiyun 				 test_and_set_bit(LOCK_MONITOR,
638*4882a593Smuzhiyun 						  (void *)&dev->flags));
639*4882a593Smuzhiyun 
640*4882a593Smuzhiyun 	/* now, LOCK_MONITOR has been set.
641*4882a593Smuzhiyun 	 * allow a last cycle in the monitor.
642*4882a593Smuzhiyun 	 * the monitor will indicate that it has
643*4882a593Smuzhiyun 	 * finished by clearing this bit.
644*4882a593Smuzhiyun 	 */
645*4882a593Smuzhiyun 	DEBUGP(5, dev, "Now allow last cycle of monitor!\n");
646*4882a593Smuzhiyun 	while (test_bit(LOCK_MONITOR, (void *)&dev->flags))
647*4882a593Smuzhiyun 		msleep(25);
648*4882a593Smuzhiyun 
649*4882a593Smuzhiyun 	DEBUGP(5, dev, "Delete timer\n");
650*4882a593Smuzhiyun 	del_timer_sync(&dev->timer);
651*4882a593Smuzhiyun #ifdef CM4000_DEBUG
652*4882a593Smuzhiyun 	dev->monitor_running = 0;
653*4882a593Smuzhiyun #endif
654*4882a593Smuzhiyun 
655*4882a593Smuzhiyun 	DEBUGP(3, dev, "<- terminate_monitor\n");
656*4882a593Smuzhiyun }
657*4882a593Smuzhiyun 
658*4882a593Smuzhiyun /*
659*4882a593Smuzhiyun  * monitor the card every 50msec. as a side-effect, retrieve the
660*4882a593Smuzhiyun  * atr once a card is inserted. another side-effect of retrieving the
661*4882a593Smuzhiyun  * atr is that the card will be powered on, so there is no need to
662*4882a593Smuzhiyun  * power on the card explicitly from the application: the driver
663*4882a593Smuzhiyun  * is already doing that for you.
664*4882a593Smuzhiyun  */
665*4882a593Smuzhiyun 
monitor_card(struct timer_list * t)666*4882a593Smuzhiyun static void monitor_card(struct timer_list *t)
667*4882a593Smuzhiyun {
668*4882a593Smuzhiyun 	struct cm4000_dev *dev = from_timer(dev, t, timer);
669*4882a593Smuzhiyun 	unsigned int iobase = dev->p_dev->resource[0]->start;
670*4882a593Smuzhiyun 	unsigned short s;
671*4882a593Smuzhiyun 	struct ptsreq ptsreq;
672*4882a593Smuzhiyun 	int i, atrc;
673*4882a593Smuzhiyun 
674*4882a593Smuzhiyun 	DEBUGP(7, dev, "->  monitor_card\n");
675*4882a593Smuzhiyun 
676*4882a593Smuzhiyun 	/* if someone has set the lock for us: we're done! */
677*4882a593Smuzhiyun 	if (test_and_set_bit(LOCK_MONITOR, &dev->flags)) {
678*4882a593Smuzhiyun 		DEBUGP(4, dev, "About to stop monitor\n");
679*4882a593Smuzhiyun 		/* no */
680*4882a593Smuzhiyun 		dev->rlen =
681*4882a593Smuzhiyun 		    dev->rpos =
682*4882a593Smuzhiyun 		    dev->atr_csum = dev->atr_len_retry = dev->cwarn = 0;
683*4882a593Smuzhiyun 		dev->mstate = M_FETCH_ATR;
684*4882a593Smuzhiyun 		clear_bit(LOCK_MONITOR, &dev->flags);
685*4882a593Smuzhiyun 		/* close et al. are sleeping on devq, so wake it */
686*4882a593Smuzhiyun 		wake_up_interruptible(&dev->devq);
687*4882a593Smuzhiyun 		DEBUGP(2, dev, "<- monitor_card (we are done now)\n");
688*4882a593Smuzhiyun 		return;
689*4882a593Smuzhiyun 	}
690*4882a593Smuzhiyun 
691*4882a593Smuzhiyun 	/* try to lock io: if it is already locked, just add another timer */
692*4882a593Smuzhiyun 	if (test_and_set_bit(LOCK_IO, (void *)&dev->flags)) {
693*4882a593Smuzhiyun 		DEBUGP(4, dev, "Couldn't get IO lock\n");
694*4882a593Smuzhiyun 		goto return_with_timer;
695*4882a593Smuzhiyun 	}
696*4882a593Smuzhiyun 
697*4882a593Smuzhiyun 	/* is a card/a reader inserted at all ? */
698*4882a593Smuzhiyun 	dev->flags0 = xinb(REG_FLAGS0(iobase));
699*4882a593Smuzhiyun 	DEBUGP(7, dev, "dev->flags0 = 0x%2x\n", dev->flags0);
700*4882a593Smuzhiyun 	DEBUGP(7, dev, "smartcard present: %s\n",
701*4882a593Smuzhiyun 	       dev->flags0 & 1 ? "yes" : "no");
702*4882a593Smuzhiyun 	DEBUGP(7, dev, "cardman present: %s\n",
703*4882a593Smuzhiyun 	       dev->flags0 == 0xff ? "no" : "yes");
704*4882a593Smuzhiyun 
705*4882a593Smuzhiyun 	if ((dev->flags0 & 1) == 0	/* no smartcard inserted */
706*4882a593Smuzhiyun 	    || dev->flags0 == 0xff) {	/* no cardman inserted */
707*4882a593Smuzhiyun 		/* no */
708*4882a593Smuzhiyun 		dev->rlen =
709*4882a593Smuzhiyun 		    dev->rpos =
710*4882a593Smuzhiyun 		    dev->atr_csum = dev->atr_len_retry = dev->cwarn = 0;
711*4882a593Smuzhiyun 		dev->mstate = M_FETCH_ATR;
712*4882a593Smuzhiyun 
713*4882a593Smuzhiyun 		dev->flags &= 0x000000ff; /* only keep IO and MONITOR locks */
714*4882a593Smuzhiyun 
715*4882a593Smuzhiyun 		if (dev->flags0 == 0xff) {
716*4882a593Smuzhiyun 			DEBUGP(4, dev, "set IS_CMM_ABSENT bit\n");
717*4882a593Smuzhiyun 			set_bit(IS_CMM_ABSENT, &dev->flags);
718*4882a593Smuzhiyun 		} else if (test_bit(IS_CMM_ABSENT, &dev->flags)) {
719*4882a593Smuzhiyun 			DEBUGP(4, dev, "clear IS_CMM_ABSENT bit "
720*4882a593Smuzhiyun 			       "(card is removed)\n");
721*4882a593Smuzhiyun 			clear_bit(IS_CMM_ABSENT, &dev->flags);
722*4882a593Smuzhiyun 		}
723*4882a593Smuzhiyun 
724*4882a593Smuzhiyun 		goto release_io;
725*4882a593Smuzhiyun 	} else if ((dev->flags0 & 1) && test_bit(IS_CMM_ABSENT, &dev->flags)) {
726*4882a593Smuzhiyun 		/* cardman and card present but cardman was absent before
727*4882a593Smuzhiyun 		 * (after suspend with inserted card) */
728*4882a593Smuzhiyun 		DEBUGP(4, dev, "clear IS_CMM_ABSENT bit (card is inserted)\n");
729*4882a593Smuzhiyun 		clear_bit(IS_CMM_ABSENT, &dev->flags);
730*4882a593Smuzhiyun 	}
731*4882a593Smuzhiyun 
732*4882a593Smuzhiyun 	if (test_bit(IS_ATR_VALID, &dev->flags) == 1) {
733*4882a593Smuzhiyun 		DEBUGP(7, dev, "believe ATR is already valid (do nothing)\n");
734*4882a593Smuzhiyun 		goto release_io;
735*4882a593Smuzhiyun 	}
736*4882a593Smuzhiyun 
737*4882a593Smuzhiyun 	switch (dev->mstate) {
738*4882a593Smuzhiyun 	case M_CARDOFF: {
739*4882a593Smuzhiyun 		unsigned char flags0;
740*4882a593Smuzhiyun 
741*4882a593Smuzhiyun 		DEBUGP(4, dev, "M_CARDOFF\n");
742*4882a593Smuzhiyun 		flags0 = inb(REG_FLAGS0(iobase));
743*4882a593Smuzhiyun 		if (flags0 & 0x02) {
744*4882a593Smuzhiyun 			/* wait until Flags0 indicate power is off */
745*4882a593Smuzhiyun 			dev->mdelay = T_10MSEC;
746*4882a593Smuzhiyun 		} else {
747*4882a593Smuzhiyun 			/* Flags0 indicate power off and no card inserted now;
748*4882a593Smuzhiyun 			 * Reset CARDMAN CONTROLLER */
749*4882a593Smuzhiyun 			xoutb(0x80, REG_FLAGS0(iobase));
750*4882a593Smuzhiyun 
751*4882a593Smuzhiyun 			/* prepare for fetching ATR again: after card off ATR
752*4882a593Smuzhiyun 			 * is read again automatically */
753*4882a593Smuzhiyun 			dev->rlen =
754*4882a593Smuzhiyun 			    dev->rpos =
755*4882a593Smuzhiyun 			    dev->atr_csum =
756*4882a593Smuzhiyun 			    dev->atr_len_retry = dev->cwarn = 0;
757*4882a593Smuzhiyun 			dev->mstate = M_FETCH_ATR;
758*4882a593Smuzhiyun 
759*4882a593Smuzhiyun 			/* minimal gap between CARDOFF and read ATR is 50msec */
760*4882a593Smuzhiyun 			dev->mdelay = T_50MSEC;
761*4882a593Smuzhiyun 		}
762*4882a593Smuzhiyun 		break;
763*4882a593Smuzhiyun 	}
764*4882a593Smuzhiyun 	case M_FETCH_ATR:
765*4882a593Smuzhiyun 		DEBUGP(4, dev, "M_FETCH_ATR\n");
766*4882a593Smuzhiyun 		xoutb(0x80, REG_FLAGS0(iobase));
767*4882a593Smuzhiyun 		DEBUGP(4, dev, "Reset BAUDV to 9600\n");
768*4882a593Smuzhiyun 		dev->baudv = 0x173;	/* 9600 */
769*4882a593Smuzhiyun 		xoutb(0x02, REG_STOPBITS(iobase));	/* stopbits=2 */
770*4882a593Smuzhiyun 		xoutb(0x73, REG_BAUDRATE(iobase));	/* baud value */
771*4882a593Smuzhiyun 		xoutb(0x21, REG_FLAGS1(iobase));	/* T_Active=1, baud
772*4882a593Smuzhiyun 							   value */
773*4882a593Smuzhiyun 		/* warm start vs. power on: */
774*4882a593Smuzhiyun 		xoutb(dev->flags0 & 2 ? 0x46 : 0x44, REG_FLAGS0(iobase));
775*4882a593Smuzhiyun 		dev->mdelay = T_40MSEC;
776*4882a593Smuzhiyun 		dev->mstate = M_TIMEOUT_WAIT;
777*4882a593Smuzhiyun 		break;
778*4882a593Smuzhiyun 	case M_TIMEOUT_WAIT:
779*4882a593Smuzhiyun 		DEBUGP(4, dev, "M_TIMEOUT_WAIT\n");
780*4882a593Smuzhiyun 		/* numRecBytes */
781*4882a593Smuzhiyun 		io_read_num_rec_bytes(iobase, &dev->atr_len);
782*4882a593Smuzhiyun 		dev->mdelay = T_10MSEC;
783*4882a593Smuzhiyun 		dev->mstate = M_READ_ATR_LEN;
784*4882a593Smuzhiyun 		break;
785*4882a593Smuzhiyun 	case M_READ_ATR_LEN:
786*4882a593Smuzhiyun 		DEBUGP(4, dev, "M_READ_ATR_LEN\n");
787*4882a593Smuzhiyun 		/* infinite loop possible, since there is no timeout */
788*4882a593Smuzhiyun 
789*4882a593Smuzhiyun #define	MAX_ATR_LEN_RETRY	100
790*4882a593Smuzhiyun 
791*4882a593Smuzhiyun 		if (dev->atr_len == io_read_num_rec_bytes(iobase, &s)) {
792*4882a593Smuzhiyun 			if (dev->atr_len_retry++ >= MAX_ATR_LEN_RETRY) {					/* + XX msec */
793*4882a593Smuzhiyun 				dev->mdelay = T_10MSEC;
794*4882a593Smuzhiyun 				dev->mstate = M_READ_ATR;
795*4882a593Smuzhiyun 			}
796*4882a593Smuzhiyun 		} else {
797*4882a593Smuzhiyun 			dev->atr_len = s;
798*4882a593Smuzhiyun 			dev->atr_len_retry = 0;	/* set new timeout */
799*4882a593Smuzhiyun 		}
800*4882a593Smuzhiyun 
801*4882a593Smuzhiyun 		DEBUGP(4, dev, "Current ATR_LEN = %i\n", dev->atr_len);
802*4882a593Smuzhiyun 		break;
803*4882a593Smuzhiyun 	case M_READ_ATR:
804*4882a593Smuzhiyun 		DEBUGP(4, dev, "M_READ_ATR\n");
805*4882a593Smuzhiyun 		xoutb(0x80, REG_FLAGS0(iobase));	/* reset SM */
806*4882a593Smuzhiyun 		for (i = 0; i < dev->atr_len; i++) {
807*4882a593Smuzhiyun 			xoutb(i, REG_BUF_ADDR(iobase));
808*4882a593Smuzhiyun 			dev->atr[i] = inb(REG_BUF_DATA(iobase));
809*4882a593Smuzhiyun 		}
810*4882a593Smuzhiyun 		/* Deactivate T_Active flags */
811*4882a593Smuzhiyun 		DEBUGP(4, dev, "Deactivate T_Active flags\n");
812*4882a593Smuzhiyun 		dev->flags1 = 0x01;
813*4882a593Smuzhiyun 		xoutb(dev->flags1, REG_FLAGS1(iobase));
814*4882a593Smuzhiyun 
815*4882a593Smuzhiyun 		/* atr is present (which doesn't mean it's valid) */
816*4882a593Smuzhiyun 		set_bit(IS_ATR_PRESENT, &dev->flags);
817*4882a593Smuzhiyun 		if (dev->atr[0] == 0x03)
818*4882a593Smuzhiyun 			str_invert_revert(dev->atr, dev->atr_len);
819*4882a593Smuzhiyun 		atrc = parse_atr(dev);
820*4882a593Smuzhiyun 		if (atrc == 0) {	/* atr invalid */
821*4882a593Smuzhiyun 			dev->mdelay = 0;
822*4882a593Smuzhiyun 			dev->mstate = M_BAD_CARD;
823*4882a593Smuzhiyun 		} else {
824*4882a593Smuzhiyun 			dev->mdelay = T_50MSEC;
825*4882a593Smuzhiyun 			dev->mstate = M_ATR_PRESENT;
826*4882a593Smuzhiyun 			set_bit(IS_ATR_VALID, &dev->flags);
827*4882a593Smuzhiyun 		}
828*4882a593Smuzhiyun 
829*4882a593Smuzhiyun 		if (test_bit(IS_ATR_VALID, &dev->flags) == 1) {
830*4882a593Smuzhiyun 			DEBUGP(4, dev, "monitor_card: ATR valid\n");
831*4882a593Smuzhiyun  			/* if ta1 == 0x11, no PPS necessary (default values) */
832*4882a593Smuzhiyun 			/* do not do PPS with multi protocol cards */
833*4882a593Smuzhiyun 			if ((test_bit(IS_AUTOPPS_ACT, &dev->flags) == 0) &&
834*4882a593Smuzhiyun 			    (dev->ta1 != 0x11) &&
835*4882a593Smuzhiyun 			    !(test_bit(IS_ANY_T0, &dev->flags) &&
836*4882a593Smuzhiyun 			    test_bit(IS_ANY_T1, &dev->flags))) {
837*4882a593Smuzhiyun 				DEBUGP(4, dev, "Perform AUTOPPS\n");
838*4882a593Smuzhiyun 				set_bit(IS_AUTOPPS_ACT, &dev->flags);
839*4882a593Smuzhiyun 				ptsreq.protocol = (0x01 << dev->proto);
840*4882a593Smuzhiyun 				ptsreq.flags = 0x01;
841*4882a593Smuzhiyun 				ptsreq.pts1 = 0x00;
842*4882a593Smuzhiyun 				ptsreq.pts2 = 0x00;
843*4882a593Smuzhiyun 				ptsreq.pts3 = 0x00;
844*4882a593Smuzhiyun 				if (set_protocol(dev, &ptsreq) == 0) {
845*4882a593Smuzhiyun 					DEBUGP(4, dev, "AUTOPPS ret SUCC\n");
846*4882a593Smuzhiyun 					clear_bit(IS_AUTOPPS_ACT, &dev->flags);
847*4882a593Smuzhiyun 					wake_up_interruptible(&dev->atrq);
848*4882a593Smuzhiyun 				} else {
849*4882a593Smuzhiyun 					DEBUGP(4, dev, "AUTOPPS failed: "
850*4882a593Smuzhiyun 					       "repower using defaults\n");
851*4882a593Smuzhiyun 					/* prepare for repowering  */
852*4882a593Smuzhiyun 					clear_bit(IS_ATR_PRESENT, &dev->flags);
853*4882a593Smuzhiyun 					clear_bit(IS_ATR_VALID, &dev->flags);
854*4882a593Smuzhiyun 					dev->rlen =
855*4882a593Smuzhiyun 					    dev->rpos =
856*4882a593Smuzhiyun 					    dev->atr_csum =
857*4882a593Smuzhiyun 					    dev->atr_len_retry = dev->cwarn = 0;
858*4882a593Smuzhiyun 					dev->mstate = M_FETCH_ATR;
859*4882a593Smuzhiyun 
860*4882a593Smuzhiyun 					dev->mdelay = T_50MSEC;
861*4882a593Smuzhiyun 				}
862*4882a593Smuzhiyun 			} else {
863*4882a593Smuzhiyun 				/* for cards which use slightly different
864*4882a593Smuzhiyun 				 * params (extra guard time) */
865*4882a593Smuzhiyun 				set_cardparameter(dev);
866*4882a593Smuzhiyun 				if (test_bit(IS_AUTOPPS_ACT, &dev->flags) == 1)
867*4882a593Smuzhiyun 					DEBUGP(4, dev, "AUTOPPS already active "
868*4882a593Smuzhiyun 					       "2nd try:use default values\n");
869*4882a593Smuzhiyun 				if (dev->ta1 == 0x11)
870*4882a593Smuzhiyun 					DEBUGP(4, dev, "No AUTOPPS necessary "
871*4882a593Smuzhiyun 					       "TA(1)==0x11\n");
872*4882a593Smuzhiyun 				if (test_bit(IS_ANY_T0, &dev->flags)
873*4882a593Smuzhiyun 				    && test_bit(IS_ANY_T1, &dev->flags))
874*4882a593Smuzhiyun 					DEBUGP(4, dev, "Do NOT perform AUTOPPS "
875*4882a593Smuzhiyun 					       "with multiprotocol cards\n");
876*4882a593Smuzhiyun 				clear_bit(IS_AUTOPPS_ACT, &dev->flags);
877*4882a593Smuzhiyun 				wake_up_interruptible(&dev->atrq);
878*4882a593Smuzhiyun 			}
879*4882a593Smuzhiyun 		} else {
880*4882a593Smuzhiyun 			DEBUGP(4, dev, "ATR invalid\n");
881*4882a593Smuzhiyun 			wake_up_interruptible(&dev->atrq);
882*4882a593Smuzhiyun 		}
883*4882a593Smuzhiyun 		break;
884*4882a593Smuzhiyun 	case M_BAD_CARD:
885*4882a593Smuzhiyun 		DEBUGP(4, dev, "M_BAD_CARD\n");
886*4882a593Smuzhiyun 		/* slow down warning, but prompt immediately after insertion */
887*4882a593Smuzhiyun 		if (dev->cwarn == 0 || dev->cwarn == 10) {
888*4882a593Smuzhiyun 			set_bit(IS_BAD_CARD, &dev->flags);
889*4882a593Smuzhiyun 			dev_warn(&dev->p_dev->dev, MODULE_NAME ": ");
890*4882a593Smuzhiyun 			if (test_bit(IS_BAD_CSUM, &dev->flags)) {
891*4882a593Smuzhiyun 				DEBUGP(4, dev, "ATR checksum (0x%.2x, should "
892*4882a593Smuzhiyun 				       "be zero) failed\n", dev->atr_csum);
893*4882a593Smuzhiyun 			}
894*4882a593Smuzhiyun #ifdef CM4000_DEBUG
895*4882a593Smuzhiyun 			else if (test_bit(IS_BAD_LENGTH, &dev->flags)) {
896*4882a593Smuzhiyun 				DEBUGP(4, dev, "ATR length error\n");
897*4882a593Smuzhiyun 			} else {
898*4882a593Smuzhiyun 				DEBUGP(4, dev, "card damaged or wrong way "
899*4882a593Smuzhiyun 					"inserted\n");
900*4882a593Smuzhiyun 			}
901*4882a593Smuzhiyun #endif
902*4882a593Smuzhiyun 			dev->cwarn = 0;
903*4882a593Smuzhiyun 			wake_up_interruptible(&dev->atrq);	/* wake open */
904*4882a593Smuzhiyun 		}
905*4882a593Smuzhiyun 		dev->cwarn++;
906*4882a593Smuzhiyun 		dev->mdelay = T_100MSEC;
907*4882a593Smuzhiyun 		dev->mstate = M_FETCH_ATR;
908*4882a593Smuzhiyun 		break;
909*4882a593Smuzhiyun 	default:
910*4882a593Smuzhiyun 		DEBUGP(7, dev, "Unknown action\n");
911*4882a593Smuzhiyun 		break;		/* nothing */
912*4882a593Smuzhiyun 	}
913*4882a593Smuzhiyun 
914*4882a593Smuzhiyun release_io:
915*4882a593Smuzhiyun 	DEBUGP(7, dev, "release_io\n");
916*4882a593Smuzhiyun 	clear_bit(LOCK_IO, &dev->flags);
917*4882a593Smuzhiyun 	wake_up_interruptible(&dev->ioq);	/* whoever needs IO */
918*4882a593Smuzhiyun 
919*4882a593Smuzhiyun return_with_timer:
920*4882a593Smuzhiyun 	DEBUGP(7, dev, "<- monitor_card (returns with timer)\n");
921*4882a593Smuzhiyun 	mod_timer(&dev->timer, jiffies + dev->mdelay);
922*4882a593Smuzhiyun 	clear_bit(LOCK_MONITOR, &dev->flags);
923*4882a593Smuzhiyun }
924*4882a593Smuzhiyun 
925*4882a593Smuzhiyun /* Interface to userland (file_operations) */
926*4882a593Smuzhiyun 
cmm_read(struct file * filp,__user char * buf,size_t count,loff_t * ppos)927*4882a593Smuzhiyun static ssize_t cmm_read(struct file *filp, __user char *buf, size_t count,
928*4882a593Smuzhiyun 			loff_t *ppos)
929*4882a593Smuzhiyun {
930*4882a593Smuzhiyun 	struct cm4000_dev *dev = filp->private_data;
931*4882a593Smuzhiyun 	unsigned int iobase = dev->p_dev->resource[0]->start;
932*4882a593Smuzhiyun 	ssize_t rc;
933*4882a593Smuzhiyun 	int i, j, k;
934*4882a593Smuzhiyun 
935*4882a593Smuzhiyun 	DEBUGP(2, dev, "-> cmm_read(%s,%d)\n", current->comm, current->pid);
936*4882a593Smuzhiyun 
937*4882a593Smuzhiyun 	if (count == 0)		/* according to manpage */
938*4882a593Smuzhiyun 		return 0;
939*4882a593Smuzhiyun 
940*4882a593Smuzhiyun 	if (!pcmcia_dev_present(dev->p_dev) || /* device removed */
941*4882a593Smuzhiyun 	    test_bit(IS_CMM_ABSENT, &dev->flags))
942*4882a593Smuzhiyun 		return -ENODEV;
943*4882a593Smuzhiyun 
944*4882a593Smuzhiyun 	if (test_bit(IS_BAD_CSUM, &dev->flags))
945*4882a593Smuzhiyun 		return -EIO;
946*4882a593Smuzhiyun 
947*4882a593Smuzhiyun 	/* also see the note about this in cmm_write */
948*4882a593Smuzhiyun 	if (wait_event_interruptible
949*4882a593Smuzhiyun 	    (dev->atrq,
950*4882a593Smuzhiyun 	     ((filp->f_flags & O_NONBLOCK)
951*4882a593Smuzhiyun 	      || (test_bit(IS_ATR_PRESENT, (void *)&dev->flags) != 0)))) {
952*4882a593Smuzhiyun 		if (filp->f_flags & O_NONBLOCK)
953*4882a593Smuzhiyun 			return -EAGAIN;
954*4882a593Smuzhiyun 		return -ERESTARTSYS;
955*4882a593Smuzhiyun 	}
956*4882a593Smuzhiyun 
957*4882a593Smuzhiyun 	if (test_bit(IS_ATR_VALID, &dev->flags) == 0)
958*4882a593Smuzhiyun 		return -EIO;
959*4882a593Smuzhiyun 
960*4882a593Smuzhiyun 	/* this one implements blocking IO */
961*4882a593Smuzhiyun 	if (wait_event_interruptible
962*4882a593Smuzhiyun 	    (dev->readq,
963*4882a593Smuzhiyun 	     ((filp->f_flags & O_NONBLOCK) || (dev->rpos < dev->rlen)))) {
964*4882a593Smuzhiyun 		if (filp->f_flags & O_NONBLOCK)
965*4882a593Smuzhiyun 			return -EAGAIN;
966*4882a593Smuzhiyun 		return -ERESTARTSYS;
967*4882a593Smuzhiyun 	}
968*4882a593Smuzhiyun 
969*4882a593Smuzhiyun 	/* lock io */
970*4882a593Smuzhiyun 	if (wait_event_interruptible
971*4882a593Smuzhiyun 	    (dev->ioq,
972*4882a593Smuzhiyun 	     ((filp->f_flags & O_NONBLOCK)
973*4882a593Smuzhiyun 	      || (test_and_set_bit(LOCK_IO, (void *)&dev->flags) == 0)))) {
974*4882a593Smuzhiyun 		if (filp->f_flags & O_NONBLOCK)
975*4882a593Smuzhiyun 			return -EAGAIN;
976*4882a593Smuzhiyun 		return -ERESTARTSYS;
977*4882a593Smuzhiyun 	}
978*4882a593Smuzhiyun 
979*4882a593Smuzhiyun 	rc = 0;
980*4882a593Smuzhiyun 	dev->flags0 = inb(REG_FLAGS0(iobase));
981*4882a593Smuzhiyun 	if ((dev->flags0 & 1) == 0	/* no smartcard inserted */
982*4882a593Smuzhiyun 	    || dev->flags0 == 0xff) {	/* no cardman inserted */
983*4882a593Smuzhiyun 		clear_bit(IS_ATR_VALID, &dev->flags);
984*4882a593Smuzhiyun 		if (dev->flags0 & 1) {
985*4882a593Smuzhiyun 			set_bit(IS_CMM_ABSENT, &dev->flags);
986*4882a593Smuzhiyun 			rc = -ENODEV;
987*4882a593Smuzhiyun 		} else {
988*4882a593Smuzhiyun 			rc = -EIO;
989*4882a593Smuzhiyun 		}
990*4882a593Smuzhiyun 		goto release_io;
991*4882a593Smuzhiyun 	}
992*4882a593Smuzhiyun 
993*4882a593Smuzhiyun 	DEBUGP(4, dev, "begin read answer\n");
994*4882a593Smuzhiyun 	j = min(count, (size_t)(dev->rlen - dev->rpos));
995*4882a593Smuzhiyun 	k = dev->rpos;
996*4882a593Smuzhiyun 	if (k + j > 255)
997*4882a593Smuzhiyun 		j = 256 - k;
998*4882a593Smuzhiyun 	DEBUGP(4, dev, "read1 j=%d\n", j);
999*4882a593Smuzhiyun 	for (i = 0; i < j; i++) {
1000*4882a593Smuzhiyun 		xoutb(k++, REG_BUF_ADDR(iobase));
1001*4882a593Smuzhiyun 		dev->rbuf[i] = xinb(REG_BUF_DATA(iobase));
1002*4882a593Smuzhiyun 	}
1003*4882a593Smuzhiyun 	j = min(count, (size_t)(dev->rlen - dev->rpos));
1004*4882a593Smuzhiyun 	if (k + j > 255) {
1005*4882a593Smuzhiyun 		DEBUGP(4, dev, "read2 j=%d\n", j);
1006*4882a593Smuzhiyun 		dev->flags1 |= 0x10;	/* MSB buf addr set */
1007*4882a593Smuzhiyun 		xoutb(dev->flags1, REG_FLAGS1(iobase));
1008*4882a593Smuzhiyun 		for (; i < j; i++) {
1009*4882a593Smuzhiyun 			xoutb(k++, REG_BUF_ADDR(iobase));
1010*4882a593Smuzhiyun 			dev->rbuf[i] = xinb(REG_BUF_DATA(iobase));
1011*4882a593Smuzhiyun 		}
1012*4882a593Smuzhiyun 	}
1013*4882a593Smuzhiyun 
1014*4882a593Smuzhiyun 	if (dev->proto == 0 && count > dev->rlen - dev->rpos && i) {
1015*4882a593Smuzhiyun 		DEBUGP(4, dev, "T=0 and count > buffer\n");
1016*4882a593Smuzhiyun 		dev->rbuf[i] = dev->rbuf[i - 1];
1017*4882a593Smuzhiyun 		dev->rbuf[i - 1] = dev->procbyte;
1018*4882a593Smuzhiyun 		j++;
1019*4882a593Smuzhiyun 	}
1020*4882a593Smuzhiyun 	count = j;
1021*4882a593Smuzhiyun 
1022*4882a593Smuzhiyun 	dev->rpos = dev->rlen + 1;
1023*4882a593Smuzhiyun 
1024*4882a593Smuzhiyun 	/* Clear T1Active */
1025*4882a593Smuzhiyun 	DEBUGP(4, dev, "Clear T1Active\n");
1026*4882a593Smuzhiyun 	dev->flags1 &= 0xdf;
1027*4882a593Smuzhiyun 	xoutb(dev->flags1, REG_FLAGS1(iobase));
1028*4882a593Smuzhiyun 
1029*4882a593Smuzhiyun 	xoutb(0, REG_FLAGS1(iobase));	/* clear detectCMM */
1030*4882a593Smuzhiyun 	/* last check before exit */
1031*4882a593Smuzhiyun 	if (!io_detect_cm4000(iobase, dev)) {
1032*4882a593Smuzhiyun 		rc = -ENODEV;
1033*4882a593Smuzhiyun 		goto release_io;
1034*4882a593Smuzhiyun 	}
1035*4882a593Smuzhiyun 
1036*4882a593Smuzhiyun 	if (test_bit(IS_INVREV, &dev->flags) && count > 0)
1037*4882a593Smuzhiyun 		str_invert_revert(dev->rbuf, count);
1038*4882a593Smuzhiyun 
1039*4882a593Smuzhiyun 	if (copy_to_user(buf, dev->rbuf, count))
1040*4882a593Smuzhiyun 		rc = -EFAULT;
1041*4882a593Smuzhiyun 
1042*4882a593Smuzhiyun release_io:
1043*4882a593Smuzhiyun 	clear_bit(LOCK_IO, &dev->flags);
1044*4882a593Smuzhiyun 	wake_up_interruptible(&dev->ioq);
1045*4882a593Smuzhiyun 
1046*4882a593Smuzhiyun 	DEBUGP(2, dev, "<- cmm_read returns: rc = %zi\n",
1047*4882a593Smuzhiyun 	       (rc < 0 ? rc : count));
1048*4882a593Smuzhiyun 	return rc < 0 ? rc : count;
1049*4882a593Smuzhiyun }
1050*4882a593Smuzhiyun 
cmm_write(struct file * filp,const char __user * buf,size_t count,loff_t * ppos)1051*4882a593Smuzhiyun static ssize_t cmm_write(struct file *filp, const char __user *buf,
1052*4882a593Smuzhiyun 			 size_t count, loff_t *ppos)
1053*4882a593Smuzhiyun {
1054*4882a593Smuzhiyun 	struct cm4000_dev *dev = filp->private_data;
1055*4882a593Smuzhiyun 	unsigned int iobase = dev->p_dev->resource[0]->start;
1056*4882a593Smuzhiyun 	unsigned short s;
1057*4882a593Smuzhiyun 	unsigned char tmp;
1058*4882a593Smuzhiyun 	unsigned char infolen;
1059*4882a593Smuzhiyun 	unsigned char sendT0;
1060*4882a593Smuzhiyun 	unsigned short nsend;
1061*4882a593Smuzhiyun 	unsigned short nr;
1062*4882a593Smuzhiyun 	ssize_t rc;
1063*4882a593Smuzhiyun 	int i;
1064*4882a593Smuzhiyun 
1065*4882a593Smuzhiyun 	DEBUGP(2, dev, "-> cmm_write(%s,%d)\n", current->comm, current->pid);
1066*4882a593Smuzhiyun 
1067*4882a593Smuzhiyun 	if (count == 0)		/* according to manpage */
1068*4882a593Smuzhiyun 		return 0;
1069*4882a593Smuzhiyun 
1070*4882a593Smuzhiyun 	if (dev->proto == 0 && count < 4) {
1071*4882a593Smuzhiyun 		/* T0 must have at least 4 bytes */
1072*4882a593Smuzhiyun 		DEBUGP(4, dev, "T0 short write\n");
1073*4882a593Smuzhiyun 		return -EIO;
1074*4882a593Smuzhiyun 	}
1075*4882a593Smuzhiyun 
1076*4882a593Smuzhiyun 	nr = count & 0x1ff;	/* max bytes to write */
1077*4882a593Smuzhiyun 
1078*4882a593Smuzhiyun 	sendT0 = dev->proto ? 0 : nr > 5 ? 0x08 : 0;
1079*4882a593Smuzhiyun 
1080*4882a593Smuzhiyun 	if (!pcmcia_dev_present(dev->p_dev) || /* device removed */
1081*4882a593Smuzhiyun 	    test_bit(IS_CMM_ABSENT, &dev->flags))
1082*4882a593Smuzhiyun 		return -ENODEV;
1083*4882a593Smuzhiyun 
1084*4882a593Smuzhiyun 	if (test_bit(IS_BAD_CSUM, &dev->flags)) {
1085*4882a593Smuzhiyun 		DEBUGP(4, dev, "bad csum\n");
1086*4882a593Smuzhiyun 		return -EIO;
1087*4882a593Smuzhiyun 	}
1088*4882a593Smuzhiyun 
1089*4882a593Smuzhiyun 	/*
1090*4882a593Smuzhiyun 	 * wait for atr to become valid.
1091*4882a593Smuzhiyun 	 * note: it is important to lock this code. if we dont, the monitor
1092*4882a593Smuzhiyun 	 * could be run between test_bit and the call to sleep on the
1093*4882a593Smuzhiyun 	 * atr-queue.  if *then* the monitor detects atr valid, it will wake up
1094*4882a593Smuzhiyun 	 * any process on the atr-queue, *but* since we have been interrupted,
1095*4882a593Smuzhiyun 	 * we do not yet sleep on this queue. this would result in a missed
1096*4882a593Smuzhiyun 	 * wake_up and the calling process would sleep forever (until
1097*4882a593Smuzhiyun 	 * interrupted).  also, do *not* restore_flags before sleep_on, because
1098*4882a593Smuzhiyun 	 * this could result in the same situation!
1099*4882a593Smuzhiyun 	 */
1100*4882a593Smuzhiyun 	if (wait_event_interruptible
1101*4882a593Smuzhiyun 	    (dev->atrq,
1102*4882a593Smuzhiyun 	     ((filp->f_flags & O_NONBLOCK)
1103*4882a593Smuzhiyun 	      || (test_bit(IS_ATR_PRESENT, (void *)&dev->flags) != 0)))) {
1104*4882a593Smuzhiyun 		if (filp->f_flags & O_NONBLOCK)
1105*4882a593Smuzhiyun 			return -EAGAIN;
1106*4882a593Smuzhiyun 		return -ERESTARTSYS;
1107*4882a593Smuzhiyun 	}
1108*4882a593Smuzhiyun 
1109*4882a593Smuzhiyun 	if (test_bit(IS_ATR_VALID, &dev->flags) == 0) {	/* invalid atr */
1110*4882a593Smuzhiyun 		DEBUGP(4, dev, "invalid ATR\n");
1111*4882a593Smuzhiyun 		return -EIO;
1112*4882a593Smuzhiyun 	}
1113*4882a593Smuzhiyun 
1114*4882a593Smuzhiyun 	/* lock io */
1115*4882a593Smuzhiyun 	if (wait_event_interruptible
1116*4882a593Smuzhiyun 	    (dev->ioq,
1117*4882a593Smuzhiyun 	     ((filp->f_flags & O_NONBLOCK)
1118*4882a593Smuzhiyun 	      || (test_and_set_bit(LOCK_IO, (void *)&dev->flags) == 0)))) {
1119*4882a593Smuzhiyun 		if (filp->f_flags & O_NONBLOCK)
1120*4882a593Smuzhiyun 			return -EAGAIN;
1121*4882a593Smuzhiyun 		return -ERESTARTSYS;
1122*4882a593Smuzhiyun 	}
1123*4882a593Smuzhiyun 
1124*4882a593Smuzhiyun 	if (copy_from_user(dev->sbuf, buf, ((count > 512) ? 512 : count)))
1125*4882a593Smuzhiyun 		return -EFAULT;
1126*4882a593Smuzhiyun 
1127*4882a593Smuzhiyun 	rc = 0;
1128*4882a593Smuzhiyun 	dev->flags0 = inb(REG_FLAGS0(iobase));
1129*4882a593Smuzhiyun 	if ((dev->flags0 & 1) == 0	/* no smartcard inserted */
1130*4882a593Smuzhiyun 	    || dev->flags0 == 0xff) {	/* no cardman inserted */
1131*4882a593Smuzhiyun 		clear_bit(IS_ATR_VALID, &dev->flags);
1132*4882a593Smuzhiyun 		if (dev->flags0 & 1) {
1133*4882a593Smuzhiyun 			set_bit(IS_CMM_ABSENT, &dev->flags);
1134*4882a593Smuzhiyun 			rc = -ENODEV;
1135*4882a593Smuzhiyun 		} else {
1136*4882a593Smuzhiyun 			DEBUGP(4, dev, "IO error\n");
1137*4882a593Smuzhiyun 			rc = -EIO;
1138*4882a593Smuzhiyun 		}
1139*4882a593Smuzhiyun 		goto release_io;
1140*4882a593Smuzhiyun 	}
1141*4882a593Smuzhiyun 
1142*4882a593Smuzhiyun 	xoutb(0x80, REG_FLAGS0(iobase));	/* reset SM  */
1143*4882a593Smuzhiyun 
1144*4882a593Smuzhiyun 	if (!io_detect_cm4000(iobase, dev)) {
1145*4882a593Smuzhiyun 		rc = -ENODEV;
1146*4882a593Smuzhiyun 		goto release_io;
1147*4882a593Smuzhiyun 	}
1148*4882a593Smuzhiyun 
1149*4882a593Smuzhiyun 	/* reflect T=0 send/read mode in flags1 */
1150*4882a593Smuzhiyun 	dev->flags1 |= (sendT0);
1151*4882a593Smuzhiyun 
1152*4882a593Smuzhiyun 	set_cardparameter(dev);
1153*4882a593Smuzhiyun 
1154*4882a593Smuzhiyun 	/* dummy read, reset flag procedure received */
1155*4882a593Smuzhiyun 	tmp = inb(REG_FLAGS1(iobase));
1156*4882a593Smuzhiyun 
1157*4882a593Smuzhiyun 	dev->flags1 = 0x20	/* T_Active */
1158*4882a593Smuzhiyun 	    | (sendT0)
1159*4882a593Smuzhiyun 	    | (test_bit(IS_INVREV, &dev->flags) ? 2 : 0)/* inverse parity  */
1160*4882a593Smuzhiyun 	    | (((dev->baudv - 1) & 0x0100) >> 8);	/* MSB-Baud */
1161*4882a593Smuzhiyun 	DEBUGP(1, dev, "set dev->flags1 = 0x%.2x\n", dev->flags1);
1162*4882a593Smuzhiyun 	xoutb(dev->flags1, REG_FLAGS1(iobase));
1163*4882a593Smuzhiyun 
1164*4882a593Smuzhiyun 	/* xmit data */
1165*4882a593Smuzhiyun 	DEBUGP(4, dev, "Xmit data\n");
1166*4882a593Smuzhiyun 	for (i = 0; i < nr; i++) {
1167*4882a593Smuzhiyun 		if (i >= 256) {
1168*4882a593Smuzhiyun 			dev->flags1 = 0x20	/* T_Active */
1169*4882a593Smuzhiyun 			    | (sendT0)	/* SendT0 */
1170*4882a593Smuzhiyun 				/* inverse parity: */
1171*4882a593Smuzhiyun 			    | (test_bit(IS_INVREV, &dev->flags) ? 2 : 0)
1172*4882a593Smuzhiyun 			    | (((dev->baudv - 1) & 0x0100) >> 8) /* MSB-Baud */
1173*4882a593Smuzhiyun 			    | 0x10;	/* set address high */
1174*4882a593Smuzhiyun 			DEBUGP(4, dev, "dev->flags = 0x%.2x - set address "
1175*4882a593Smuzhiyun 			       "high\n", dev->flags1);
1176*4882a593Smuzhiyun 			xoutb(dev->flags1, REG_FLAGS1(iobase));
1177*4882a593Smuzhiyun 		}
1178*4882a593Smuzhiyun 		if (test_bit(IS_INVREV, &dev->flags)) {
1179*4882a593Smuzhiyun 			DEBUGP(4, dev, "Apply inverse convention for 0x%.2x "
1180*4882a593Smuzhiyun 				"-> 0x%.2x\n", (unsigned char)dev->sbuf[i],
1181*4882a593Smuzhiyun 			      invert_revert(dev->sbuf[i]));
1182*4882a593Smuzhiyun 			xoutb(i, REG_BUF_ADDR(iobase));
1183*4882a593Smuzhiyun 			xoutb(invert_revert(dev->sbuf[i]),
1184*4882a593Smuzhiyun 			      REG_BUF_DATA(iobase));
1185*4882a593Smuzhiyun 		} else {
1186*4882a593Smuzhiyun 			xoutb(i, REG_BUF_ADDR(iobase));
1187*4882a593Smuzhiyun 			xoutb(dev->sbuf[i], REG_BUF_DATA(iobase));
1188*4882a593Smuzhiyun 		}
1189*4882a593Smuzhiyun 	}
1190*4882a593Smuzhiyun 	DEBUGP(4, dev, "Xmit done\n");
1191*4882a593Smuzhiyun 
1192*4882a593Smuzhiyun 	if (dev->proto == 0) {
1193*4882a593Smuzhiyun 		/* T=0 proto: 0 byte reply  */
1194*4882a593Smuzhiyun 		if (nr == 4) {
1195*4882a593Smuzhiyun 			DEBUGP(4, dev, "T=0 assumes 0 byte reply\n");
1196*4882a593Smuzhiyun 			xoutb(i, REG_BUF_ADDR(iobase));
1197*4882a593Smuzhiyun 			if (test_bit(IS_INVREV, &dev->flags))
1198*4882a593Smuzhiyun 				xoutb(0xff, REG_BUF_DATA(iobase));
1199*4882a593Smuzhiyun 			else
1200*4882a593Smuzhiyun 				xoutb(0x00, REG_BUF_DATA(iobase));
1201*4882a593Smuzhiyun 		}
1202*4882a593Smuzhiyun 
1203*4882a593Smuzhiyun 		/* numSendBytes */
1204*4882a593Smuzhiyun 		if (sendT0)
1205*4882a593Smuzhiyun 			nsend = nr;
1206*4882a593Smuzhiyun 		else {
1207*4882a593Smuzhiyun 			if (nr == 4)
1208*4882a593Smuzhiyun 				nsend = 5;
1209*4882a593Smuzhiyun 			else {
1210*4882a593Smuzhiyun 				nsend = 5 + (unsigned char)dev->sbuf[4];
1211*4882a593Smuzhiyun 				if (dev->sbuf[4] == 0)
1212*4882a593Smuzhiyun 					nsend += 0x100;
1213*4882a593Smuzhiyun 			}
1214*4882a593Smuzhiyun 		}
1215*4882a593Smuzhiyun 	} else
1216*4882a593Smuzhiyun 		nsend = nr;
1217*4882a593Smuzhiyun 
1218*4882a593Smuzhiyun 	/* T0: output procedure byte */
1219*4882a593Smuzhiyun 	if (test_bit(IS_INVREV, &dev->flags)) {
1220*4882a593Smuzhiyun 		DEBUGP(4, dev, "T=0 set Procedure byte (inverse-reverse) "
1221*4882a593Smuzhiyun 		       "0x%.2x\n", invert_revert(dev->sbuf[1]));
1222*4882a593Smuzhiyun 		xoutb(invert_revert(dev->sbuf[1]), REG_NUM_BYTES(iobase));
1223*4882a593Smuzhiyun 	} else {
1224*4882a593Smuzhiyun 		DEBUGP(4, dev, "T=0 set Procedure byte 0x%.2x\n", dev->sbuf[1]);
1225*4882a593Smuzhiyun 		xoutb(dev->sbuf[1], REG_NUM_BYTES(iobase));
1226*4882a593Smuzhiyun 	}
1227*4882a593Smuzhiyun 
1228*4882a593Smuzhiyun 	DEBUGP(1, dev, "set NumSendBytes = 0x%.2x\n",
1229*4882a593Smuzhiyun 	       (unsigned char)(nsend & 0xff));
1230*4882a593Smuzhiyun 	xoutb((unsigned char)(nsend & 0xff), REG_NUM_SEND(iobase));
1231*4882a593Smuzhiyun 
1232*4882a593Smuzhiyun 	DEBUGP(1, dev, "Trigger CARDMAN CONTROLLER (0x%.2x)\n",
1233*4882a593Smuzhiyun 	       0x40	/* SM_Active */
1234*4882a593Smuzhiyun 	      | (dev->flags0 & 2 ? 0 : 4)	/* power on if needed */
1235*4882a593Smuzhiyun 	      |(dev->proto ? 0x10 : 0x08)	/* T=1/T=0 */
1236*4882a593Smuzhiyun 	      |(nsend & 0x100) >> 8 /* MSB numSendBytes */ );
1237*4882a593Smuzhiyun 	xoutb(0x40		/* SM_Active */
1238*4882a593Smuzhiyun 	      | (dev->flags0 & 2 ? 0 : 4)	/* power on if needed */
1239*4882a593Smuzhiyun 	      |(dev->proto ? 0x10 : 0x08)	/* T=1/T=0 */
1240*4882a593Smuzhiyun 	      |(nsend & 0x100) >> 8,	/* MSB numSendBytes */
1241*4882a593Smuzhiyun 	      REG_FLAGS0(iobase));
1242*4882a593Smuzhiyun 
1243*4882a593Smuzhiyun 	/* wait for xmit done */
1244*4882a593Smuzhiyun 	if (dev->proto == 1) {
1245*4882a593Smuzhiyun 		DEBUGP(4, dev, "Wait for xmit done\n");
1246*4882a593Smuzhiyun 		for (i = 0; i < 1000; i++) {
1247*4882a593Smuzhiyun 			if (inb(REG_FLAGS0(iobase)) & 0x08)
1248*4882a593Smuzhiyun 				break;
1249*4882a593Smuzhiyun 			msleep_interruptible(10);
1250*4882a593Smuzhiyun 		}
1251*4882a593Smuzhiyun 		if (i == 1000) {
1252*4882a593Smuzhiyun 			DEBUGP(4, dev, "timeout waiting for xmit done\n");
1253*4882a593Smuzhiyun 			rc = -EIO;
1254*4882a593Smuzhiyun 			goto release_io;
1255*4882a593Smuzhiyun 		}
1256*4882a593Smuzhiyun 	}
1257*4882a593Smuzhiyun 
1258*4882a593Smuzhiyun 	/* T=1: wait for infoLen */
1259*4882a593Smuzhiyun 
1260*4882a593Smuzhiyun 	infolen = 0;
1261*4882a593Smuzhiyun 	if (dev->proto) {
1262*4882a593Smuzhiyun 		/* wait until infoLen is valid */
1263*4882a593Smuzhiyun 		for (i = 0; i < 6000; i++) {	/* max waiting time of 1 min */
1264*4882a593Smuzhiyun 			io_read_num_rec_bytes(iobase, &s);
1265*4882a593Smuzhiyun 			if (s >= 3) {
1266*4882a593Smuzhiyun 				infolen = inb(REG_FLAGS1(iobase));
1267*4882a593Smuzhiyun 				DEBUGP(4, dev, "infolen=%d\n", infolen);
1268*4882a593Smuzhiyun 				break;
1269*4882a593Smuzhiyun 			}
1270*4882a593Smuzhiyun 			msleep_interruptible(10);
1271*4882a593Smuzhiyun 		}
1272*4882a593Smuzhiyun 		if (i == 6000) {
1273*4882a593Smuzhiyun 			DEBUGP(4, dev, "timeout waiting for infoLen\n");
1274*4882a593Smuzhiyun 			rc = -EIO;
1275*4882a593Smuzhiyun 			goto release_io;
1276*4882a593Smuzhiyun 		}
1277*4882a593Smuzhiyun 	} else
1278*4882a593Smuzhiyun 		clear_bit(IS_PROCBYTE_PRESENT, &dev->flags);
1279*4882a593Smuzhiyun 
1280*4882a593Smuzhiyun 	/* numRecBytes | bit9 of numRecytes */
1281*4882a593Smuzhiyun 	io_read_num_rec_bytes(iobase, &dev->rlen);
1282*4882a593Smuzhiyun 	for (i = 0; i < 600; i++) {	/* max waiting time of 2 sec */
1283*4882a593Smuzhiyun 		if (dev->proto) {
1284*4882a593Smuzhiyun 			if (dev->rlen >= infolen + 4)
1285*4882a593Smuzhiyun 				break;
1286*4882a593Smuzhiyun 		}
1287*4882a593Smuzhiyun 		msleep_interruptible(10);
1288*4882a593Smuzhiyun 		/* numRecBytes | bit9 of numRecytes */
1289*4882a593Smuzhiyun 		io_read_num_rec_bytes(iobase, &s);
1290*4882a593Smuzhiyun 		if (s > dev->rlen) {
1291*4882a593Smuzhiyun 			DEBUGP(1, dev, "NumRecBytes inc (reset timeout)\n");
1292*4882a593Smuzhiyun 			i = 0;	/* reset timeout */
1293*4882a593Smuzhiyun 			dev->rlen = s;
1294*4882a593Smuzhiyun 		}
1295*4882a593Smuzhiyun 		/* T=0: we are done when numRecBytes doesn't
1296*4882a593Smuzhiyun 		 *      increment any more and NoProcedureByte
1297*4882a593Smuzhiyun 		 *      is set and numRecBytes == bytes sent + 6
1298*4882a593Smuzhiyun 		 *      (header bytes + data + 1 for sw2)
1299*4882a593Smuzhiyun 		 *      except when the card replies an error
1300*4882a593Smuzhiyun 		 *      which means, no data will be sent back.
1301*4882a593Smuzhiyun 		 */
1302*4882a593Smuzhiyun 		else if (dev->proto == 0) {
1303*4882a593Smuzhiyun 			if ((inb(REG_BUF_ADDR(iobase)) & 0x80)) {
1304*4882a593Smuzhiyun 				/* no procedure byte received since last read */
1305*4882a593Smuzhiyun 				DEBUGP(1, dev, "NoProcedure byte set\n");
1306*4882a593Smuzhiyun 				/* i=0; */
1307*4882a593Smuzhiyun 			} else {
1308*4882a593Smuzhiyun 				/* procedure byte received since last read */
1309*4882a593Smuzhiyun 				DEBUGP(1, dev, "NoProcedure byte unset "
1310*4882a593Smuzhiyun 					"(reset timeout)\n");
1311*4882a593Smuzhiyun 				dev->procbyte = inb(REG_FLAGS1(iobase));
1312*4882a593Smuzhiyun 				DEBUGP(1, dev, "Read procedure byte 0x%.2x\n",
1313*4882a593Smuzhiyun 				      dev->procbyte);
1314*4882a593Smuzhiyun 				i = 0;	/* resettimeout */
1315*4882a593Smuzhiyun 			}
1316*4882a593Smuzhiyun 			if (inb(REG_FLAGS0(iobase)) & 0x08) {
1317*4882a593Smuzhiyun 				DEBUGP(1, dev, "T0Done flag (read reply)\n");
1318*4882a593Smuzhiyun 				break;
1319*4882a593Smuzhiyun 			}
1320*4882a593Smuzhiyun 		}
1321*4882a593Smuzhiyun 		if (dev->proto)
1322*4882a593Smuzhiyun 			infolen = inb(REG_FLAGS1(iobase));
1323*4882a593Smuzhiyun 	}
1324*4882a593Smuzhiyun 	if (i == 600) {
1325*4882a593Smuzhiyun 		DEBUGP(1, dev, "timeout waiting for numRecBytes\n");
1326*4882a593Smuzhiyun 		rc = -EIO;
1327*4882a593Smuzhiyun 		goto release_io;
1328*4882a593Smuzhiyun 	} else {
1329*4882a593Smuzhiyun 		if (dev->proto == 0) {
1330*4882a593Smuzhiyun 			DEBUGP(1, dev, "Wait for T0Done bit to be  set\n");
1331*4882a593Smuzhiyun 			for (i = 0; i < 1000; i++) {
1332*4882a593Smuzhiyun 				if (inb(REG_FLAGS0(iobase)) & 0x08)
1333*4882a593Smuzhiyun 					break;
1334*4882a593Smuzhiyun 				msleep_interruptible(10);
1335*4882a593Smuzhiyun 			}
1336*4882a593Smuzhiyun 			if (i == 1000) {
1337*4882a593Smuzhiyun 				DEBUGP(1, dev, "timeout waiting for T0Done\n");
1338*4882a593Smuzhiyun 				rc = -EIO;
1339*4882a593Smuzhiyun 				goto release_io;
1340*4882a593Smuzhiyun 			}
1341*4882a593Smuzhiyun 
1342*4882a593Smuzhiyun 			dev->procbyte = inb(REG_FLAGS1(iobase));
1343*4882a593Smuzhiyun 			DEBUGP(4, dev, "Read procedure byte 0x%.2x\n",
1344*4882a593Smuzhiyun 			      dev->procbyte);
1345*4882a593Smuzhiyun 
1346*4882a593Smuzhiyun 			io_read_num_rec_bytes(iobase, &dev->rlen);
1347*4882a593Smuzhiyun 			DEBUGP(4, dev, "Read NumRecBytes = %i\n", dev->rlen);
1348*4882a593Smuzhiyun 
1349*4882a593Smuzhiyun 		}
1350*4882a593Smuzhiyun 	}
1351*4882a593Smuzhiyun 	/* T=1: read offset=zero, T=0: read offset=after challenge */
1352*4882a593Smuzhiyun 	dev->rpos = dev->proto ? 0 : nr == 4 ? 5 : nr > dev->rlen ? 5 : nr;
1353*4882a593Smuzhiyun 	DEBUGP(4, dev, "dev->rlen = %i,  dev->rpos = %i, nr = %i\n",
1354*4882a593Smuzhiyun 	      dev->rlen, dev->rpos, nr);
1355*4882a593Smuzhiyun 
1356*4882a593Smuzhiyun release_io:
1357*4882a593Smuzhiyun 	DEBUGP(4, dev, "Reset SM\n");
1358*4882a593Smuzhiyun 	xoutb(0x80, REG_FLAGS0(iobase));	/* reset SM */
1359*4882a593Smuzhiyun 
1360*4882a593Smuzhiyun 	if (rc < 0) {
1361*4882a593Smuzhiyun 		DEBUGP(4, dev, "Write failed but clear T_Active\n");
1362*4882a593Smuzhiyun 		dev->flags1 &= 0xdf;
1363*4882a593Smuzhiyun 		xoutb(dev->flags1, REG_FLAGS1(iobase));
1364*4882a593Smuzhiyun 	}
1365*4882a593Smuzhiyun 
1366*4882a593Smuzhiyun 	clear_bit(LOCK_IO, &dev->flags);
1367*4882a593Smuzhiyun 	wake_up_interruptible(&dev->ioq);
1368*4882a593Smuzhiyun 	wake_up_interruptible(&dev->readq);	/* tell read we have data */
1369*4882a593Smuzhiyun 
1370*4882a593Smuzhiyun 	/* ITSEC E2: clear write buffer */
1371*4882a593Smuzhiyun 	memset((char *)dev->sbuf, 0, 512);
1372*4882a593Smuzhiyun 
1373*4882a593Smuzhiyun 	/* return error or actually written bytes */
1374*4882a593Smuzhiyun 	DEBUGP(2, dev, "<- cmm_write\n");
1375*4882a593Smuzhiyun 	return rc < 0 ? rc : nr;
1376*4882a593Smuzhiyun }
1377*4882a593Smuzhiyun 
start_monitor(struct cm4000_dev * dev)1378*4882a593Smuzhiyun static void start_monitor(struct cm4000_dev *dev)
1379*4882a593Smuzhiyun {
1380*4882a593Smuzhiyun 	DEBUGP(3, dev, "-> start_monitor\n");
1381*4882a593Smuzhiyun 	if (!dev->monitor_running) {
1382*4882a593Smuzhiyun 		DEBUGP(5, dev, "create, init and add timer\n");
1383*4882a593Smuzhiyun 		timer_setup(&dev->timer, monitor_card, 0);
1384*4882a593Smuzhiyun 		dev->monitor_running = 1;
1385*4882a593Smuzhiyun 		mod_timer(&dev->timer, jiffies);
1386*4882a593Smuzhiyun 	} else
1387*4882a593Smuzhiyun 		DEBUGP(5, dev, "monitor already running\n");
1388*4882a593Smuzhiyun 	DEBUGP(3, dev, "<- start_monitor\n");
1389*4882a593Smuzhiyun }
1390*4882a593Smuzhiyun 
stop_monitor(struct cm4000_dev * dev)1391*4882a593Smuzhiyun static void stop_monitor(struct cm4000_dev *dev)
1392*4882a593Smuzhiyun {
1393*4882a593Smuzhiyun 	DEBUGP(3, dev, "-> stop_monitor\n");
1394*4882a593Smuzhiyun 	if (dev->monitor_running) {
1395*4882a593Smuzhiyun 		DEBUGP(5, dev, "stopping monitor\n");
1396*4882a593Smuzhiyun 		terminate_monitor(dev);
1397*4882a593Smuzhiyun 		/* reset monitor SM */
1398*4882a593Smuzhiyun 		clear_bit(IS_ATR_VALID, &dev->flags);
1399*4882a593Smuzhiyun 		clear_bit(IS_ATR_PRESENT, &dev->flags);
1400*4882a593Smuzhiyun 	} else
1401*4882a593Smuzhiyun 		DEBUGP(5, dev, "monitor already stopped\n");
1402*4882a593Smuzhiyun 	DEBUGP(3, dev, "<- stop_monitor\n");
1403*4882a593Smuzhiyun }
1404*4882a593Smuzhiyun 
cmm_ioctl(struct file * filp,unsigned int cmd,unsigned long arg)1405*4882a593Smuzhiyun static long cmm_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
1406*4882a593Smuzhiyun {
1407*4882a593Smuzhiyun 	struct cm4000_dev *dev = filp->private_data;
1408*4882a593Smuzhiyun 	unsigned int iobase = dev->p_dev->resource[0]->start;
1409*4882a593Smuzhiyun 	struct inode *inode = file_inode(filp);
1410*4882a593Smuzhiyun 	struct pcmcia_device *link;
1411*4882a593Smuzhiyun 	int rc;
1412*4882a593Smuzhiyun 	void __user *argp = (void __user *)arg;
1413*4882a593Smuzhiyun #ifdef CM4000_DEBUG
1414*4882a593Smuzhiyun 	char *ioctl_names[CM_IOC_MAXNR + 1] = {
1415*4882a593Smuzhiyun 		[_IOC_NR(CM_IOCGSTATUS)] "CM_IOCGSTATUS",
1416*4882a593Smuzhiyun 		[_IOC_NR(CM_IOCGATR)] "CM_IOCGATR",
1417*4882a593Smuzhiyun 		[_IOC_NR(CM_IOCARDOFF)] "CM_IOCARDOFF",
1418*4882a593Smuzhiyun 		[_IOC_NR(CM_IOCSPTS)] "CM_IOCSPTS",
1419*4882a593Smuzhiyun 		[_IOC_NR(CM_IOSDBGLVL)] "CM4000_DBGLVL",
1420*4882a593Smuzhiyun 	};
1421*4882a593Smuzhiyun 	DEBUGP(3, dev, "cmm_ioctl(device=%d.%d) %s\n", imajor(inode),
1422*4882a593Smuzhiyun 	       iminor(inode), ioctl_names[_IOC_NR(cmd)]);
1423*4882a593Smuzhiyun #endif
1424*4882a593Smuzhiyun 
1425*4882a593Smuzhiyun 	mutex_lock(&cmm_mutex);
1426*4882a593Smuzhiyun 	rc = -ENODEV;
1427*4882a593Smuzhiyun 	link = dev_table[iminor(inode)];
1428*4882a593Smuzhiyun 	if (!pcmcia_dev_present(link)) {
1429*4882a593Smuzhiyun 		DEBUGP(4, dev, "DEV_OK false\n");
1430*4882a593Smuzhiyun 		goto out;
1431*4882a593Smuzhiyun 	}
1432*4882a593Smuzhiyun 
1433*4882a593Smuzhiyun 	if (test_bit(IS_CMM_ABSENT, &dev->flags)) {
1434*4882a593Smuzhiyun 		DEBUGP(4, dev, "CMM_ABSENT flag set\n");
1435*4882a593Smuzhiyun 		goto out;
1436*4882a593Smuzhiyun 	}
1437*4882a593Smuzhiyun 	rc = -EINVAL;
1438*4882a593Smuzhiyun 
1439*4882a593Smuzhiyun 	if (_IOC_TYPE(cmd) != CM_IOC_MAGIC) {
1440*4882a593Smuzhiyun 		DEBUGP(4, dev, "ioctype mismatch\n");
1441*4882a593Smuzhiyun 		goto out;
1442*4882a593Smuzhiyun 	}
1443*4882a593Smuzhiyun 	if (_IOC_NR(cmd) > CM_IOC_MAXNR) {
1444*4882a593Smuzhiyun 		DEBUGP(4, dev, "iocnr mismatch\n");
1445*4882a593Smuzhiyun 		goto out;
1446*4882a593Smuzhiyun 	}
1447*4882a593Smuzhiyun 	rc = 0;
1448*4882a593Smuzhiyun 
1449*4882a593Smuzhiyun 	switch (cmd) {
1450*4882a593Smuzhiyun 	case CM_IOCGSTATUS:
1451*4882a593Smuzhiyun 		DEBUGP(4, dev, " ... in CM_IOCGSTATUS\n");
1452*4882a593Smuzhiyun 		{
1453*4882a593Smuzhiyun 			int status;
1454*4882a593Smuzhiyun 
1455*4882a593Smuzhiyun 			/* clear other bits, but leave inserted & powered as
1456*4882a593Smuzhiyun 			 * they are */
1457*4882a593Smuzhiyun 			status = dev->flags0 & 3;
1458*4882a593Smuzhiyun 			if (test_bit(IS_ATR_PRESENT, &dev->flags))
1459*4882a593Smuzhiyun 				status |= CM_ATR_PRESENT;
1460*4882a593Smuzhiyun 			if (test_bit(IS_ATR_VALID, &dev->flags))
1461*4882a593Smuzhiyun 				status |= CM_ATR_VALID;
1462*4882a593Smuzhiyun 			if (test_bit(IS_CMM_ABSENT, &dev->flags))
1463*4882a593Smuzhiyun 				status |= CM_NO_READER;
1464*4882a593Smuzhiyun 			if (test_bit(IS_BAD_CARD, &dev->flags))
1465*4882a593Smuzhiyun 				status |= CM_BAD_CARD;
1466*4882a593Smuzhiyun 			if (copy_to_user(argp, &status, sizeof(int)))
1467*4882a593Smuzhiyun 				rc = -EFAULT;
1468*4882a593Smuzhiyun 		}
1469*4882a593Smuzhiyun 		break;
1470*4882a593Smuzhiyun 	case CM_IOCGATR:
1471*4882a593Smuzhiyun 		DEBUGP(4, dev, "... in CM_IOCGATR\n");
1472*4882a593Smuzhiyun 		{
1473*4882a593Smuzhiyun 			struct atreq __user *atreq = argp;
1474*4882a593Smuzhiyun 			int tmp;
1475*4882a593Smuzhiyun 			/* allow nonblocking io and being interrupted */
1476*4882a593Smuzhiyun 			if (wait_event_interruptible
1477*4882a593Smuzhiyun 			    (dev->atrq,
1478*4882a593Smuzhiyun 			     ((filp->f_flags & O_NONBLOCK)
1479*4882a593Smuzhiyun 			      || (test_bit(IS_ATR_PRESENT, (void *)&dev->flags)
1480*4882a593Smuzhiyun 				  != 0)))) {
1481*4882a593Smuzhiyun 				if (filp->f_flags & O_NONBLOCK)
1482*4882a593Smuzhiyun 					rc = -EAGAIN;
1483*4882a593Smuzhiyun 				else
1484*4882a593Smuzhiyun 					rc = -ERESTARTSYS;
1485*4882a593Smuzhiyun 				break;
1486*4882a593Smuzhiyun 			}
1487*4882a593Smuzhiyun 
1488*4882a593Smuzhiyun 			rc = -EFAULT;
1489*4882a593Smuzhiyun 			if (test_bit(IS_ATR_VALID, &dev->flags) == 0) {
1490*4882a593Smuzhiyun 				tmp = -1;
1491*4882a593Smuzhiyun 				if (copy_to_user(&(atreq->atr_len), &tmp,
1492*4882a593Smuzhiyun 						 sizeof(int)))
1493*4882a593Smuzhiyun 					break;
1494*4882a593Smuzhiyun 			} else {
1495*4882a593Smuzhiyun 				if (copy_to_user(atreq->atr, dev->atr,
1496*4882a593Smuzhiyun 						 dev->atr_len))
1497*4882a593Smuzhiyun 					break;
1498*4882a593Smuzhiyun 
1499*4882a593Smuzhiyun 				tmp = dev->atr_len;
1500*4882a593Smuzhiyun 				if (copy_to_user(&(atreq->atr_len), &tmp, sizeof(int)))
1501*4882a593Smuzhiyun 					break;
1502*4882a593Smuzhiyun 			}
1503*4882a593Smuzhiyun 			rc = 0;
1504*4882a593Smuzhiyun 			break;
1505*4882a593Smuzhiyun 		}
1506*4882a593Smuzhiyun 	case CM_IOCARDOFF:
1507*4882a593Smuzhiyun 
1508*4882a593Smuzhiyun #ifdef CM4000_DEBUG
1509*4882a593Smuzhiyun 		DEBUGP(4, dev, "... in CM_IOCARDOFF\n");
1510*4882a593Smuzhiyun 		if (dev->flags0 & 0x01) {
1511*4882a593Smuzhiyun 			DEBUGP(4, dev, "    Card inserted\n");
1512*4882a593Smuzhiyun 		} else {
1513*4882a593Smuzhiyun 			DEBUGP(2, dev, "    No card inserted\n");
1514*4882a593Smuzhiyun 		}
1515*4882a593Smuzhiyun 		if (dev->flags0 & 0x02) {
1516*4882a593Smuzhiyun 			DEBUGP(4, dev, "    Card powered\n");
1517*4882a593Smuzhiyun 		} else {
1518*4882a593Smuzhiyun 			DEBUGP(2, dev, "    Card not powered\n");
1519*4882a593Smuzhiyun 		}
1520*4882a593Smuzhiyun #endif
1521*4882a593Smuzhiyun 
1522*4882a593Smuzhiyun 		/* is a card inserted and powered? */
1523*4882a593Smuzhiyun 		if ((dev->flags0 & 0x01) && (dev->flags0 & 0x02)) {
1524*4882a593Smuzhiyun 
1525*4882a593Smuzhiyun 			/* get IO lock */
1526*4882a593Smuzhiyun 			if (wait_event_interruptible
1527*4882a593Smuzhiyun 			    (dev->ioq,
1528*4882a593Smuzhiyun 			     ((filp->f_flags & O_NONBLOCK)
1529*4882a593Smuzhiyun 			      || (test_and_set_bit(LOCK_IO, (void *)&dev->flags)
1530*4882a593Smuzhiyun 				  == 0)))) {
1531*4882a593Smuzhiyun 				if (filp->f_flags & O_NONBLOCK)
1532*4882a593Smuzhiyun 					rc = -EAGAIN;
1533*4882a593Smuzhiyun 				else
1534*4882a593Smuzhiyun 					rc = -ERESTARTSYS;
1535*4882a593Smuzhiyun 				break;
1536*4882a593Smuzhiyun 			}
1537*4882a593Smuzhiyun 			/* Set Flags0 = 0x42 */
1538*4882a593Smuzhiyun 			DEBUGP(4, dev, "Set Flags0=0x42 \n");
1539*4882a593Smuzhiyun 			xoutb(0x42, REG_FLAGS0(iobase));
1540*4882a593Smuzhiyun 			clear_bit(IS_ATR_PRESENT, &dev->flags);
1541*4882a593Smuzhiyun 			clear_bit(IS_ATR_VALID, &dev->flags);
1542*4882a593Smuzhiyun 			dev->mstate = M_CARDOFF;
1543*4882a593Smuzhiyun 			clear_bit(LOCK_IO, &dev->flags);
1544*4882a593Smuzhiyun 			if (wait_event_interruptible
1545*4882a593Smuzhiyun 			    (dev->atrq,
1546*4882a593Smuzhiyun 			     ((filp->f_flags & O_NONBLOCK)
1547*4882a593Smuzhiyun 			      || (test_bit(IS_ATR_VALID, (void *)&dev->flags) !=
1548*4882a593Smuzhiyun 				  0)))) {
1549*4882a593Smuzhiyun 				if (filp->f_flags & O_NONBLOCK)
1550*4882a593Smuzhiyun 					rc = -EAGAIN;
1551*4882a593Smuzhiyun 				else
1552*4882a593Smuzhiyun 					rc = -ERESTARTSYS;
1553*4882a593Smuzhiyun 				break;
1554*4882a593Smuzhiyun 			}
1555*4882a593Smuzhiyun 		}
1556*4882a593Smuzhiyun 		/* release lock */
1557*4882a593Smuzhiyun 		clear_bit(LOCK_IO, &dev->flags);
1558*4882a593Smuzhiyun 		wake_up_interruptible(&dev->ioq);
1559*4882a593Smuzhiyun 
1560*4882a593Smuzhiyun 		rc = 0;
1561*4882a593Smuzhiyun 		break;
1562*4882a593Smuzhiyun 	case CM_IOCSPTS:
1563*4882a593Smuzhiyun 		{
1564*4882a593Smuzhiyun 			struct ptsreq krnptsreq;
1565*4882a593Smuzhiyun 
1566*4882a593Smuzhiyun 			if (copy_from_user(&krnptsreq, argp,
1567*4882a593Smuzhiyun 					   sizeof(struct ptsreq))) {
1568*4882a593Smuzhiyun 				rc = -EFAULT;
1569*4882a593Smuzhiyun 				break;
1570*4882a593Smuzhiyun 			}
1571*4882a593Smuzhiyun 
1572*4882a593Smuzhiyun 			rc = 0;
1573*4882a593Smuzhiyun 			DEBUGP(4, dev, "... in CM_IOCSPTS\n");
1574*4882a593Smuzhiyun 			/* wait for ATR to get valid */
1575*4882a593Smuzhiyun 			if (wait_event_interruptible
1576*4882a593Smuzhiyun 			    (dev->atrq,
1577*4882a593Smuzhiyun 			     ((filp->f_flags & O_NONBLOCK)
1578*4882a593Smuzhiyun 			      || (test_bit(IS_ATR_PRESENT, (void *)&dev->flags)
1579*4882a593Smuzhiyun 				  != 0)))) {
1580*4882a593Smuzhiyun 				if (filp->f_flags & O_NONBLOCK)
1581*4882a593Smuzhiyun 					rc = -EAGAIN;
1582*4882a593Smuzhiyun 				else
1583*4882a593Smuzhiyun 					rc = -ERESTARTSYS;
1584*4882a593Smuzhiyun 				break;
1585*4882a593Smuzhiyun 			}
1586*4882a593Smuzhiyun 			/* get IO lock */
1587*4882a593Smuzhiyun 			if (wait_event_interruptible
1588*4882a593Smuzhiyun 			    (dev->ioq,
1589*4882a593Smuzhiyun 			     ((filp->f_flags & O_NONBLOCK)
1590*4882a593Smuzhiyun 			      || (test_and_set_bit(LOCK_IO, (void *)&dev->flags)
1591*4882a593Smuzhiyun 				  == 0)))) {
1592*4882a593Smuzhiyun 				if (filp->f_flags & O_NONBLOCK)
1593*4882a593Smuzhiyun 					rc = -EAGAIN;
1594*4882a593Smuzhiyun 				else
1595*4882a593Smuzhiyun 					rc = -ERESTARTSYS;
1596*4882a593Smuzhiyun 				break;
1597*4882a593Smuzhiyun 			}
1598*4882a593Smuzhiyun 
1599*4882a593Smuzhiyun 			if ((rc = set_protocol(dev, &krnptsreq)) != 0) {
1600*4882a593Smuzhiyun 				/* auto power_on again */
1601*4882a593Smuzhiyun 				dev->mstate = M_FETCH_ATR;
1602*4882a593Smuzhiyun 				clear_bit(IS_ATR_VALID, &dev->flags);
1603*4882a593Smuzhiyun 			}
1604*4882a593Smuzhiyun 			/* release lock */
1605*4882a593Smuzhiyun 			clear_bit(LOCK_IO, &dev->flags);
1606*4882a593Smuzhiyun 			wake_up_interruptible(&dev->ioq);
1607*4882a593Smuzhiyun 
1608*4882a593Smuzhiyun 		}
1609*4882a593Smuzhiyun 		break;
1610*4882a593Smuzhiyun #ifdef CM4000_DEBUG
1611*4882a593Smuzhiyun 	case CM_IOSDBGLVL:
1612*4882a593Smuzhiyun 		rc = -ENOTTY;
1613*4882a593Smuzhiyun 		break;
1614*4882a593Smuzhiyun #endif
1615*4882a593Smuzhiyun 	default:
1616*4882a593Smuzhiyun 		DEBUGP(4, dev, "... in default (unknown IOCTL code)\n");
1617*4882a593Smuzhiyun 		rc = -ENOTTY;
1618*4882a593Smuzhiyun 	}
1619*4882a593Smuzhiyun out:
1620*4882a593Smuzhiyun 	mutex_unlock(&cmm_mutex);
1621*4882a593Smuzhiyun 	return rc;
1622*4882a593Smuzhiyun }
1623*4882a593Smuzhiyun 
cmm_open(struct inode * inode,struct file * filp)1624*4882a593Smuzhiyun static int cmm_open(struct inode *inode, struct file *filp)
1625*4882a593Smuzhiyun {
1626*4882a593Smuzhiyun 	struct cm4000_dev *dev;
1627*4882a593Smuzhiyun 	struct pcmcia_device *link;
1628*4882a593Smuzhiyun 	int minor = iminor(inode);
1629*4882a593Smuzhiyun 	int ret;
1630*4882a593Smuzhiyun 
1631*4882a593Smuzhiyun 	if (minor >= CM4000_MAX_DEV)
1632*4882a593Smuzhiyun 		return -ENODEV;
1633*4882a593Smuzhiyun 
1634*4882a593Smuzhiyun 	mutex_lock(&cmm_mutex);
1635*4882a593Smuzhiyun 	link = dev_table[minor];
1636*4882a593Smuzhiyun 	if (link == NULL || !pcmcia_dev_present(link)) {
1637*4882a593Smuzhiyun 		ret = -ENODEV;
1638*4882a593Smuzhiyun 		goto out;
1639*4882a593Smuzhiyun 	}
1640*4882a593Smuzhiyun 
1641*4882a593Smuzhiyun 	if (link->open) {
1642*4882a593Smuzhiyun 		ret = -EBUSY;
1643*4882a593Smuzhiyun 		goto out;
1644*4882a593Smuzhiyun 	}
1645*4882a593Smuzhiyun 
1646*4882a593Smuzhiyun 	dev = link->priv;
1647*4882a593Smuzhiyun 	filp->private_data = dev;
1648*4882a593Smuzhiyun 
1649*4882a593Smuzhiyun 	DEBUGP(2, dev, "-> cmm_open(device=%d.%d process=%s,%d)\n",
1650*4882a593Smuzhiyun 	      imajor(inode), minor, current->comm, current->pid);
1651*4882a593Smuzhiyun 
1652*4882a593Smuzhiyun 	/* init device variables, they may be "polluted" after close
1653*4882a593Smuzhiyun 	 * or, the device may never have been closed (i.e. open failed)
1654*4882a593Smuzhiyun 	 */
1655*4882a593Smuzhiyun 
1656*4882a593Smuzhiyun 	ZERO_DEV(dev);
1657*4882a593Smuzhiyun 
1658*4882a593Smuzhiyun 	/* opening will always block since the
1659*4882a593Smuzhiyun 	 * monitor will be started by open, which
1660*4882a593Smuzhiyun 	 * means we have to wait for ATR becoming
1661*4882a593Smuzhiyun 	 * valid = block until valid (or card
1662*4882a593Smuzhiyun 	 * inserted)
1663*4882a593Smuzhiyun 	 */
1664*4882a593Smuzhiyun 	if (filp->f_flags & O_NONBLOCK) {
1665*4882a593Smuzhiyun 		ret = -EAGAIN;
1666*4882a593Smuzhiyun 		goto out;
1667*4882a593Smuzhiyun 	}
1668*4882a593Smuzhiyun 
1669*4882a593Smuzhiyun 	dev->mdelay = T_50MSEC;
1670*4882a593Smuzhiyun 
1671*4882a593Smuzhiyun 	/* start monitoring the cardstatus */
1672*4882a593Smuzhiyun 	start_monitor(dev);
1673*4882a593Smuzhiyun 
1674*4882a593Smuzhiyun 	link->open = 1;		/* only one open per device */
1675*4882a593Smuzhiyun 
1676*4882a593Smuzhiyun 	DEBUGP(2, dev, "<- cmm_open\n");
1677*4882a593Smuzhiyun 	ret = stream_open(inode, filp);
1678*4882a593Smuzhiyun out:
1679*4882a593Smuzhiyun 	mutex_unlock(&cmm_mutex);
1680*4882a593Smuzhiyun 	return ret;
1681*4882a593Smuzhiyun }
1682*4882a593Smuzhiyun 
cmm_close(struct inode * inode,struct file * filp)1683*4882a593Smuzhiyun static int cmm_close(struct inode *inode, struct file *filp)
1684*4882a593Smuzhiyun {
1685*4882a593Smuzhiyun 	struct cm4000_dev *dev;
1686*4882a593Smuzhiyun 	struct pcmcia_device *link;
1687*4882a593Smuzhiyun 	int minor = iminor(inode);
1688*4882a593Smuzhiyun 
1689*4882a593Smuzhiyun 	if (minor >= CM4000_MAX_DEV)
1690*4882a593Smuzhiyun 		return -ENODEV;
1691*4882a593Smuzhiyun 
1692*4882a593Smuzhiyun 	link = dev_table[minor];
1693*4882a593Smuzhiyun 	if (link == NULL)
1694*4882a593Smuzhiyun 		return -ENODEV;
1695*4882a593Smuzhiyun 
1696*4882a593Smuzhiyun 	dev = link->priv;
1697*4882a593Smuzhiyun 
1698*4882a593Smuzhiyun 	DEBUGP(2, dev, "-> cmm_close(maj/min=%d.%d)\n",
1699*4882a593Smuzhiyun 	       imajor(inode), minor);
1700*4882a593Smuzhiyun 
1701*4882a593Smuzhiyun 	stop_monitor(dev);
1702*4882a593Smuzhiyun 
1703*4882a593Smuzhiyun 	ZERO_DEV(dev);
1704*4882a593Smuzhiyun 
1705*4882a593Smuzhiyun 	link->open = 0;		/* only one open per device */
1706*4882a593Smuzhiyun 	wake_up(&dev->devq);	/* socket removed? */
1707*4882a593Smuzhiyun 
1708*4882a593Smuzhiyun 	DEBUGP(2, dev, "cmm_close\n");
1709*4882a593Smuzhiyun 	return 0;
1710*4882a593Smuzhiyun }
1711*4882a593Smuzhiyun 
cmm_cm4000_release(struct pcmcia_device * link)1712*4882a593Smuzhiyun static void cmm_cm4000_release(struct pcmcia_device * link)
1713*4882a593Smuzhiyun {
1714*4882a593Smuzhiyun 	struct cm4000_dev *dev = link->priv;
1715*4882a593Smuzhiyun 
1716*4882a593Smuzhiyun 	/* dont terminate the monitor, rather rely on
1717*4882a593Smuzhiyun 	 * close doing that for us.
1718*4882a593Smuzhiyun 	 */
1719*4882a593Smuzhiyun 	DEBUGP(3, dev, "-> cmm_cm4000_release\n");
1720*4882a593Smuzhiyun 	while (link->open) {
1721*4882a593Smuzhiyun 		printk(KERN_INFO MODULE_NAME ": delaying release until "
1722*4882a593Smuzhiyun 		       "process has terminated\n");
1723*4882a593Smuzhiyun 		/* note: don't interrupt us:
1724*4882a593Smuzhiyun 		 * close the applications which own
1725*4882a593Smuzhiyun 		 * the devices _first_ !
1726*4882a593Smuzhiyun 		 */
1727*4882a593Smuzhiyun 		wait_event(dev->devq, (link->open == 0));
1728*4882a593Smuzhiyun 	}
1729*4882a593Smuzhiyun 	/* dev->devq=NULL;	this cannot be zeroed earlier */
1730*4882a593Smuzhiyun 	DEBUGP(3, dev, "<- cmm_cm4000_release\n");
1731*4882a593Smuzhiyun 	return;
1732*4882a593Smuzhiyun }
1733*4882a593Smuzhiyun 
1734*4882a593Smuzhiyun /*==== Interface to PCMCIA Layer =======================================*/
1735*4882a593Smuzhiyun 
cm4000_config_check(struct pcmcia_device * p_dev,void * priv_data)1736*4882a593Smuzhiyun static int cm4000_config_check(struct pcmcia_device *p_dev, void *priv_data)
1737*4882a593Smuzhiyun {
1738*4882a593Smuzhiyun 	return pcmcia_request_io(p_dev);
1739*4882a593Smuzhiyun }
1740*4882a593Smuzhiyun 
cm4000_config(struct pcmcia_device * link,int devno)1741*4882a593Smuzhiyun static int cm4000_config(struct pcmcia_device * link, int devno)
1742*4882a593Smuzhiyun {
1743*4882a593Smuzhiyun 	link->config_flags |= CONF_AUTO_SET_IO;
1744*4882a593Smuzhiyun 
1745*4882a593Smuzhiyun 	/* read the config-tuples */
1746*4882a593Smuzhiyun 	if (pcmcia_loop_config(link, cm4000_config_check, NULL))
1747*4882a593Smuzhiyun 		goto cs_release;
1748*4882a593Smuzhiyun 
1749*4882a593Smuzhiyun 	if (pcmcia_enable_device(link))
1750*4882a593Smuzhiyun 		goto cs_release;
1751*4882a593Smuzhiyun 
1752*4882a593Smuzhiyun 	return 0;
1753*4882a593Smuzhiyun 
1754*4882a593Smuzhiyun cs_release:
1755*4882a593Smuzhiyun 	cm4000_release(link);
1756*4882a593Smuzhiyun 	return -ENODEV;
1757*4882a593Smuzhiyun }
1758*4882a593Smuzhiyun 
cm4000_suspend(struct pcmcia_device * link)1759*4882a593Smuzhiyun static int cm4000_suspend(struct pcmcia_device *link)
1760*4882a593Smuzhiyun {
1761*4882a593Smuzhiyun 	struct cm4000_dev *dev;
1762*4882a593Smuzhiyun 
1763*4882a593Smuzhiyun 	dev = link->priv;
1764*4882a593Smuzhiyun 	stop_monitor(dev);
1765*4882a593Smuzhiyun 
1766*4882a593Smuzhiyun 	return 0;
1767*4882a593Smuzhiyun }
1768*4882a593Smuzhiyun 
cm4000_resume(struct pcmcia_device * link)1769*4882a593Smuzhiyun static int cm4000_resume(struct pcmcia_device *link)
1770*4882a593Smuzhiyun {
1771*4882a593Smuzhiyun 	struct cm4000_dev *dev;
1772*4882a593Smuzhiyun 
1773*4882a593Smuzhiyun 	dev = link->priv;
1774*4882a593Smuzhiyun 	if (link->open)
1775*4882a593Smuzhiyun 		start_monitor(dev);
1776*4882a593Smuzhiyun 
1777*4882a593Smuzhiyun 	return 0;
1778*4882a593Smuzhiyun }
1779*4882a593Smuzhiyun 
cm4000_release(struct pcmcia_device * link)1780*4882a593Smuzhiyun static void cm4000_release(struct pcmcia_device *link)
1781*4882a593Smuzhiyun {
1782*4882a593Smuzhiyun 	cmm_cm4000_release(link);	/* delay release until device closed */
1783*4882a593Smuzhiyun 	pcmcia_disable_device(link);
1784*4882a593Smuzhiyun }
1785*4882a593Smuzhiyun 
cm4000_probe(struct pcmcia_device * link)1786*4882a593Smuzhiyun static int cm4000_probe(struct pcmcia_device *link)
1787*4882a593Smuzhiyun {
1788*4882a593Smuzhiyun 	struct cm4000_dev *dev;
1789*4882a593Smuzhiyun 	int i, ret;
1790*4882a593Smuzhiyun 
1791*4882a593Smuzhiyun 	for (i = 0; i < CM4000_MAX_DEV; i++)
1792*4882a593Smuzhiyun 		if (dev_table[i] == NULL)
1793*4882a593Smuzhiyun 			break;
1794*4882a593Smuzhiyun 
1795*4882a593Smuzhiyun 	if (i == CM4000_MAX_DEV) {
1796*4882a593Smuzhiyun 		printk(KERN_NOTICE MODULE_NAME ": all devices in use\n");
1797*4882a593Smuzhiyun 		return -ENODEV;
1798*4882a593Smuzhiyun 	}
1799*4882a593Smuzhiyun 
1800*4882a593Smuzhiyun 	/* create a new cm4000_cs device */
1801*4882a593Smuzhiyun 	dev = kzalloc(sizeof(struct cm4000_dev), GFP_KERNEL);
1802*4882a593Smuzhiyun 	if (dev == NULL)
1803*4882a593Smuzhiyun 		return -ENOMEM;
1804*4882a593Smuzhiyun 
1805*4882a593Smuzhiyun 	dev->p_dev = link;
1806*4882a593Smuzhiyun 	link->priv = dev;
1807*4882a593Smuzhiyun 	dev_table[i] = link;
1808*4882a593Smuzhiyun 
1809*4882a593Smuzhiyun 	init_waitqueue_head(&dev->devq);
1810*4882a593Smuzhiyun 	init_waitqueue_head(&dev->ioq);
1811*4882a593Smuzhiyun 	init_waitqueue_head(&dev->atrq);
1812*4882a593Smuzhiyun 	init_waitqueue_head(&dev->readq);
1813*4882a593Smuzhiyun 
1814*4882a593Smuzhiyun 	ret = cm4000_config(link, i);
1815*4882a593Smuzhiyun 	if (ret) {
1816*4882a593Smuzhiyun 		dev_table[i] = NULL;
1817*4882a593Smuzhiyun 		kfree(dev);
1818*4882a593Smuzhiyun 		return ret;
1819*4882a593Smuzhiyun 	}
1820*4882a593Smuzhiyun 
1821*4882a593Smuzhiyun 	device_create(cmm_class, NULL, MKDEV(major, i), NULL, "cmm%d", i);
1822*4882a593Smuzhiyun 
1823*4882a593Smuzhiyun 	return 0;
1824*4882a593Smuzhiyun }
1825*4882a593Smuzhiyun 
cm4000_detach(struct pcmcia_device * link)1826*4882a593Smuzhiyun static void cm4000_detach(struct pcmcia_device *link)
1827*4882a593Smuzhiyun {
1828*4882a593Smuzhiyun 	struct cm4000_dev *dev = link->priv;
1829*4882a593Smuzhiyun 	int devno;
1830*4882a593Smuzhiyun 
1831*4882a593Smuzhiyun 	/* find device */
1832*4882a593Smuzhiyun 	for (devno = 0; devno < CM4000_MAX_DEV; devno++)
1833*4882a593Smuzhiyun 		if (dev_table[devno] == link)
1834*4882a593Smuzhiyun 			break;
1835*4882a593Smuzhiyun 	if (devno == CM4000_MAX_DEV)
1836*4882a593Smuzhiyun 		return;
1837*4882a593Smuzhiyun 
1838*4882a593Smuzhiyun 	stop_monitor(dev);
1839*4882a593Smuzhiyun 
1840*4882a593Smuzhiyun 	cm4000_release(link);
1841*4882a593Smuzhiyun 
1842*4882a593Smuzhiyun 	dev_table[devno] = NULL;
1843*4882a593Smuzhiyun 	kfree(dev);
1844*4882a593Smuzhiyun 
1845*4882a593Smuzhiyun 	device_destroy(cmm_class, MKDEV(major, devno));
1846*4882a593Smuzhiyun 
1847*4882a593Smuzhiyun 	return;
1848*4882a593Smuzhiyun }
1849*4882a593Smuzhiyun 
1850*4882a593Smuzhiyun static const struct file_operations cm4000_fops = {
1851*4882a593Smuzhiyun 	.owner	= THIS_MODULE,
1852*4882a593Smuzhiyun 	.read	= cmm_read,
1853*4882a593Smuzhiyun 	.write	= cmm_write,
1854*4882a593Smuzhiyun 	.unlocked_ioctl	= cmm_ioctl,
1855*4882a593Smuzhiyun 	.open	= cmm_open,
1856*4882a593Smuzhiyun 	.release= cmm_close,
1857*4882a593Smuzhiyun 	.llseek = no_llseek,
1858*4882a593Smuzhiyun };
1859*4882a593Smuzhiyun 
1860*4882a593Smuzhiyun static const struct pcmcia_device_id cm4000_ids[] = {
1861*4882a593Smuzhiyun 	PCMCIA_DEVICE_MANF_CARD(0x0223, 0x0002),
1862*4882a593Smuzhiyun 	PCMCIA_DEVICE_PROD_ID12("CardMan", "4000", 0x2FB368CA, 0xA2BD8C39),
1863*4882a593Smuzhiyun 	PCMCIA_DEVICE_NULL,
1864*4882a593Smuzhiyun };
1865*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pcmcia, cm4000_ids);
1866*4882a593Smuzhiyun 
1867*4882a593Smuzhiyun static struct pcmcia_driver cm4000_driver = {
1868*4882a593Smuzhiyun 	.owner	  = THIS_MODULE,
1869*4882a593Smuzhiyun 	.name	  = "cm4000_cs",
1870*4882a593Smuzhiyun 	.probe    = cm4000_probe,
1871*4882a593Smuzhiyun 	.remove   = cm4000_detach,
1872*4882a593Smuzhiyun 	.suspend  = cm4000_suspend,
1873*4882a593Smuzhiyun 	.resume   = cm4000_resume,
1874*4882a593Smuzhiyun 	.id_table = cm4000_ids,
1875*4882a593Smuzhiyun };
1876*4882a593Smuzhiyun 
cmm_init(void)1877*4882a593Smuzhiyun static int __init cmm_init(void)
1878*4882a593Smuzhiyun {
1879*4882a593Smuzhiyun 	int rc;
1880*4882a593Smuzhiyun 
1881*4882a593Smuzhiyun 	cmm_class = class_create(THIS_MODULE, "cardman_4000");
1882*4882a593Smuzhiyun 	if (IS_ERR(cmm_class))
1883*4882a593Smuzhiyun 		return PTR_ERR(cmm_class);
1884*4882a593Smuzhiyun 
1885*4882a593Smuzhiyun 	major = register_chrdev(0, DEVICE_NAME, &cm4000_fops);
1886*4882a593Smuzhiyun 	if (major < 0) {
1887*4882a593Smuzhiyun 		printk(KERN_WARNING MODULE_NAME
1888*4882a593Smuzhiyun 			": could not get major number\n");
1889*4882a593Smuzhiyun 		class_destroy(cmm_class);
1890*4882a593Smuzhiyun 		return major;
1891*4882a593Smuzhiyun 	}
1892*4882a593Smuzhiyun 
1893*4882a593Smuzhiyun 	rc = pcmcia_register_driver(&cm4000_driver);
1894*4882a593Smuzhiyun 	if (rc < 0) {
1895*4882a593Smuzhiyun 		unregister_chrdev(major, DEVICE_NAME);
1896*4882a593Smuzhiyun 		class_destroy(cmm_class);
1897*4882a593Smuzhiyun 		return rc;
1898*4882a593Smuzhiyun 	}
1899*4882a593Smuzhiyun 
1900*4882a593Smuzhiyun 	return 0;
1901*4882a593Smuzhiyun }
1902*4882a593Smuzhiyun 
cmm_exit(void)1903*4882a593Smuzhiyun static void __exit cmm_exit(void)
1904*4882a593Smuzhiyun {
1905*4882a593Smuzhiyun 	pcmcia_unregister_driver(&cm4000_driver);
1906*4882a593Smuzhiyun 	unregister_chrdev(major, DEVICE_NAME);
1907*4882a593Smuzhiyun 	class_destroy(cmm_class);
1908*4882a593Smuzhiyun };
1909*4882a593Smuzhiyun 
1910*4882a593Smuzhiyun module_init(cmm_init);
1911*4882a593Smuzhiyun module_exit(cmm_exit);
1912*4882a593Smuzhiyun MODULE_LICENSE("Dual BSD/GPL");
1913