xref: /OK3568_Linux_fs/kernel/drivers/char/nwflash.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Flash memory interface rev.5 driver for the Intel
4*4882a593Smuzhiyun  * Flash chips used on the NetWinder.
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * 20/08/2000	RMK	use __ioremap to map flash into virtual memory
7*4882a593Smuzhiyun  *			make a few more places use "volatile"
8*4882a593Smuzhiyun  * 22/05/2001	RMK	- Lock read against write
9*4882a593Smuzhiyun  *			- merge printk level changes (with mods) from Alan Cox.
10*4882a593Smuzhiyun  *			- use *ppos as the file position, not file->f_pos.
11*4882a593Smuzhiyun  *			- fix check for out of range pos and r/w size
12*4882a593Smuzhiyun  *
13*4882a593Smuzhiyun  * Please note that we are tampering with the only flash chip in the
14*4882a593Smuzhiyun  * machine, which contains the bootup code.  We therefore have the
15*4882a593Smuzhiyun  * power to convert these machines into doorstops...
16*4882a593Smuzhiyun  */
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #include <linux/module.h>
19*4882a593Smuzhiyun #include <linux/types.h>
20*4882a593Smuzhiyun #include <linux/fs.h>
21*4882a593Smuzhiyun #include <linux/errno.h>
22*4882a593Smuzhiyun #include <linux/mm.h>
23*4882a593Smuzhiyun #include <linux/delay.h>
24*4882a593Smuzhiyun #include <linux/proc_fs.h>
25*4882a593Smuzhiyun #include <linux/miscdevice.h>
26*4882a593Smuzhiyun #include <linux/spinlock.h>
27*4882a593Smuzhiyun #include <linux/rwsem.h>
28*4882a593Smuzhiyun #include <linux/init.h>
29*4882a593Smuzhiyun #include <linux/mutex.h>
30*4882a593Smuzhiyun #include <linux/jiffies.h>
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun #include <asm/hardware/dec21285.h>
33*4882a593Smuzhiyun #include <asm/io.h>
34*4882a593Smuzhiyun #include <asm/mach-types.h>
35*4882a593Smuzhiyun #include <linux/uaccess.h>
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun /*****************************************************************************/
38*4882a593Smuzhiyun #include <asm/nwflash.h>
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun #define	NWFLASH_VERSION "6.4"
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun static DEFINE_MUTEX(flash_mutex);
43*4882a593Smuzhiyun static void kick_open(void);
44*4882a593Smuzhiyun static int get_flash_id(void);
45*4882a593Smuzhiyun static int erase_block(int nBlock);
46*4882a593Smuzhiyun static int write_block(unsigned long p, const char __user *buf, int count);
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun #define KFLASH_SIZE	1024*1024	//1 Meg
49*4882a593Smuzhiyun #define KFLASH_SIZE4	4*1024*1024	//4 Meg
50*4882a593Smuzhiyun #define KFLASH_ID	0x89A6		//Intel flash
51*4882a593Smuzhiyun #define KFLASH_ID4	0xB0D4		//Intel flash 4Meg
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun static bool flashdebug;		//if set - we will display progress msgs
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun static int gbWriteEnable;
56*4882a593Smuzhiyun static int gbWriteBase64Enable;
57*4882a593Smuzhiyun static volatile unsigned char *FLASH_BASE;
58*4882a593Smuzhiyun static int gbFlashSize = KFLASH_SIZE;
59*4882a593Smuzhiyun static DEFINE_MUTEX(nwflash_mutex);
60*4882a593Smuzhiyun 
get_flash_id(void)61*4882a593Smuzhiyun static int get_flash_id(void)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun 	volatile unsigned int c1, c2;
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun 	/*
66*4882a593Smuzhiyun 	 * try to get flash chip ID
67*4882a593Smuzhiyun 	 */
68*4882a593Smuzhiyun 	kick_open();
69*4882a593Smuzhiyun 	c2 = inb(0x80);
70*4882a593Smuzhiyun 	*(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x90;
71*4882a593Smuzhiyun 	udelay(15);
72*4882a593Smuzhiyun 	c1 = *(volatile unsigned char *) FLASH_BASE;
73*4882a593Smuzhiyun 	c2 = inb(0x80);
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun 	/*
76*4882a593Smuzhiyun 	 * on 4 Meg flash the second byte is actually at offset 2...
77*4882a593Smuzhiyun 	 */
78*4882a593Smuzhiyun 	if (c1 == 0xB0)
79*4882a593Smuzhiyun 		c2 = *(volatile unsigned char *) (FLASH_BASE + 2);
80*4882a593Smuzhiyun 	else
81*4882a593Smuzhiyun 		c2 = *(volatile unsigned char *) (FLASH_BASE + 1);
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun 	c2 += (c1 << 8);
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun 	/*
86*4882a593Smuzhiyun 	 * set it back to read mode
87*4882a593Smuzhiyun 	 */
88*4882a593Smuzhiyun 	*(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0xFF;
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun 	if (c2 == KFLASH_ID4)
91*4882a593Smuzhiyun 		gbFlashSize = KFLASH_SIZE4;
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun 	return c2;
94*4882a593Smuzhiyun }
95*4882a593Smuzhiyun 
flash_ioctl(struct file * filep,unsigned int cmd,unsigned long arg)96*4882a593Smuzhiyun static long flash_ioctl(struct file *filep, unsigned int cmd, unsigned long arg)
97*4882a593Smuzhiyun {
98*4882a593Smuzhiyun 	mutex_lock(&flash_mutex);
99*4882a593Smuzhiyun 	switch (cmd) {
100*4882a593Smuzhiyun 	case CMD_WRITE_DISABLE:
101*4882a593Smuzhiyun 		gbWriteBase64Enable = 0;
102*4882a593Smuzhiyun 		gbWriteEnable = 0;
103*4882a593Smuzhiyun 		break;
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun 	case CMD_WRITE_ENABLE:
106*4882a593Smuzhiyun 		gbWriteEnable = 1;
107*4882a593Smuzhiyun 		break;
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun 	case CMD_WRITE_BASE64K_ENABLE:
110*4882a593Smuzhiyun 		gbWriteBase64Enable = 1;
111*4882a593Smuzhiyun 		break;
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun 	default:
114*4882a593Smuzhiyun 		gbWriteBase64Enable = 0;
115*4882a593Smuzhiyun 		gbWriteEnable = 0;
116*4882a593Smuzhiyun 		mutex_unlock(&flash_mutex);
117*4882a593Smuzhiyun 		return -EINVAL;
118*4882a593Smuzhiyun 	}
119*4882a593Smuzhiyun 	mutex_unlock(&flash_mutex);
120*4882a593Smuzhiyun 	return 0;
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun 
flash_read(struct file * file,char __user * buf,size_t size,loff_t * ppos)123*4882a593Smuzhiyun static ssize_t flash_read(struct file *file, char __user *buf, size_t size,
124*4882a593Smuzhiyun 			  loff_t *ppos)
125*4882a593Smuzhiyun {
126*4882a593Smuzhiyun 	ssize_t ret;
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 	if (flashdebug)
129*4882a593Smuzhiyun 		printk(KERN_DEBUG "flash_read: flash_read: offset=0x%llx, "
130*4882a593Smuzhiyun 		       "buffer=%p, count=0x%zx.\n", *ppos, buf, size);
131*4882a593Smuzhiyun 	/*
132*4882a593Smuzhiyun 	 * We now lock against reads and writes. --rmk
133*4882a593Smuzhiyun 	 */
134*4882a593Smuzhiyun 	if (mutex_lock_interruptible(&nwflash_mutex))
135*4882a593Smuzhiyun 		return -ERESTARTSYS;
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun 	ret = simple_read_from_buffer(buf, size, ppos, (void *)FLASH_BASE, gbFlashSize);
138*4882a593Smuzhiyun 	mutex_unlock(&nwflash_mutex);
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 	return ret;
141*4882a593Smuzhiyun }
142*4882a593Smuzhiyun 
flash_write(struct file * file,const char __user * buf,size_t size,loff_t * ppos)143*4882a593Smuzhiyun static ssize_t flash_write(struct file *file, const char __user *buf,
144*4882a593Smuzhiyun 			   size_t size, loff_t * ppos)
145*4882a593Smuzhiyun {
146*4882a593Smuzhiyun 	unsigned long p = *ppos;
147*4882a593Smuzhiyun 	unsigned int count = size;
148*4882a593Smuzhiyun 	int written;
149*4882a593Smuzhiyun 	int nBlock, temp, rc;
150*4882a593Smuzhiyun 	int i, j;
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun 	if (flashdebug)
153*4882a593Smuzhiyun 		printk("flash_write: offset=0x%lX, buffer=0x%p, count=0x%X.\n",
154*4882a593Smuzhiyun 		       p, buf, count);
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun 	if (!gbWriteEnable)
157*4882a593Smuzhiyun 		return -EINVAL;
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun 	if (p < 64 * 1024 && (!gbWriteBase64Enable))
160*4882a593Smuzhiyun 		return -EINVAL;
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun 	/*
163*4882a593Smuzhiyun 	 * check for out of range pos or count
164*4882a593Smuzhiyun 	 */
165*4882a593Smuzhiyun 	if (p >= gbFlashSize)
166*4882a593Smuzhiyun 		return count ? -ENXIO : 0;
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun 	if (count > gbFlashSize - p)
169*4882a593Smuzhiyun 		count = gbFlashSize - p;
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun 	if (!access_ok(buf, count))
172*4882a593Smuzhiyun 		return -EFAULT;
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun 	/*
175*4882a593Smuzhiyun 	 * We now lock against reads and writes. --rmk
176*4882a593Smuzhiyun 	 */
177*4882a593Smuzhiyun 	if (mutex_lock_interruptible(&nwflash_mutex))
178*4882a593Smuzhiyun 		return -ERESTARTSYS;
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun 	written = 0;
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun 	nBlock = (int) p >> 16;	//block # of 64K bytes
183*4882a593Smuzhiyun 
184*4882a593Smuzhiyun 	/*
185*4882a593Smuzhiyun 	 * # of 64K blocks to erase and write
186*4882a593Smuzhiyun 	 */
187*4882a593Smuzhiyun 	temp = ((int) (p + count) >> 16) - nBlock + 1;
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun 	/*
190*4882a593Smuzhiyun 	 * write ends at exactly 64k boundary?
191*4882a593Smuzhiyun 	 */
192*4882a593Smuzhiyun 	if (((int) (p + count) & 0xFFFF) == 0)
193*4882a593Smuzhiyun 		temp -= 1;
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun 	if (flashdebug)
196*4882a593Smuzhiyun 		printk(KERN_DEBUG "flash_write: writing %d block(s) "
197*4882a593Smuzhiyun 			"starting at %d.\n", temp, nBlock);
198*4882a593Smuzhiyun 
199*4882a593Smuzhiyun 	for (; temp; temp--, nBlock++) {
200*4882a593Smuzhiyun 		if (flashdebug)
201*4882a593Smuzhiyun 			printk(KERN_DEBUG "flash_write: erasing block %d.\n", nBlock);
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun 		/*
204*4882a593Smuzhiyun 		 * first we have to erase the block(s), where we will write...
205*4882a593Smuzhiyun 		 */
206*4882a593Smuzhiyun 		i = 0;
207*4882a593Smuzhiyun 		j = 0;
208*4882a593Smuzhiyun 	  RetryBlock:
209*4882a593Smuzhiyun 		do {
210*4882a593Smuzhiyun 			rc = erase_block(nBlock);
211*4882a593Smuzhiyun 			i++;
212*4882a593Smuzhiyun 		} while (rc && i < 10);
213*4882a593Smuzhiyun 
214*4882a593Smuzhiyun 		if (rc) {
215*4882a593Smuzhiyun 			printk(KERN_ERR "flash_write: erase error %x\n", rc);
216*4882a593Smuzhiyun 			break;
217*4882a593Smuzhiyun 		}
218*4882a593Smuzhiyun 		if (flashdebug)
219*4882a593Smuzhiyun 			printk(KERN_DEBUG "flash_write: writing offset %lX, "
220*4882a593Smuzhiyun 			       "from buf %p, bytes left %X.\n", p, buf,
221*4882a593Smuzhiyun 			       count - written);
222*4882a593Smuzhiyun 
223*4882a593Smuzhiyun 		/*
224*4882a593Smuzhiyun 		 * write_block will limit write to space left in this block
225*4882a593Smuzhiyun 		 */
226*4882a593Smuzhiyun 		rc = write_block(p, buf, count - written);
227*4882a593Smuzhiyun 		j++;
228*4882a593Smuzhiyun 
229*4882a593Smuzhiyun 		/*
230*4882a593Smuzhiyun 		 * if somehow write verify failed? Can't happen??
231*4882a593Smuzhiyun 		 */
232*4882a593Smuzhiyun 		if (!rc) {
233*4882a593Smuzhiyun 			/*
234*4882a593Smuzhiyun 			 * retry up to 10 times
235*4882a593Smuzhiyun 			 */
236*4882a593Smuzhiyun 			if (j < 10)
237*4882a593Smuzhiyun 				goto RetryBlock;
238*4882a593Smuzhiyun 			else
239*4882a593Smuzhiyun 				/*
240*4882a593Smuzhiyun 				 * else quit with error...
241*4882a593Smuzhiyun 				 */
242*4882a593Smuzhiyun 				rc = -1;
243*4882a593Smuzhiyun 
244*4882a593Smuzhiyun 		}
245*4882a593Smuzhiyun 		if (rc < 0) {
246*4882a593Smuzhiyun 			printk(KERN_ERR "flash_write: write error %X\n", rc);
247*4882a593Smuzhiyun 			break;
248*4882a593Smuzhiyun 		}
249*4882a593Smuzhiyun 		p += rc;
250*4882a593Smuzhiyun 		buf += rc;
251*4882a593Smuzhiyun 		written += rc;
252*4882a593Smuzhiyun 		*ppos += rc;
253*4882a593Smuzhiyun 
254*4882a593Smuzhiyun 		if (flashdebug)
255*4882a593Smuzhiyun 			printk(KERN_DEBUG "flash_write: written 0x%X bytes OK.\n", written);
256*4882a593Smuzhiyun 	}
257*4882a593Smuzhiyun 
258*4882a593Smuzhiyun 	mutex_unlock(&nwflash_mutex);
259*4882a593Smuzhiyun 
260*4882a593Smuzhiyun 	return written;
261*4882a593Smuzhiyun }
262*4882a593Smuzhiyun 
263*4882a593Smuzhiyun 
264*4882a593Smuzhiyun /*
265*4882a593Smuzhiyun  * The memory devices use the full 32/64 bits of the offset, and so we cannot
266*4882a593Smuzhiyun  * check against negative addresses: they are ok. The return value is weird,
267*4882a593Smuzhiyun  * though, in that case (0).
268*4882a593Smuzhiyun  *
269*4882a593Smuzhiyun  * also note that seeking relative to the "end of file" isn't supported:
270*4882a593Smuzhiyun  * it has no meaning, so it returns -EINVAL.
271*4882a593Smuzhiyun  */
flash_llseek(struct file * file,loff_t offset,int orig)272*4882a593Smuzhiyun static loff_t flash_llseek(struct file *file, loff_t offset, int orig)
273*4882a593Smuzhiyun {
274*4882a593Smuzhiyun 	loff_t ret;
275*4882a593Smuzhiyun 
276*4882a593Smuzhiyun 	mutex_lock(&flash_mutex);
277*4882a593Smuzhiyun 	if (flashdebug)
278*4882a593Smuzhiyun 		printk(KERN_DEBUG "flash_llseek: offset=0x%X, orig=0x%X.\n",
279*4882a593Smuzhiyun 		       (unsigned int) offset, orig);
280*4882a593Smuzhiyun 
281*4882a593Smuzhiyun 	ret = no_seek_end_llseek_size(file, offset, orig, gbFlashSize);
282*4882a593Smuzhiyun 	mutex_unlock(&flash_mutex);
283*4882a593Smuzhiyun 	return ret;
284*4882a593Smuzhiyun }
285*4882a593Smuzhiyun 
286*4882a593Smuzhiyun 
287*4882a593Smuzhiyun /*
288*4882a593Smuzhiyun  * assume that main Write routine did the parameter checking...
289*4882a593Smuzhiyun  * so just go ahead and erase, what requested!
290*4882a593Smuzhiyun  */
291*4882a593Smuzhiyun 
erase_block(int nBlock)292*4882a593Smuzhiyun static int erase_block(int nBlock)
293*4882a593Smuzhiyun {
294*4882a593Smuzhiyun 	volatile unsigned int c1;
295*4882a593Smuzhiyun 	volatile unsigned char *pWritePtr;
296*4882a593Smuzhiyun 	unsigned long timeout;
297*4882a593Smuzhiyun 	int temp, temp1;
298*4882a593Smuzhiyun 
299*4882a593Smuzhiyun 	/*
300*4882a593Smuzhiyun 	 * reset footbridge to the correct offset 0 (...0..3)
301*4882a593Smuzhiyun 	 */
302*4882a593Smuzhiyun 	*CSR_ROMWRITEREG = 0;
303*4882a593Smuzhiyun 
304*4882a593Smuzhiyun 	/*
305*4882a593Smuzhiyun 	 * dummy ROM read
306*4882a593Smuzhiyun 	 */
307*4882a593Smuzhiyun 	c1 = *(volatile unsigned char *) (FLASH_BASE + 0x8000);
308*4882a593Smuzhiyun 
309*4882a593Smuzhiyun 	kick_open();
310*4882a593Smuzhiyun 	/*
311*4882a593Smuzhiyun 	 * reset status if old errors
312*4882a593Smuzhiyun 	 */
313*4882a593Smuzhiyun 	*(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;
314*4882a593Smuzhiyun 
315*4882a593Smuzhiyun 	/*
316*4882a593Smuzhiyun 	 * erase a block...
317*4882a593Smuzhiyun 	 * aim at the middle of a current block...
318*4882a593Smuzhiyun 	 */
319*4882a593Smuzhiyun 	pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + 0x8000 + (nBlock << 16)));
320*4882a593Smuzhiyun 	/*
321*4882a593Smuzhiyun 	 * dummy read
322*4882a593Smuzhiyun 	 */
323*4882a593Smuzhiyun 	c1 = *pWritePtr;
324*4882a593Smuzhiyun 
325*4882a593Smuzhiyun 	kick_open();
326*4882a593Smuzhiyun 	/*
327*4882a593Smuzhiyun 	 * erase
328*4882a593Smuzhiyun 	 */
329*4882a593Smuzhiyun 	*(volatile unsigned char *) pWritePtr = 0x20;
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun 	/*
332*4882a593Smuzhiyun 	 * confirm
333*4882a593Smuzhiyun 	 */
334*4882a593Smuzhiyun 	*(volatile unsigned char *) pWritePtr = 0xD0;
335*4882a593Smuzhiyun 
336*4882a593Smuzhiyun 	/*
337*4882a593Smuzhiyun 	 * wait 10 ms
338*4882a593Smuzhiyun 	 */
339*4882a593Smuzhiyun 	msleep(10);
340*4882a593Smuzhiyun 
341*4882a593Smuzhiyun 	/*
342*4882a593Smuzhiyun 	 * wait while erasing in process (up to 10 sec)
343*4882a593Smuzhiyun 	 */
344*4882a593Smuzhiyun 	timeout = jiffies + 10 * HZ;
345*4882a593Smuzhiyun 	c1 = 0;
346*4882a593Smuzhiyun 	while (!(c1 & 0x80) && time_before(jiffies, timeout)) {
347*4882a593Smuzhiyun 		msleep(10);
348*4882a593Smuzhiyun 		/*
349*4882a593Smuzhiyun 		 * read any address
350*4882a593Smuzhiyun 		 */
351*4882a593Smuzhiyun 		c1 = *(volatile unsigned char *) (pWritePtr);
352*4882a593Smuzhiyun 		//              printk("Flash_erase: status=%X.\n",c1);
353*4882a593Smuzhiyun 	}
354*4882a593Smuzhiyun 
355*4882a593Smuzhiyun 	/*
356*4882a593Smuzhiyun 	 * set flash for normal read access
357*4882a593Smuzhiyun 	 */
358*4882a593Smuzhiyun 	kick_open();
359*4882a593Smuzhiyun //      *(volatile unsigned char*)(FLASH_BASE+0x8000) = 0xFF;
360*4882a593Smuzhiyun 	*(volatile unsigned char *) pWritePtr = 0xFF;	//back to normal operation
361*4882a593Smuzhiyun 
362*4882a593Smuzhiyun 	/*
363*4882a593Smuzhiyun 	 * check if erase errors were reported
364*4882a593Smuzhiyun 	 */
365*4882a593Smuzhiyun 	if (c1 & 0x20) {
366*4882a593Smuzhiyun 		printk(KERN_ERR "flash_erase: err at %p\n", pWritePtr);
367*4882a593Smuzhiyun 
368*4882a593Smuzhiyun 		/*
369*4882a593Smuzhiyun 		 * reset error
370*4882a593Smuzhiyun 		 */
371*4882a593Smuzhiyun 		*(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;
372*4882a593Smuzhiyun 		return -2;
373*4882a593Smuzhiyun 	}
374*4882a593Smuzhiyun 
375*4882a593Smuzhiyun 	/*
376*4882a593Smuzhiyun 	 * just to make sure - verify if erased OK...
377*4882a593Smuzhiyun 	 */
378*4882a593Smuzhiyun 	msleep(10);
379*4882a593Smuzhiyun 
380*4882a593Smuzhiyun 	pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + (nBlock << 16)));
381*4882a593Smuzhiyun 
382*4882a593Smuzhiyun 	for (temp = 0; temp < 16 * 1024; temp++, pWritePtr += 4) {
383*4882a593Smuzhiyun 		if ((temp1 = *(volatile unsigned int *) pWritePtr) != 0xFFFFFFFF) {
384*4882a593Smuzhiyun 			printk(KERN_ERR "flash_erase: verify err at %p = %X\n",
385*4882a593Smuzhiyun 			       pWritePtr, temp1);
386*4882a593Smuzhiyun 			return -1;
387*4882a593Smuzhiyun 		}
388*4882a593Smuzhiyun 	}
389*4882a593Smuzhiyun 
390*4882a593Smuzhiyun 	return 0;
391*4882a593Smuzhiyun 
392*4882a593Smuzhiyun }
393*4882a593Smuzhiyun 
394*4882a593Smuzhiyun /*
395*4882a593Smuzhiyun  * write_block will limit number of bytes written to the space in this block
396*4882a593Smuzhiyun  */
write_block(unsigned long p,const char __user * buf,int count)397*4882a593Smuzhiyun static int write_block(unsigned long p, const char __user *buf, int count)
398*4882a593Smuzhiyun {
399*4882a593Smuzhiyun 	volatile unsigned int c1;
400*4882a593Smuzhiyun 	volatile unsigned int c2;
401*4882a593Smuzhiyun 	unsigned char *pWritePtr;
402*4882a593Smuzhiyun 	unsigned int uAddress;
403*4882a593Smuzhiyun 	unsigned int offset;
404*4882a593Smuzhiyun 	unsigned long timeout;
405*4882a593Smuzhiyun 	unsigned long timeout1;
406*4882a593Smuzhiyun 
407*4882a593Smuzhiyun 	pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + p));
408*4882a593Smuzhiyun 
409*4882a593Smuzhiyun 	/*
410*4882a593Smuzhiyun 	 * check if write will end in this block....
411*4882a593Smuzhiyun 	 */
412*4882a593Smuzhiyun 	offset = p & 0xFFFF;
413*4882a593Smuzhiyun 
414*4882a593Smuzhiyun 	if (offset + count > 0x10000)
415*4882a593Smuzhiyun 		count = 0x10000 - offset;
416*4882a593Smuzhiyun 
417*4882a593Smuzhiyun 	/*
418*4882a593Smuzhiyun 	 * wait up to 30 sec for this block
419*4882a593Smuzhiyun 	 */
420*4882a593Smuzhiyun 	timeout = jiffies + 30 * HZ;
421*4882a593Smuzhiyun 
422*4882a593Smuzhiyun 	for (offset = 0; offset < count; offset++, pWritePtr++) {
423*4882a593Smuzhiyun 		uAddress = (unsigned int) pWritePtr;
424*4882a593Smuzhiyun 		uAddress &= 0xFFFFFFFC;
425*4882a593Smuzhiyun 		if (__get_user(c2, buf + offset))
426*4882a593Smuzhiyun 			return -EFAULT;
427*4882a593Smuzhiyun 
428*4882a593Smuzhiyun 	  WriteRetry:
429*4882a593Smuzhiyun 	  	/*
430*4882a593Smuzhiyun 	  	 * dummy read
431*4882a593Smuzhiyun 	  	 */
432*4882a593Smuzhiyun 		c1 = *(volatile unsigned char *) (FLASH_BASE + 0x8000);
433*4882a593Smuzhiyun 
434*4882a593Smuzhiyun 		/*
435*4882a593Smuzhiyun 		 * kick open the write gate
436*4882a593Smuzhiyun 		 */
437*4882a593Smuzhiyun 		kick_open();
438*4882a593Smuzhiyun 
439*4882a593Smuzhiyun 		/*
440*4882a593Smuzhiyun 		 * program footbridge to the correct offset...0..3
441*4882a593Smuzhiyun 		 */
442*4882a593Smuzhiyun 		*CSR_ROMWRITEREG = (unsigned int) pWritePtr & 3;
443*4882a593Smuzhiyun 
444*4882a593Smuzhiyun 		/*
445*4882a593Smuzhiyun 		 * write cmd
446*4882a593Smuzhiyun 		 */
447*4882a593Smuzhiyun 		*(volatile unsigned char *) (uAddress) = 0x40;
448*4882a593Smuzhiyun 
449*4882a593Smuzhiyun 		/*
450*4882a593Smuzhiyun 		 * data to write
451*4882a593Smuzhiyun 		 */
452*4882a593Smuzhiyun 		*(volatile unsigned char *) (uAddress) = c2;
453*4882a593Smuzhiyun 
454*4882a593Smuzhiyun 		/*
455*4882a593Smuzhiyun 		 * get status
456*4882a593Smuzhiyun 		 */
457*4882a593Smuzhiyun 		*(volatile unsigned char *) (FLASH_BASE + 0x10000) = 0x70;
458*4882a593Smuzhiyun 
459*4882a593Smuzhiyun 		c1 = 0;
460*4882a593Smuzhiyun 
461*4882a593Smuzhiyun 		/*
462*4882a593Smuzhiyun 		 * wait up to 1 sec for this byte
463*4882a593Smuzhiyun 		 */
464*4882a593Smuzhiyun 		timeout1 = jiffies + 1 * HZ;
465*4882a593Smuzhiyun 
466*4882a593Smuzhiyun 		/*
467*4882a593Smuzhiyun 		 * while not ready...
468*4882a593Smuzhiyun 		 */
469*4882a593Smuzhiyun 		while (!(c1 & 0x80) && time_before(jiffies, timeout1))
470*4882a593Smuzhiyun 			c1 = *(volatile unsigned char *) (FLASH_BASE + 0x8000);
471*4882a593Smuzhiyun 
472*4882a593Smuzhiyun 		/*
473*4882a593Smuzhiyun 		 * if timeout getting status
474*4882a593Smuzhiyun 		 */
475*4882a593Smuzhiyun 		if (time_after_eq(jiffies, timeout1)) {
476*4882a593Smuzhiyun 			kick_open();
477*4882a593Smuzhiyun 			/*
478*4882a593Smuzhiyun 			 * reset err
479*4882a593Smuzhiyun 			 */
480*4882a593Smuzhiyun 			*(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;
481*4882a593Smuzhiyun 
482*4882a593Smuzhiyun 			goto WriteRetry;
483*4882a593Smuzhiyun 		}
484*4882a593Smuzhiyun 		/*
485*4882a593Smuzhiyun 		 * switch on read access, as a default flash operation mode
486*4882a593Smuzhiyun 		 */
487*4882a593Smuzhiyun 		kick_open();
488*4882a593Smuzhiyun 		/*
489*4882a593Smuzhiyun 		 * read access
490*4882a593Smuzhiyun 		 */
491*4882a593Smuzhiyun 		*(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0xFF;
492*4882a593Smuzhiyun 
493*4882a593Smuzhiyun 		/*
494*4882a593Smuzhiyun 		 * if hardware reports an error writing, and not timeout -
495*4882a593Smuzhiyun 		 * reset the chip and retry
496*4882a593Smuzhiyun 		 */
497*4882a593Smuzhiyun 		if (c1 & 0x10) {
498*4882a593Smuzhiyun 			kick_open();
499*4882a593Smuzhiyun 			/*
500*4882a593Smuzhiyun 			 * reset err
501*4882a593Smuzhiyun 			 */
502*4882a593Smuzhiyun 			*(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;
503*4882a593Smuzhiyun 
504*4882a593Smuzhiyun 			/*
505*4882a593Smuzhiyun 			 * before timeout?
506*4882a593Smuzhiyun 			 */
507*4882a593Smuzhiyun 			if (time_before(jiffies, timeout)) {
508*4882a593Smuzhiyun 				if (flashdebug)
509*4882a593Smuzhiyun 					printk(KERN_DEBUG "write_block: Retrying write at 0x%X)n",
510*4882a593Smuzhiyun 					       pWritePtr - FLASH_BASE);
511*4882a593Smuzhiyun 
512*4882a593Smuzhiyun 				/*
513*4882a593Smuzhiyun 				 * wait couple ms
514*4882a593Smuzhiyun 				 */
515*4882a593Smuzhiyun 				msleep(10);
516*4882a593Smuzhiyun 
517*4882a593Smuzhiyun 				goto WriteRetry;
518*4882a593Smuzhiyun 			} else {
519*4882a593Smuzhiyun 				printk(KERN_ERR "write_block: timeout at 0x%X\n",
520*4882a593Smuzhiyun 				       pWritePtr - FLASH_BASE);
521*4882a593Smuzhiyun 				/*
522*4882a593Smuzhiyun 				 * return error -2
523*4882a593Smuzhiyun 				 */
524*4882a593Smuzhiyun 				return -2;
525*4882a593Smuzhiyun 
526*4882a593Smuzhiyun 			}
527*4882a593Smuzhiyun 		}
528*4882a593Smuzhiyun 	}
529*4882a593Smuzhiyun 
530*4882a593Smuzhiyun 	msleep(10);
531*4882a593Smuzhiyun 
532*4882a593Smuzhiyun 	pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + p));
533*4882a593Smuzhiyun 
534*4882a593Smuzhiyun 	for (offset = 0; offset < count; offset++) {
535*4882a593Smuzhiyun 		char c, c1;
536*4882a593Smuzhiyun 		if (__get_user(c, buf))
537*4882a593Smuzhiyun 			return -EFAULT;
538*4882a593Smuzhiyun 		buf++;
539*4882a593Smuzhiyun 		if ((c1 = *pWritePtr++) != c) {
540*4882a593Smuzhiyun 			printk(KERN_ERR "write_block: verify error at 0x%X (%02X!=%02X)\n",
541*4882a593Smuzhiyun 			       pWritePtr - FLASH_BASE, c1, c);
542*4882a593Smuzhiyun 			return 0;
543*4882a593Smuzhiyun 		}
544*4882a593Smuzhiyun 	}
545*4882a593Smuzhiyun 
546*4882a593Smuzhiyun 	return count;
547*4882a593Smuzhiyun }
548*4882a593Smuzhiyun 
549*4882a593Smuzhiyun 
kick_open(void)550*4882a593Smuzhiyun static void kick_open(void)
551*4882a593Smuzhiyun {
552*4882a593Smuzhiyun 	unsigned long flags;
553*4882a593Smuzhiyun 
554*4882a593Smuzhiyun 	/*
555*4882a593Smuzhiyun 	 * we want to write a bit pattern XXX1 to Xilinx to enable
556*4882a593Smuzhiyun 	 * the write gate, which will be open for about the next 2ms.
557*4882a593Smuzhiyun 	 */
558*4882a593Smuzhiyun 	raw_spin_lock_irqsave(&nw_gpio_lock, flags);
559*4882a593Smuzhiyun 	nw_cpld_modify(CPLD_FLASH_WR_ENABLE, CPLD_FLASH_WR_ENABLE);
560*4882a593Smuzhiyun 	raw_spin_unlock_irqrestore(&nw_gpio_lock, flags);
561*4882a593Smuzhiyun 
562*4882a593Smuzhiyun 	/*
563*4882a593Smuzhiyun 	 * let the ISA bus to catch on...
564*4882a593Smuzhiyun 	 */
565*4882a593Smuzhiyun 	udelay(25);
566*4882a593Smuzhiyun }
567*4882a593Smuzhiyun 
568*4882a593Smuzhiyun static const struct file_operations flash_fops =
569*4882a593Smuzhiyun {
570*4882a593Smuzhiyun 	.owner		= THIS_MODULE,
571*4882a593Smuzhiyun 	.llseek		= flash_llseek,
572*4882a593Smuzhiyun 	.read		= flash_read,
573*4882a593Smuzhiyun 	.write		= flash_write,
574*4882a593Smuzhiyun 	.unlocked_ioctl	= flash_ioctl,
575*4882a593Smuzhiyun };
576*4882a593Smuzhiyun 
577*4882a593Smuzhiyun static struct miscdevice flash_miscdev =
578*4882a593Smuzhiyun {
579*4882a593Smuzhiyun 	NWFLASH_MINOR,
580*4882a593Smuzhiyun 	"nwflash",
581*4882a593Smuzhiyun 	&flash_fops
582*4882a593Smuzhiyun };
583*4882a593Smuzhiyun 
nwflash_init(void)584*4882a593Smuzhiyun static int __init nwflash_init(void)
585*4882a593Smuzhiyun {
586*4882a593Smuzhiyun 	int ret = -ENODEV;
587*4882a593Smuzhiyun 
588*4882a593Smuzhiyun 	if (machine_is_netwinder()) {
589*4882a593Smuzhiyun 		int id;
590*4882a593Smuzhiyun 
591*4882a593Smuzhiyun 		FLASH_BASE = ioremap(DC21285_FLASH, KFLASH_SIZE4);
592*4882a593Smuzhiyun 		if (!FLASH_BASE)
593*4882a593Smuzhiyun 			goto out;
594*4882a593Smuzhiyun 
595*4882a593Smuzhiyun 		id = get_flash_id();
596*4882a593Smuzhiyun 		if ((id != KFLASH_ID) && (id != KFLASH_ID4)) {
597*4882a593Smuzhiyun 			ret = -ENXIO;
598*4882a593Smuzhiyun 			iounmap((void *)FLASH_BASE);
599*4882a593Smuzhiyun 			printk("Flash: incorrect ID 0x%04X.\n", id);
600*4882a593Smuzhiyun 			goto out;
601*4882a593Smuzhiyun 		}
602*4882a593Smuzhiyun 
603*4882a593Smuzhiyun 		printk("Flash ROM driver v.%s, flash device ID 0x%04X, size %d Mb.\n",
604*4882a593Smuzhiyun 		       NWFLASH_VERSION, id, gbFlashSize / (1024 * 1024));
605*4882a593Smuzhiyun 
606*4882a593Smuzhiyun 		ret = misc_register(&flash_miscdev);
607*4882a593Smuzhiyun 		if (ret < 0) {
608*4882a593Smuzhiyun 			iounmap((void *)FLASH_BASE);
609*4882a593Smuzhiyun 		}
610*4882a593Smuzhiyun 	}
611*4882a593Smuzhiyun out:
612*4882a593Smuzhiyun 	return ret;
613*4882a593Smuzhiyun }
614*4882a593Smuzhiyun 
nwflash_exit(void)615*4882a593Smuzhiyun static void __exit nwflash_exit(void)
616*4882a593Smuzhiyun {
617*4882a593Smuzhiyun 	misc_deregister(&flash_miscdev);
618*4882a593Smuzhiyun 	iounmap((void *)FLASH_BASE);
619*4882a593Smuzhiyun }
620*4882a593Smuzhiyun 
621*4882a593Smuzhiyun MODULE_LICENSE("GPL");
622*4882a593Smuzhiyun 
623*4882a593Smuzhiyun module_param(flashdebug, bool, 0644);
624*4882a593Smuzhiyun 
625*4882a593Smuzhiyun module_init(nwflash_init);
626*4882a593Smuzhiyun module_exit(nwflash_exit);
627