1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun *
3*4882a593Smuzhiyun * mwavedd.c -- mwave device driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Written By: Mike Sullivan IBM Corporation
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Copyright (C) 1999 IBM Corporation
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify
11*4882a593Smuzhiyun * it under the terms of the GNU General Public License as published by
12*4882a593Smuzhiyun * the Free Software Foundation; either version 2 of the License, or
13*4882a593Smuzhiyun * (at your option) any later version.
14*4882a593Smuzhiyun *
15*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful,
16*4882a593Smuzhiyun * but WITHOUT ANY WARRANTY; without even the implied warranty of
17*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18*4882a593Smuzhiyun * GNU General Public License for more details.
19*4882a593Smuzhiyun *
20*4882a593Smuzhiyun * NO WARRANTY
21*4882a593Smuzhiyun * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
22*4882a593Smuzhiyun * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
23*4882a593Smuzhiyun * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
24*4882a593Smuzhiyun * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
25*4882a593Smuzhiyun * solely responsible for determining the appropriateness of using and
26*4882a593Smuzhiyun * distributing the Program and assumes all risks associated with its
27*4882a593Smuzhiyun * exercise of rights under this Agreement, including but not limited to
28*4882a593Smuzhiyun * the risks and costs of program errors, damage to or loss of data,
29*4882a593Smuzhiyun * programs or equipment, and unavailability or interruption of operations.
30*4882a593Smuzhiyun *
31*4882a593Smuzhiyun * DISCLAIMER OF LIABILITY
32*4882a593Smuzhiyun * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
33*4882a593Smuzhiyun * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
34*4882a593Smuzhiyun * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
35*4882a593Smuzhiyun * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
36*4882a593Smuzhiyun * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
37*4882a593Smuzhiyun * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
38*4882a593Smuzhiyun * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
39*4882a593Smuzhiyun *
40*4882a593Smuzhiyun * You should have received a copy of the GNU General Public License
41*4882a593Smuzhiyun * along with this program; if not, write to the Free Software
42*4882a593Smuzhiyun * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
43*4882a593Smuzhiyun *
44*4882a593Smuzhiyun *
45*4882a593Smuzhiyun * 10/23/2000 - Alpha Release
46*4882a593Smuzhiyun * First release to the public
47*4882a593Smuzhiyun */
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun #include <linux/module.h>
50*4882a593Smuzhiyun #include <linux/kernel.h>
51*4882a593Smuzhiyun #include <linux/fs.h>
52*4882a593Smuzhiyun #include <linux/init.h>
53*4882a593Smuzhiyun #include <linux/major.h>
54*4882a593Smuzhiyun #include <linux/miscdevice.h>
55*4882a593Smuzhiyun #include <linux/device.h>
56*4882a593Smuzhiyun #include <linux/serial.h>
57*4882a593Smuzhiyun #include <linux/sched.h>
58*4882a593Smuzhiyun #include <linux/spinlock.h>
59*4882a593Smuzhiyun #include <linux/mutex.h>
60*4882a593Smuzhiyun #include <linux/delay.h>
61*4882a593Smuzhiyun #include <linux/serial_8250.h>
62*4882a593Smuzhiyun #include <linux/nospec.h>
63*4882a593Smuzhiyun #include "smapi.h"
64*4882a593Smuzhiyun #include "mwavedd.h"
65*4882a593Smuzhiyun #include "3780i.h"
66*4882a593Smuzhiyun #include "tp3780i.h"
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun MODULE_DESCRIPTION("3780i Advanced Communications Processor (Mwave) driver");
69*4882a593Smuzhiyun MODULE_AUTHOR("Mike Sullivan and Paul Schroeder");
70*4882a593Smuzhiyun MODULE_LICENSE("GPL");
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun /*
73*4882a593Smuzhiyun * These parameters support the setting of MWave resources. Note that no
74*4882a593Smuzhiyun * checks are made against other devices (ie. superio) for conflicts.
75*4882a593Smuzhiyun * We'll depend on users using the tpctl utility to do that for now
76*4882a593Smuzhiyun */
77*4882a593Smuzhiyun static DEFINE_MUTEX(mwave_mutex);
78*4882a593Smuzhiyun int mwave_debug = 0;
79*4882a593Smuzhiyun int mwave_3780i_irq = 0;
80*4882a593Smuzhiyun int mwave_3780i_io = 0;
81*4882a593Smuzhiyun int mwave_uart_irq = 0;
82*4882a593Smuzhiyun int mwave_uart_io = 0;
83*4882a593Smuzhiyun module_param(mwave_debug, int, 0);
84*4882a593Smuzhiyun module_param_hw(mwave_3780i_irq, int, irq, 0);
85*4882a593Smuzhiyun module_param_hw(mwave_3780i_io, int, ioport, 0);
86*4882a593Smuzhiyun module_param_hw(mwave_uart_irq, int, irq, 0);
87*4882a593Smuzhiyun module_param_hw(mwave_uart_io, int, ioport, 0);
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun static int mwave_open(struct inode *inode, struct file *file);
90*4882a593Smuzhiyun static int mwave_close(struct inode *inode, struct file *file);
91*4882a593Smuzhiyun static long mwave_ioctl(struct file *filp, unsigned int iocmd,
92*4882a593Smuzhiyun unsigned long ioarg);
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun MWAVE_DEVICE_DATA mwave_s_mdd;
95*4882a593Smuzhiyun
mwave_open(struct inode * inode,struct file * file)96*4882a593Smuzhiyun static int mwave_open(struct inode *inode, struct file *file)
97*4882a593Smuzhiyun {
98*4882a593Smuzhiyun unsigned int retval = 0;
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun PRINTK_3(TRACE_MWAVE,
101*4882a593Smuzhiyun "mwavedd::mwave_open, entry inode %p file %p\n",
102*4882a593Smuzhiyun inode, file);
103*4882a593Smuzhiyun PRINTK_2(TRACE_MWAVE,
104*4882a593Smuzhiyun "mwavedd::mwave_open, exit return retval %x\n", retval);
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun return retval;
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun
mwave_close(struct inode * inode,struct file * file)109*4882a593Smuzhiyun static int mwave_close(struct inode *inode, struct file *file)
110*4882a593Smuzhiyun {
111*4882a593Smuzhiyun unsigned int retval = 0;
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun PRINTK_3(TRACE_MWAVE,
114*4882a593Smuzhiyun "mwavedd::mwave_close, entry inode %p file %p\n",
115*4882a593Smuzhiyun inode, file);
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun PRINTK_2(TRACE_MWAVE, "mwavedd::mwave_close, exit retval %x\n",
118*4882a593Smuzhiyun retval);
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun return retval;
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun
mwave_ioctl(struct file * file,unsigned int iocmd,unsigned long ioarg)123*4882a593Smuzhiyun static long mwave_ioctl(struct file *file, unsigned int iocmd,
124*4882a593Smuzhiyun unsigned long ioarg)
125*4882a593Smuzhiyun {
126*4882a593Smuzhiyun unsigned int retval = 0;
127*4882a593Smuzhiyun pMWAVE_DEVICE_DATA pDrvData = &mwave_s_mdd;
128*4882a593Smuzhiyun void __user *arg = (void __user *)ioarg;
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun PRINTK_4(TRACE_MWAVE,
131*4882a593Smuzhiyun "mwavedd::mwave_ioctl, entry file %p cmd %x arg %x\n",
132*4882a593Smuzhiyun file, iocmd, (int) ioarg);
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun switch (iocmd) {
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun case IOCTL_MW_RESET:
137*4882a593Smuzhiyun PRINTK_1(TRACE_MWAVE,
138*4882a593Smuzhiyun "mwavedd::mwave_ioctl, IOCTL_MW_RESET"
139*4882a593Smuzhiyun " calling tp3780I_ResetDSP\n");
140*4882a593Smuzhiyun mutex_lock(&mwave_mutex);
141*4882a593Smuzhiyun retval = tp3780I_ResetDSP(&pDrvData->rBDData);
142*4882a593Smuzhiyun mutex_unlock(&mwave_mutex);
143*4882a593Smuzhiyun PRINTK_2(TRACE_MWAVE,
144*4882a593Smuzhiyun "mwavedd::mwave_ioctl, IOCTL_MW_RESET"
145*4882a593Smuzhiyun " retval %x from tp3780I_ResetDSP\n",
146*4882a593Smuzhiyun retval);
147*4882a593Smuzhiyun break;
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun case IOCTL_MW_RUN:
150*4882a593Smuzhiyun PRINTK_1(TRACE_MWAVE,
151*4882a593Smuzhiyun "mwavedd::mwave_ioctl, IOCTL_MW_RUN"
152*4882a593Smuzhiyun " calling tp3780I_StartDSP\n");
153*4882a593Smuzhiyun mutex_lock(&mwave_mutex);
154*4882a593Smuzhiyun retval = tp3780I_StartDSP(&pDrvData->rBDData);
155*4882a593Smuzhiyun mutex_unlock(&mwave_mutex);
156*4882a593Smuzhiyun PRINTK_2(TRACE_MWAVE,
157*4882a593Smuzhiyun "mwavedd::mwave_ioctl, IOCTL_MW_RUN"
158*4882a593Smuzhiyun " retval %x from tp3780I_StartDSP\n",
159*4882a593Smuzhiyun retval);
160*4882a593Smuzhiyun break;
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun case IOCTL_MW_DSP_ABILITIES: {
163*4882a593Smuzhiyun MW_ABILITIES rAbilities;
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun PRINTK_1(TRACE_MWAVE,
166*4882a593Smuzhiyun "mwavedd::mwave_ioctl,"
167*4882a593Smuzhiyun " IOCTL_MW_DSP_ABILITIES calling"
168*4882a593Smuzhiyun " tp3780I_QueryAbilities\n");
169*4882a593Smuzhiyun mutex_lock(&mwave_mutex);
170*4882a593Smuzhiyun retval = tp3780I_QueryAbilities(&pDrvData->rBDData,
171*4882a593Smuzhiyun &rAbilities);
172*4882a593Smuzhiyun mutex_unlock(&mwave_mutex);
173*4882a593Smuzhiyun PRINTK_2(TRACE_MWAVE,
174*4882a593Smuzhiyun "mwavedd::mwave_ioctl, IOCTL_MW_DSP_ABILITIES"
175*4882a593Smuzhiyun " retval %x from tp3780I_QueryAbilities\n",
176*4882a593Smuzhiyun retval);
177*4882a593Smuzhiyun if (retval == 0) {
178*4882a593Smuzhiyun if( copy_to_user(arg, &rAbilities,
179*4882a593Smuzhiyun sizeof(MW_ABILITIES)) )
180*4882a593Smuzhiyun return -EFAULT;
181*4882a593Smuzhiyun }
182*4882a593Smuzhiyun PRINTK_2(TRACE_MWAVE,
183*4882a593Smuzhiyun "mwavedd::mwave_ioctl, IOCTL_MW_DSP_ABILITIES"
184*4882a593Smuzhiyun " exit retval %x\n",
185*4882a593Smuzhiyun retval);
186*4882a593Smuzhiyun }
187*4882a593Smuzhiyun break;
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun case IOCTL_MW_READ_DATA:
190*4882a593Smuzhiyun case IOCTL_MW_READCLEAR_DATA: {
191*4882a593Smuzhiyun MW_READWRITE rReadData;
192*4882a593Smuzhiyun unsigned short __user *pusBuffer = NULL;
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun if( copy_from_user(&rReadData, arg,
195*4882a593Smuzhiyun sizeof(MW_READWRITE)) )
196*4882a593Smuzhiyun return -EFAULT;
197*4882a593Smuzhiyun pusBuffer = (unsigned short __user *) (rReadData.pBuf);
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun PRINTK_4(TRACE_MWAVE,
200*4882a593Smuzhiyun "mwavedd::mwave_ioctl IOCTL_MW_READ_DATA,"
201*4882a593Smuzhiyun " size %lx, ioarg %lx pusBuffer %p\n",
202*4882a593Smuzhiyun rReadData.ulDataLength, ioarg, pusBuffer);
203*4882a593Smuzhiyun mutex_lock(&mwave_mutex);
204*4882a593Smuzhiyun retval = tp3780I_ReadWriteDspDStore(&pDrvData->rBDData,
205*4882a593Smuzhiyun iocmd,
206*4882a593Smuzhiyun pusBuffer,
207*4882a593Smuzhiyun rReadData.ulDataLength,
208*4882a593Smuzhiyun rReadData.usDspAddress);
209*4882a593Smuzhiyun mutex_unlock(&mwave_mutex);
210*4882a593Smuzhiyun }
211*4882a593Smuzhiyun break;
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun case IOCTL_MW_READ_INST: {
214*4882a593Smuzhiyun MW_READWRITE rReadData;
215*4882a593Smuzhiyun unsigned short __user *pusBuffer = NULL;
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun if( copy_from_user(&rReadData, arg,
218*4882a593Smuzhiyun sizeof(MW_READWRITE)) )
219*4882a593Smuzhiyun return -EFAULT;
220*4882a593Smuzhiyun pusBuffer = (unsigned short __user *) (rReadData.pBuf);
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun PRINTK_4(TRACE_MWAVE,
223*4882a593Smuzhiyun "mwavedd::mwave_ioctl IOCTL_MW_READ_INST,"
224*4882a593Smuzhiyun " size %lx, ioarg %lx pusBuffer %p\n",
225*4882a593Smuzhiyun rReadData.ulDataLength / 2, ioarg,
226*4882a593Smuzhiyun pusBuffer);
227*4882a593Smuzhiyun mutex_lock(&mwave_mutex);
228*4882a593Smuzhiyun retval = tp3780I_ReadWriteDspDStore(&pDrvData->rBDData,
229*4882a593Smuzhiyun iocmd, pusBuffer,
230*4882a593Smuzhiyun rReadData.ulDataLength / 2,
231*4882a593Smuzhiyun rReadData.usDspAddress);
232*4882a593Smuzhiyun mutex_unlock(&mwave_mutex);
233*4882a593Smuzhiyun }
234*4882a593Smuzhiyun break;
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun case IOCTL_MW_WRITE_DATA: {
237*4882a593Smuzhiyun MW_READWRITE rWriteData;
238*4882a593Smuzhiyun unsigned short __user *pusBuffer = NULL;
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun if( copy_from_user(&rWriteData, arg,
241*4882a593Smuzhiyun sizeof(MW_READWRITE)) )
242*4882a593Smuzhiyun return -EFAULT;
243*4882a593Smuzhiyun pusBuffer = (unsigned short __user *) (rWriteData.pBuf);
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun PRINTK_4(TRACE_MWAVE,
246*4882a593Smuzhiyun "mwavedd::mwave_ioctl IOCTL_MW_WRITE_DATA,"
247*4882a593Smuzhiyun " size %lx, ioarg %lx pusBuffer %p\n",
248*4882a593Smuzhiyun rWriteData.ulDataLength, ioarg,
249*4882a593Smuzhiyun pusBuffer);
250*4882a593Smuzhiyun mutex_lock(&mwave_mutex);
251*4882a593Smuzhiyun retval = tp3780I_ReadWriteDspDStore(&pDrvData->rBDData,
252*4882a593Smuzhiyun iocmd, pusBuffer,
253*4882a593Smuzhiyun rWriteData.ulDataLength,
254*4882a593Smuzhiyun rWriteData.usDspAddress);
255*4882a593Smuzhiyun mutex_unlock(&mwave_mutex);
256*4882a593Smuzhiyun }
257*4882a593Smuzhiyun break;
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun case IOCTL_MW_WRITE_INST: {
260*4882a593Smuzhiyun MW_READWRITE rWriteData;
261*4882a593Smuzhiyun unsigned short __user *pusBuffer = NULL;
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun if( copy_from_user(&rWriteData, arg,
264*4882a593Smuzhiyun sizeof(MW_READWRITE)) )
265*4882a593Smuzhiyun return -EFAULT;
266*4882a593Smuzhiyun pusBuffer = (unsigned short __user *)(rWriteData.pBuf);
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun PRINTK_4(TRACE_MWAVE,
269*4882a593Smuzhiyun "mwavedd::mwave_ioctl IOCTL_MW_WRITE_INST,"
270*4882a593Smuzhiyun " size %lx, ioarg %lx pusBuffer %p\n",
271*4882a593Smuzhiyun rWriteData.ulDataLength, ioarg,
272*4882a593Smuzhiyun pusBuffer);
273*4882a593Smuzhiyun mutex_lock(&mwave_mutex);
274*4882a593Smuzhiyun retval = tp3780I_ReadWriteDspIStore(&pDrvData->rBDData,
275*4882a593Smuzhiyun iocmd, pusBuffer,
276*4882a593Smuzhiyun rWriteData.ulDataLength,
277*4882a593Smuzhiyun rWriteData.usDspAddress);
278*4882a593Smuzhiyun mutex_unlock(&mwave_mutex);
279*4882a593Smuzhiyun }
280*4882a593Smuzhiyun break;
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun case IOCTL_MW_REGISTER_IPC: {
283*4882a593Smuzhiyun unsigned int ipcnum = (unsigned int) ioarg;
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun if (ipcnum >= ARRAY_SIZE(pDrvData->IPCs)) {
286*4882a593Smuzhiyun PRINTK_ERROR(KERN_ERR_MWAVE
287*4882a593Smuzhiyun "mwavedd::mwave_ioctl:"
288*4882a593Smuzhiyun " IOCTL_MW_REGISTER_IPC:"
289*4882a593Smuzhiyun " Error: Invalid ipcnum %x\n",
290*4882a593Smuzhiyun ipcnum);
291*4882a593Smuzhiyun return -EINVAL;
292*4882a593Smuzhiyun }
293*4882a593Smuzhiyun ipcnum = array_index_nospec(ipcnum,
294*4882a593Smuzhiyun ARRAY_SIZE(pDrvData->IPCs));
295*4882a593Smuzhiyun PRINTK_3(TRACE_MWAVE,
296*4882a593Smuzhiyun "mwavedd::mwave_ioctl IOCTL_MW_REGISTER_IPC"
297*4882a593Smuzhiyun " ipcnum %x entry usIntCount %x\n",
298*4882a593Smuzhiyun ipcnum,
299*4882a593Smuzhiyun pDrvData->IPCs[ipcnum].usIntCount);
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun mutex_lock(&mwave_mutex);
302*4882a593Smuzhiyun pDrvData->IPCs[ipcnum].bIsHere = false;
303*4882a593Smuzhiyun pDrvData->IPCs[ipcnum].bIsEnabled = true;
304*4882a593Smuzhiyun mutex_unlock(&mwave_mutex);
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun PRINTK_2(TRACE_MWAVE,
307*4882a593Smuzhiyun "mwavedd::mwave_ioctl IOCTL_MW_REGISTER_IPC"
308*4882a593Smuzhiyun " ipcnum %x exit\n",
309*4882a593Smuzhiyun ipcnum);
310*4882a593Smuzhiyun }
311*4882a593Smuzhiyun break;
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun case IOCTL_MW_GET_IPC: {
314*4882a593Smuzhiyun unsigned int ipcnum = (unsigned int) ioarg;
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun if (ipcnum >= ARRAY_SIZE(pDrvData->IPCs)) {
317*4882a593Smuzhiyun PRINTK_ERROR(KERN_ERR_MWAVE
318*4882a593Smuzhiyun "mwavedd::mwave_ioctl:"
319*4882a593Smuzhiyun " IOCTL_MW_GET_IPC: Error:"
320*4882a593Smuzhiyun " Invalid ipcnum %x\n", ipcnum);
321*4882a593Smuzhiyun return -EINVAL;
322*4882a593Smuzhiyun }
323*4882a593Smuzhiyun ipcnum = array_index_nospec(ipcnum,
324*4882a593Smuzhiyun ARRAY_SIZE(pDrvData->IPCs));
325*4882a593Smuzhiyun PRINTK_3(TRACE_MWAVE,
326*4882a593Smuzhiyun "mwavedd::mwave_ioctl IOCTL_MW_GET_IPC"
327*4882a593Smuzhiyun " ipcnum %x, usIntCount %x\n",
328*4882a593Smuzhiyun ipcnum,
329*4882a593Smuzhiyun pDrvData->IPCs[ipcnum].usIntCount);
330*4882a593Smuzhiyun
331*4882a593Smuzhiyun mutex_lock(&mwave_mutex);
332*4882a593Smuzhiyun if (pDrvData->IPCs[ipcnum].bIsEnabled == true) {
333*4882a593Smuzhiyun DECLARE_WAITQUEUE(wait, current);
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun PRINTK_2(TRACE_MWAVE,
336*4882a593Smuzhiyun "mwavedd::mwave_ioctl, thread for"
337*4882a593Smuzhiyun " ipc %x going to sleep\n",
338*4882a593Smuzhiyun ipcnum);
339*4882a593Smuzhiyun add_wait_queue(&pDrvData->IPCs[ipcnum].ipc_wait_queue, &wait);
340*4882a593Smuzhiyun pDrvData->IPCs[ipcnum].bIsHere = true;
341*4882a593Smuzhiyun set_current_state(TASK_INTERRUPTIBLE);
342*4882a593Smuzhiyun /* check whether an event was signalled by */
343*4882a593Smuzhiyun /* the interrupt handler while we were gone */
344*4882a593Smuzhiyun if (pDrvData->IPCs[ipcnum].usIntCount == 1) { /* first int has occurred (race condition) */
345*4882a593Smuzhiyun pDrvData->IPCs[ipcnum].usIntCount = 2; /* first int has been handled */
346*4882a593Smuzhiyun PRINTK_2(TRACE_MWAVE,
347*4882a593Smuzhiyun "mwavedd::mwave_ioctl"
348*4882a593Smuzhiyun " IOCTL_MW_GET_IPC ipcnum %x"
349*4882a593Smuzhiyun " handling first int\n",
350*4882a593Smuzhiyun ipcnum);
351*4882a593Smuzhiyun } else { /* either 1st int has not yet occurred, or we have already handled the first int */
352*4882a593Smuzhiyun schedule();
353*4882a593Smuzhiyun if (pDrvData->IPCs[ipcnum].usIntCount == 1) {
354*4882a593Smuzhiyun pDrvData->IPCs[ipcnum].usIntCount = 2;
355*4882a593Smuzhiyun }
356*4882a593Smuzhiyun PRINTK_2(TRACE_MWAVE,
357*4882a593Smuzhiyun "mwavedd::mwave_ioctl"
358*4882a593Smuzhiyun " IOCTL_MW_GET_IPC ipcnum %x"
359*4882a593Smuzhiyun " woke up and returning to"
360*4882a593Smuzhiyun " application\n",
361*4882a593Smuzhiyun ipcnum);
362*4882a593Smuzhiyun }
363*4882a593Smuzhiyun pDrvData->IPCs[ipcnum].bIsHere = false;
364*4882a593Smuzhiyun remove_wait_queue(&pDrvData->IPCs[ipcnum].ipc_wait_queue, &wait);
365*4882a593Smuzhiyun set_current_state(TASK_RUNNING);
366*4882a593Smuzhiyun PRINTK_2(TRACE_MWAVE,
367*4882a593Smuzhiyun "mwavedd::mwave_ioctl IOCTL_MW_GET_IPC,"
368*4882a593Smuzhiyun " returning thread for ipc %x"
369*4882a593Smuzhiyun " processing\n",
370*4882a593Smuzhiyun ipcnum);
371*4882a593Smuzhiyun }
372*4882a593Smuzhiyun mutex_unlock(&mwave_mutex);
373*4882a593Smuzhiyun }
374*4882a593Smuzhiyun break;
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun case IOCTL_MW_UNREGISTER_IPC: {
377*4882a593Smuzhiyun unsigned int ipcnum = (unsigned int) ioarg;
378*4882a593Smuzhiyun
379*4882a593Smuzhiyun PRINTK_2(TRACE_MWAVE,
380*4882a593Smuzhiyun "mwavedd::mwave_ioctl IOCTL_MW_UNREGISTER_IPC"
381*4882a593Smuzhiyun " ipcnum %x\n",
382*4882a593Smuzhiyun ipcnum);
383*4882a593Smuzhiyun if (ipcnum >= ARRAY_SIZE(pDrvData->IPCs)) {
384*4882a593Smuzhiyun PRINTK_ERROR(KERN_ERR_MWAVE
385*4882a593Smuzhiyun "mwavedd::mwave_ioctl:"
386*4882a593Smuzhiyun " IOCTL_MW_UNREGISTER_IPC:"
387*4882a593Smuzhiyun " Error: Invalid ipcnum %x\n",
388*4882a593Smuzhiyun ipcnum);
389*4882a593Smuzhiyun return -EINVAL;
390*4882a593Smuzhiyun }
391*4882a593Smuzhiyun ipcnum = array_index_nospec(ipcnum,
392*4882a593Smuzhiyun ARRAY_SIZE(pDrvData->IPCs));
393*4882a593Smuzhiyun mutex_lock(&mwave_mutex);
394*4882a593Smuzhiyun if (pDrvData->IPCs[ipcnum].bIsEnabled == true) {
395*4882a593Smuzhiyun pDrvData->IPCs[ipcnum].bIsEnabled = false;
396*4882a593Smuzhiyun if (pDrvData->IPCs[ipcnum].bIsHere == true) {
397*4882a593Smuzhiyun wake_up_interruptible(&pDrvData->IPCs[ipcnum].ipc_wait_queue);
398*4882a593Smuzhiyun }
399*4882a593Smuzhiyun }
400*4882a593Smuzhiyun mutex_unlock(&mwave_mutex);
401*4882a593Smuzhiyun }
402*4882a593Smuzhiyun break;
403*4882a593Smuzhiyun
404*4882a593Smuzhiyun default:
405*4882a593Smuzhiyun return -ENOTTY;
406*4882a593Smuzhiyun break;
407*4882a593Smuzhiyun } /* switch */
408*4882a593Smuzhiyun
409*4882a593Smuzhiyun PRINTK_2(TRACE_MWAVE, "mwavedd::mwave_ioctl, exit retval %x\n", retval);
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun return retval;
412*4882a593Smuzhiyun }
413*4882a593Smuzhiyun
414*4882a593Smuzhiyun
mwave_read(struct file * file,char __user * buf,size_t count,loff_t * ppos)415*4882a593Smuzhiyun static ssize_t mwave_read(struct file *file, char __user *buf, size_t count,
416*4882a593Smuzhiyun loff_t * ppos)
417*4882a593Smuzhiyun {
418*4882a593Smuzhiyun PRINTK_5(TRACE_MWAVE,
419*4882a593Smuzhiyun "mwavedd::mwave_read entry file %p, buf %p, count %zx ppos %p\n",
420*4882a593Smuzhiyun file, buf, count, ppos);
421*4882a593Smuzhiyun
422*4882a593Smuzhiyun return -EINVAL;
423*4882a593Smuzhiyun }
424*4882a593Smuzhiyun
425*4882a593Smuzhiyun
mwave_write(struct file * file,const char __user * buf,size_t count,loff_t * ppos)426*4882a593Smuzhiyun static ssize_t mwave_write(struct file *file, const char __user *buf,
427*4882a593Smuzhiyun size_t count, loff_t * ppos)
428*4882a593Smuzhiyun {
429*4882a593Smuzhiyun PRINTK_5(TRACE_MWAVE,
430*4882a593Smuzhiyun "mwavedd::mwave_write entry file %p, buf %p,"
431*4882a593Smuzhiyun " count %zx ppos %p\n",
432*4882a593Smuzhiyun file, buf, count, ppos);
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun return -EINVAL;
435*4882a593Smuzhiyun }
436*4882a593Smuzhiyun
437*4882a593Smuzhiyun
register_serial_portandirq(unsigned int port,int irq)438*4882a593Smuzhiyun static int register_serial_portandirq(unsigned int port, int irq)
439*4882a593Smuzhiyun {
440*4882a593Smuzhiyun struct uart_8250_port uart;
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun switch ( port ) {
443*4882a593Smuzhiyun case 0x3f8:
444*4882a593Smuzhiyun case 0x2f8:
445*4882a593Smuzhiyun case 0x3e8:
446*4882a593Smuzhiyun case 0x2e8:
447*4882a593Smuzhiyun /* OK */
448*4882a593Smuzhiyun break;
449*4882a593Smuzhiyun default:
450*4882a593Smuzhiyun PRINTK_ERROR(KERN_ERR_MWAVE
451*4882a593Smuzhiyun "mwavedd::register_serial_portandirq:"
452*4882a593Smuzhiyun " Error: Illegal port %x\n", port );
453*4882a593Smuzhiyun return -1;
454*4882a593Smuzhiyun } /* switch */
455*4882a593Smuzhiyun /* port is okay */
456*4882a593Smuzhiyun
457*4882a593Smuzhiyun switch ( irq ) {
458*4882a593Smuzhiyun case 3:
459*4882a593Smuzhiyun case 4:
460*4882a593Smuzhiyun case 5:
461*4882a593Smuzhiyun case 7:
462*4882a593Smuzhiyun /* OK */
463*4882a593Smuzhiyun break;
464*4882a593Smuzhiyun default:
465*4882a593Smuzhiyun PRINTK_ERROR(KERN_ERR_MWAVE
466*4882a593Smuzhiyun "mwavedd::register_serial_portandirq:"
467*4882a593Smuzhiyun " Error: Illegal irq %x\n", irq );
468*4882a593Smuzhiyun return -1;
469*4882a593Smuzhiyun } /* switch */
470*4882a593Smuzhiyun /* irq is okay */
471*4882a593Smuzhiyun
472*4882a593Smuzhiyun memset(&uart, 0, sizeof(uart));
473*4882a593Smuzhiyun
474*4882a593Smuzhiyun uart.port.uartclk = 1843200;
475*4882a593Smuzhiyun uart.port.iobase = port;
476*4882a593Smuzhiyun uart.port.irq = irq;
477*4882a593Smuzhiyun uart.port.iotype = UPIO_PORT;
478*4882a593Smuzhiyun uart.port.flags = UPF_SHARE_IRQ;
479*4882a593Smuzhiyun return serial8250_register_8250_port(&uart);
480*4882a593Smuzhiyun }
481*4882a593Smuzhiyun
482*4882a593Smuzhiyun
483*4882a593Smuzhiyun static const struct file_operations mwave_fops = {
484*4882a593Smuzhiyun .owner = THIS_MODULE,
485*4882a593Smuzhiyun .read = mwave_read,
486*4882a593Smuzhiyun .write = mwave_write,
487*4882a593Smuzhiyun .unlocked_ioctl = mwave_ioctl,
488*4882a593Smuzhiyun .open = mwave_open,
489*4882a593Smuzhiyun .release = mwave_close,
490*4882a593Smuzhiyun .llseek = default_llseek,
491*4882a593Smuzhiyun };
492*4882a593Smuzhiyun
493*4882a593Smuzhiyun
494*4882a593Smuzhiyun static struct miscdevice mwave_misc_dev = { MWAVE_MINOR, "mwave", &mwave_fops };
495*4882a593Smuzhiyun
496*4882a593Smuzhiyun #if 0 /* totally b0rked */
497*4882a593Smuzhiyun /*
498*4882a593Smuzhiyun * sysfs support <paulsch@us.ibm.com>
499*4882a593Smuzhiyun */
500*4882a593Smuzhiyun
501*4882a593Smuzhiyun struct device mwave_device;
502*4882a593Smuzhiyun
503*4882a593Smuzhiyun /* Prevent code redundancy, create a macro for mwave_show_* functions. */
504*4882a593Smuzhiyun #define mwave_show_function(attr_name, format_string, field) \
505*4882a593Smuzhiyun static ssize_t mwave_show_##attr_name(struct device *dev, struct device_attribute *attr, char *buf) \
506*4882a593Smuzhiyun { \
507*4882a593Smuzhiyun DSP_3780I_CONFIG_SETTINGS *pSettings = \
508*4882a593Smuzhiyun &mwave_s_mdd.rBDData.rDspSettings; \
509*4882a593Smuzhiyun return sprintf(buf, format_string, pSettings->field); \
510*4882a593Smuzhiyun }
511*4882a593Smuzhiyun
512*4882a593Smuzhiyun /* All of our attributes are read attributes. */
513*4882a593Smuzhiyun #define mwave_dev_rd_attr(attr_name, format_string, field) \
514*4882a593Smuzhiyun mwave_show_function(attr_name, format_string, field) \
515*4882a593Smuzhiyun static DEVICE_ATTR(attr_name, S_IRUGO, mwave_show_##attr_name, NULL)
516*4882a593Smuzhiyun
517*4882a593Smuzhiyun mwave_dev_rd_attr (3780i_dma, "%i\n", usDspDma);
518*4882a593Smuzhiyun mwave_dev_rd_attr (3780i_irq, "%i\n", usDspIrq);
519*4882a593Smuzhiyun mwave_dev_rd_attr (3780i_io, "%#.4x\n", usDspBaseIO);
520*4882a593Smuzhiyun mwave_dev_rd_attr (uart_irq, "%i\n", usUartIrq);
521*4882a593Smuzhiyun mwave_dev_rd_attr (uart_io, "%#.4x\n", usUartBaseIO);
522*4882a593Smuzhiyun
523*4882a593Smuzhiyun static struct device_attribute * const mwave_dev_attrs[] = {
524*4882a593Smuzhiyun &dev_attr_3780i_dma,
525*4882a593Smuzhiyun &dev_attr_3780i_irq,
526*4882a593Smuzhiyun &dev_attr_3780i_io,
527*4882a593Smuzhiyun &dev_attr_uart_irq,
528*4882a593Smuzhiyun &dev_attr_uart_io,
529*4882a593Smuzhiyun };
530*4882a593Smuzhiyun #endif
531*4882a593Smuzhiyun
532*4882a593Smuzhiyun /*
533*4882a593Smuzhiyun * mwave_init is called on module load
534*4882a593Smuzhiyun *
535*4882a593Smuzhiyun * mwave_exit is called on module unload
536*4882a593Smuzhiyun * mwave_exit is also used to clean up after an aborted mwave_init
537*4882a593Smuzhiyun */
mwave_exit(void)538*4882a593Smuzhiyun static void mwave_exit(void)
539*4882a593Smuzhiyun {
540*4882a593Smuzhiyun pMWAVE_DEVICE_DATA pDrvData = &mwave_s_mdd;
541*4882a593Smuzhiyun
542*4882a593Smuzhiyun PRINTK_1(TRACE_MWAVE, "mwavedd::mwave_exit entry\n");
543*4882a593Smuzhiyun
544*4882a593Smuzhiyun #if 0
545*4882a593Smuzhiyun for (i = 0; i < pDrvData->nr_registered_attrs; i++)
546*4882a593Smuzhiyun device_remove_file(&mwave_device, mwave_dev_attrs[i]);
547*4882a593Smuzhiyun pDrvData->nr_registered_attrs = 0;
548*4882a593Smuzhiyun
549*4882a593Smuzhiyun if (pDrvData->device_registered) {
550*4882a593Smuzhiyun device_unregister(&mwave_device);
551*4882a593Smuzhiyun pDrvData->device_registered = false;
552*4882a593Smuzhiyun }
553*4882a593Smuzhiyun #endif
554*4882a593Smuzhiyun
555*4882a593Smuzhiyun if ( pDrvData->sLine >= 0 ) {
556*4882a593Smuzhiyun serial8250_unregister_port(pDrvData->sLine);
557*4882a593Smuzhiyun }
558*4882a593Smuzhiyun if (pDrvData->bMwaveDevRegistered) {
559*4882a593Smuzhiyun misc_deregister(&mwave_misc_dev);
560*4882a593Smuzhiyun }
561*4882a593Smuzhiyun if (pDrvData->bDSPEnabled) {
562*4882a593Smuzhiyun tp3780I_DisableDSP(&pDrvData->rBDData);
563*4882a593Smuzhiyun }
564*4882a593Smuzhiyun if (pDrvData->bResourcesClaimed) {
565*4882a593Smuzhiyun tp3780I_ReleaseResources(&pDrvData->rBDData);
566*4882a593Smuzhiyun }
567*4882a593Smuzhiyun if (pDrvData->bBDInitialized) {
568*4882a593Smuzhiyun tp3780I_Cleanup(&pDrvData->rBDData);
569*4882a593Smuzhiyun }
570*4882a593Smuzhiyun
571*4882a593Smuzhiyun PRINTK_1(TRACE_MWAVE, "mwavedd::mwave_exit exit\n");
572*4882a593Smuzhiyun }
573*4882a593Smuzhiyun
574*4882a593Smuzhiyun module_exit(mwave_exit);
575*4882a593Smuzhiyun
mwave_init(void)576*4882a593Smuzhiyun static int __init mwave_init(void)
577*4882a593Smuzhiyun {
578*4882a593Smuzhiyun int i;
579*4882a593Smuzhiyun int retval = 0;
580*4882a593Smuzhiyun pMWAVE_DEVICE_DATA pDrvData = &mwave_s_mdd;
581*4882a593Smuzhiyun
582*4882a593Smuzhiyun PRINTK_1(TRACE_MWAVE, "mwavedd::mwave_init entry\n");
583*4882a593Smuzhiyun
584*4882a593Smuzhiyun memset(&mwave_s_mdd, 0, sizeof(MWAVE_DEVICE_DATA));
585*4882a593Smuzhiyun
586*4882a593Smuzhiyun pDrvData->bBDInitialized = false;
587*4882a593Smuzhiyun pDrvData->bResourcesClaimed = false;
588*4882a593Smuzhiyun pDrvData->bDSPEnabled = false;
589*4882a593Smuzhiyun pDrvData->bDSPReset = false;
590*4882a593Smuzhiyun pDrvData->bMwaveDevRegistered = false;
591*4882a593Smuzhiyun pDrvData->sLine = -1;
592*4882a593Smuzhiyun
593*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(pDrvData->IPCs); i++) {
594*4882a593Smuzhiyun pDrvData->IPCs[i].bIsEnabled = false;
595*4882a593Smuzhiyun pDrvData->IPCs[i].bIsHere = false;
596*4882a593Smuzhiyun pDrvData->IPCs[i].usIntCount = 0; /* no ints received yet */
597*4882a593Smuzhiyun init_waitqueue_head(&pDrvData->IPCs[i].ipc_wait_queue);
598*4882a593Smuzhiyun }
599*4882a593Smuzhiyun
600*4882a593Smuzhiyun retval = tp3780I_InitializeBoardData(&pDrvData->rBDData);
601*4882a593Smuzhiyun PRINTK_2(TRACE_MWAVE,
602*4882a593Smuzhiyun "mwavedd::mwave_init, return from tp3780I_InitializeBoardData"
603*4882a593Smuzhiyun " retval %x\n",
604*4882a593Smuzhiyun retval);
605*4882a593Smuzhiyun if (retval) {
606*4882a593Smuzhiyun PRINTK_ERROR(KERN_ERR_MWAVE
607*4882a593Smuzhiyun "mwavedd::mwave_init: Error:"
608*4882a593Smuzhiyun " Failed to initialize board data\n");
609*4882a593Smuzhiyun goto cleanup_error;
610*4882a593Smuzhiyun }
611*4882a593Smuzhiyun pDrvData->bBDInitialized = true;
612*4882a593Smuzhiyun
613*4882a593Smuzhiyun retval = tp3780I_CalcResources(&pDrvData->rBDData);
614*4882a593Smuzhiyun PRINTK_2(TRACE_MWAVE,
615*4882a593Smuzhiyun "mwavedd::mwave_init, return from tp3780I_CalcResources"
616*4882a593Smuzhiyun " retval %x\n",
617*4882a593Smuzhiyun retval);
618*4882a593Smuzhiyun if (retval) {
619*4882a593Smuzhiyun PRINTK_ERROR(KERN_ERR_MWAVE
620*4882a593Smuzhiyun "mwavedd:mwave_init: Error:"
621*4882a593Smuzhiyun " Failed to calculate resources\n");
622*4882a593Smuzhiyun goto cleanup_error;
623*4882a593Smuzhiyun }
624*4882a593Smuzhiyun
625*4882a593Smuzhiyun retval = tp3780I_ClaimResources(&pDrvData->rBDData);
626*4882a593Smuzhiyun PRINTK_2(TRACE_MWAVE,
627*4882a593Smuzhiyun "mwavedd::mwave_init, return from tp3780I_ClaimResources"
628*4882a593Smuzhiyun " retval %x\n",
629*4882a593Smuzhiyun retval);
630*4882a593Smuzhiyun if (retval) {
631*4882a593Smuzhiyun PRINTK_ERROR(KERN_ERR_MWAVE
632*4882a593Smuzhiyun "mwavedd:mwave_init: Error:"
633*4882a593Smuzhiyun " Failed to claim resources\n");
634*4882a593Smuzhiyun goto cleanup_error;
635*4882a593Smuzhiyun }
636*4882a593Smuzhiyun pDrvData->bResourcesClaimed = true;
637*4882a593Smuzhiyun
638*4882a593Smuzhiyun retval = tp3780I_EnableDSP(&pDrvData->rBDData);
639*4882a593Smuzhiyun PRINTK_2(TRACE_MWAVE,
640*4882a593Smuzhiyun "mwavedd::mwave_init, return from tp3780I_EnableDSP"
641*4882a593Smuzhiyun " retval %x\n",
642*4882a593Smuzhiyun retval);
643*4882a593Smuzhiyun if (retval) {
644*4882a593Smuzhiyun PRINTK_ERROR(KERN_ERR_MWAVE
645*4882a593Smuzhiyun "mwavedd:mwave_init: Error:"
646*4882a593Smuzhiyun " Failed to enable DSP\n");
647*4882a593Smuzhiyun goto cleanup_error;
648*4882a593Smuzhiyun }
649*4882a593Smuzhiyun pDrvData->bDSPEnabled = true;
650*4882a593Smuzhiyun
651*4882a593Smuzhiyun if (misc_register(&mwave_misc_dev) < 0) {
652*4882a593Smuzhiyun PRINTK_ERROR(KERN_ERR_MWAVE
653*4882a593Smuzhiyun "mwavedd:mwave_init: Error:"
654*4882a593Smuzhiyun " Failed to register misc device\n");
655*4882a593Smuzhiyun goto cleanup_error;
656*4882a593Smuzhiyun }
657*4882a593Smuzhiyun pDrvData->bMwaveDevRegistered = true;
658*4882a593Smuzhiyun
659*4882a593Smuzhiyun pDrvData->sLine = register_serial_portandirq(
660*4882a593Smuzhiyun pDrvData->rBDData.rDspSettings.usUartBaseIO,
661*4882a593Smuzhiyun pDrvData->rBDData.rDspSettings.usUartIrq
662*4882a593Smuzhiyun );
663*4882a593Smuzhiyun if (pDrvData->sLine < 0) {
664*4882a593Smuzhiyun PRINTK_ERROR(KERN_ERR_MWAVE
665*4882a593Smuzhiyun "mwavedd:mwave_init: Error:"
666*4882a593Smuzhiyun " Failed to register serial driver\n");
667*4882a593Smuzhiyun goto cleanup_error;
668*4882a593Smuzhiyun }
669*4882a593Smuzhiyun /* uart is registered */
670*4882a593Smuzhiyun
671*4882a593Smuzhiyun #if 0
672*4882a593Smuzhiyun /* sysfs */
673*4882a593Smuzhiyun memset(&mwave_device, 0, sizeof (struct device));
674*4882a593Smuzhiyun dev_set_name(&mwave_device, "mwave");
675*4882a593Smuzhiyun
676*4882a593Smuzhiyun if (device_register(&mwave_device))
677*4882a593Smuzhiyun goto cleanup_error;
678*4882a593Smuzhiyun pDrvData->device_registered = true;
679*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(mwave_dev_attrs); i++) {
680*4882a593Smuzhiyun if(device_create_file(&mwave_device, mwave_dev_attrs[i])) {
681*4882a593Smuzhiyun PRINTK_ERROR(KERN_ERR_MWAVE
682*4882a593Smuzhiyun "mwavedd:mwave_init: Error:"
683*4882a593Smuzhiyun " Failed to create sysfs file %s\n",
684*4882a593Smuzhiyun mwave_dev_attrs[i]->attr.name);
685*4882a593Smuzhiyun goto cleanup_error;
686*4882a593Smuzhiyun }
687*4882a593Smuzhiyun pDrvData->nr_registered_attrs++;
688*4882a593Smuzhiyun }
689*4882a593Smuzhiyun #endif
690*4882a593Smuzhiyun
691*4882a593Smuzhiyun /* SUCCESS! */
692*4882a593Smuzhiyun return 0;
693*4882a593Smuzhiyun
694*4882a593Smuzhiyun cleanup_error:
695*4882a593Smuzhiyun PRINTK_ERROR(KERN_ERR_MWAVE
696*4882a593Smuzhiyun "mwavedd::mwave_init: Error:"
697*4882a593Smuzhiyun " Failed to initialize\n");
698*4882a593Smuzhiyun mwave_exit(); /* clean up */
699*4882a593Smuzhiyun
700*4882a593Smuzhiyun return -EIO;
701*4882a593Smuzhiyun }
702*4882a593Smuzhiyun
703*4882a593Smuzhiyun module_init(mwave_init);
704*4882a593Smuzhiyun
705