1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Hardware Random Number Generator support for Cavium Networks
3*4882a593Smuzhiyun * Octeon processor family.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * This file is subject to the terms and conditions of the GNU General Public
6*4882a593Smuzhiyun * License. See the file "COPYING" in the main directory of this archive
7*4882a593Smuzhiyun * for more details.
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * Copyright (C) 2009 Cavium Networks
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/platform_device.h>
14*4882a593Smuzhiyun #include <linux/device.h>
15*4882a593Smuzhiyun #include <linux/hw_random.h>
16*4882a593Smuzhiyun #include <linux/io.h>
17*4882a593Smuzhiyun #include <linux/gfp.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #include <asm/octeon/octeon.h>
20*4882a593Smuzhiyun #include <asm/octeon/cvmx-rnm-defs.h>
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun struct octeon_rng {
23*4882a593Smuzhiyun struct hwrng ops;
24*4882a593Smuzhiyun void __iomem *control_status;
25*4882a593Smuzhiyun void __iomem *result;
26*4882a593Smuzhiyun };
27*4882a593Smuzhiyun
octeon_rng_init(struct hwrng * rng)28*4882a593Smuzhiyun static int octeon_rng_init(struct hwrng *rng)
29*4882a593Smuzhiyun {
30*4882a593Smuzhiyun union cvmx_rnm_ctl_status ctl;
31*4882a593Smuzhiyun struct octeon_rng *p = container_of(rng, struct octeon_rng, ops);
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun ctl.u64 = 0;
34*4882a593Smuzhiyun ctl.s.ent_en = 1; /* Enable the entropy source. */
35*4882a593Smuzhiyun ctl.s.rng_en = 1; /* Enable the RNG hardware. */
36*4882a593Smuzhiyun cvmx_write_csr((__force u64)p->control_status, ctl.u64);
37*4882a593Smuzhiyun return 0;
38*4882a593Smuzhiyun }
39*4882a593Smuzhiyun
octeon_rng_cleanup(struct hwrng * rng)40*4882a593Smuzhiyun static void octeon_rng_cleanup(struct hwrng *rng)
41*4882a593Smuzhiyun {
42*4882a593Smuzhiyun union cvmx_rnm_ctl_status ctl;
43*4882a593Smuzhiyun struct octeon_rng *p = container_of(rng, struct octeon_rng, ops);
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun ctl.u64 = 0;
46*4882a593Smuzhiyun /* Disable everything. */
47*4882a593Smuzhiyun cvmx_write_csr((__force u64)p->control_status, ctl.u64);
48*4882a593Smuzhiyun }
49*4882a593Smuzhiyun
octeon_rng_data_read(struct hwrng * rng,u32 * data)50*4882a593Smuzhiyun static int octeon_rng_data_read(struct hwrng *rng, u32 *data)
51*4882a593Smuzhiyun {
52*4882a593Smuzhiyun struct octeon_rng *p = container_of(rng, struct octeon_rng, ops);
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun *data = cvmx_read64_uint32((__force u64)p->result);
55*4882a593Smuzhiyun return sizeof(u32);
56*4882a593Smuzhiyun }
57*4882a593Smuzhiyun
octeon_rng_probe(struct platform_device * pdev)58*4882a593Smuzhiyun static int octeon_rng_probe(struct platform_device *pdev)
59*4882a593Smuzhiyun {
60*4882a593Smuzhiyun struct resource *res_ports;
61*4882a593Smuzhiyun struct resource *res_result;
62*4882a593Smuzhiyun struct octeon_rng *rng;
63*4882a593Smuzhiyun int ret;
64*4882a593Smuzhiyun struct hwrng ops = {
65*4882a593Smuzhiyun .name = "octeon",
66*4882a593Smuzhiyun .init = octeon_rng_init,
67*4882a593Smuzhiyun .cleanup = octeon_rng_cleanup,
68*4882a593Smuzhiyun .data_read = octeon_rng_data_read
69*4882a593Smuzhiyun };
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun rng = devm_kzalloc(&pdev->dev, sizeof(*rng), GFP_KERNEL);
72*4882a593Smuzhiyun if (!rng)
73*4882a593Smuzhiyun return -ENOMEM;
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun res_ports = platform_get_resource(pdev, IORESOURCE_MEM, 0);
76*4882a593Smuzhiyun if (!res_ports)
77*4882a593Smuzhiyun return -ENOENT;
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun res_result = platform_get_resource(pdev, IORESOURCE_MEM, 1);
80*4882a593Smuzhiyun if (!res_result)
81*4882a593Smuzhiyun return -ENOENT;
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun rng->control_status = devm_ioremap(&pdev->dev,
85*4882a593Smuzhiyun res_ports->start,
86*4882a593Smuzhiyun sizeof(u64));
87*4882a593Smuzhiyun if (!rng->control_status)
88*4882a593Smuzhiyun return -ENOENT;
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun rng->result = devm_ioremap(&pdev->dev,
91*4882a593Smuzhiyun res_result->start,
92*4882a593Smuzhiyun sizeof(u64));
93*4882a593Smuzhiyun if (!rng->result)
94*4882a593Smuzhiyun return -ENOENT;
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun rng->ops = ops;
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun platform_set_drvdata(pdev, &rng->ops);
99*4882a593Smuzhiyun ret = devm_hwrng_register(&pdev->dev, &rng->ops);
100*4882a593Smuzhiyun if (ret)
101*4882a593Smuzhiyun return -ENOENT;
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun dev_info(&pdev->dev, "Octeon Random Number Generator\n");
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun return 0;
106*4882a593Smuzhiyun }
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun static struct platform_driver octeon_rng_driver = {
109*4882a593Smuzhiyun .driver = {
110*4882a593Smuzhiyun .name = "octeon_rng",
111*4882a593Smuzhiyun },
112*4882a593Smuzhiyun .probe = octeon_rng_probe,
113*4882a593Smuzhiyun };
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun module_platform_driver(octeon_rng_driver);
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun MODULE_AUTHOR("David Daney");
118*4882a593Smuzhiyun MODULE_LICENSE("GPL");
119