xref: /OK3568_Linux_fs/kernel/drivers/char/hw_random/mxc-rnga.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * RNG driver for Freescale RNGA
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
6*4882a593Smuzhiyun  * Author: Alan Carvalho de Assis <acassis@gmail.com>
7*4882a593Smuzhiyun  */
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun /*
10*4882a593Smuzhiyun  *
11*4882a593Smuzhiyun  * This driver is based on other RNG drivers.
12*4882a593Smuzhiyun  */
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #include <linux/clk.h>
15*4882a593Smuzhiyun #include <linux/delay.h>
16*4882a593Smuzhiyun #include <linux/hw_random.h>
17*4882a593Smuzhiyun #include <linux/io.h>
18*4882a593Smuzhiyun #include <linux/module.h>
19*4882a593Smuzhiyun #include <linux/of.h>
20*4882a593Smuzhiyun #include <linux/platform_device.h>
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun /* RNGA Registers */
23*4882a593Smuzhiyun #define RNGA_CONTROL			0x00
24*4882a593Smuzhiyun #define RNGA_STATUS			0x04
25*4882a593Smuzhiyun #define RNGA_ENTROPY			0x08
26*4882a593Smuzhiyun #define RNGA_OUTPUT_FIFO		0x0c
27*4882a593Smuzhiyun #define RNGA_MODE			0x10
28*4882a593Smuzhiyun #define RNGA_VERIFICATION_CONTROL	0x14
29*4882a593Smuzhiyun #define RNGA_OSC_CONTROL_COUNTER	0x18
30*4882a593Smuzhiyun #define RNGA_OSC1_COUNTER		0x1c
31*4882a593Smuzhiyun #define RNGA_OSC2_COUNTER		0x20
32*4882a593Smuzhiyun #define RNGA_OSC_COUNTER_STATUS		0x24
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun /* RNGA Registers Range */
35*4882a593Smuzhiyun #define RNG_ADDR_RANGE			0x28
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun /* RNGA Control Register */
38*4882a593Smuzhiyun #define RNGA_CONTROL_SLEEP		0x00000010
39*4882a593Smuzhiyun #define RNGA_CONTROL_CLEAR_INT		0x00000008
40*4882a593Smuzhiyun #define RNGA_CONTROL_MASK_INTS		0x00000004
41*4882a593Smuzhiyun #define RNGA_CONTROL_HIGH_ASSURANCE	0x00000002
42*4882a593Smuzhiyun #define RNGA_CONTROL_GO			0x00000001
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun #define RNGA_STATUS_LEVEL_MASK		0x0000ff00
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun /* RNGA Status Register */
47*4882a593Smuzhiyun #define RNGA_STATUS_OSC_DEAD		0x80000000
48*4882a593Smuzhiyun #define RNGA_STATUS_SLEEP		0x00000010
49*4882a593Smuzhiyun #define RNGA_STATUS_ERROR_INT		0x00000008
50*4882a593Smuzhiyun #define RNGA_STATUS_FIFO_UNDERFLOW	0x00000004
51*4882a593Smuzhiyun #define RNGA_STATUS_LAST_READ_STATUS	0x00000002
52*4882a593Smuzhiyun #define RNGA_STATUS_SECURITY_VIOLATION	0x00000001
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun struct mxc_rng {
55*4882a593Smuzhiyun 	struct device *dev;
56*4882a593Smuzhiyun 	struct hwrng rng;
57*4882a593Smuzhiyun 	void __iomem *mem;
58*4882a593Smuzhiyun 	struct clk *clk;
59*4882a593Smuzhiyun };
60*4882a593Smuzhiyun 
mxc_rnga_data_present(struct hwrng * rng,int wait)61*4882a593Smuzhiyun static int mxc_rnga_data_present(struct hwrng *rng, int wait)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun 	int i;
64*4882a593Smuzhiyun 	struct mxc_rng *mxc_rng = container_of(rng, struct mxc_rng, rng);
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun 	for (i = 0; i < 20; i++) {
67*4882a593Smuzhiyun 		/* how many random numbers are in FIFO? [0-16] */
68*4882a593Smuzhiyun 		int level = (__raw_readl(mxc_rng->mem + RNGA_STATUS) &
69*4882a593Smuzhiyun 				RNGA_STATUS_LEVEL_MASK) >> 8;
70*4882a593Smuzhiyun 		if (level || !wait)
71*4882a593Smuzhiyun 			return !!level;
72*4882a593Smuzhiyun 		udelay(10);
73*4882a593Smuzhiyun 	}
74*4882a593Smuzhiyun 	return 0;
75*4882a593Smuzhiyun }
76*4882a593Smuzhiyun 
mxc_rnga_data_read(struct hwrng * rng,u32 * data)77*4882a593Smuzhiyun static int mxc_rnga_data_read(struct hwrng *rng, u32 * data)
78*4882a593Smuzhiyun {
79*4882a593Smuzhiyun 	int err;
80*4882a593Smuzhiyun 	u32 ctrl;
81*4882a593Smuzhiyun 	struct mxc_rng *mxc_rng = container_of(rng, struct mxc_rng, rng);
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun 	/* retrieve a random number from FIFO */
84*4882a593Smuzhiyun 	*data = __raw_readl(mxc_rng->mem + RNGA_OUTPUT_FIFO);
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun 	/* some error while reading this random number? */
87*4882a593Smuzhiyun 	err = __raw_readl(mxc_rng->mem + RNGA_STATUS) & RNGA_STATUS_ERROR_INT;
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun 	/* if error: clear error interrupt, but doesn't return random number */
90*4882a593Smuzhiyun 	if (err) {
91*4882a593Smuzhiyun 		dev_dbg(mxc_rng->dev, "Error while reading random number!\n");
92*4882a593Smuzhiyun 		ctrl = __raw_readl(mxc_rng->mem + RNGA_CONTROL);
93*4882a593Smuzhiyun 		__raw_writel(ctrl | RNGA_CONTROL_CLEAR_INT,
94*4882a593Smuzhiyun 					mxc_rng->mem + RNGA_CONTROL);
95*4882a593Smuzhiyun 		return 0;
96*4882a593Smuzhiyun 	} else
97*4882a593Smuzhiyun 		return 4;
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun 
mxc_rnga_init(struct hwrng * rng)100*4882a593Smuzhiyun static int mxc_rnga_init(struct hwrng *rng)
101*4882a593Smuzhiyun {
102*4882a593Smuzhiyun 	u32 ctrl, osc;
103*4882a593Smuzhiyun 	struct mxc_rng *mxc_rng = container_of(rng, struct mxc_rng, rng);
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun 	/* wake up */
106*4882a593Smuzhiyun 	ctrl = __raw_readl(mxc_rng->mem + RNGA_CONTROL);
107*4882a593Smuzhiyun 	__raw_writel(ctrl & ~RNGA_CONTROL_SLEEP, mxc_rng->mem + RNGA_CONTROL);
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun 	/* verify if oscillator is working */
110*4882a593Smuzhiyun 	osc = __raw_readl(mxc_rng->mem + RNGA_STATUS);
111*4882a593Smuzhiyun 	if (osc & RNGA_STATUS_OSC_DEAD) {
112*4882a593Smuzhiyun 		dev_err(mxc_rng->dev, "RNGA Oscillator is dead!\n");
113*4882a593Smuzhiyun 		return -ENODEV;
114*4882a593Smuzhiyun 	}
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun 	/* go running */
117*4882a593Smuzhiyun 	ctrl = __raw_readl(mxc_rng->mem + RNGA_CONTROL);
118*4882a593Smuzhiyun 	__raw_writel(ctrl | RNGA_CONTROL_GO, mxc_rng->mem + RNGA_CONTROL);
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun 	return 0;
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun 
mxc_rnga_cleanup(struct hwrng * rng)123*4882a593Smuzhiyun static void mxc_rnga_cleanup(struct hwrng *rng)
124*4882a593Smuzhiyun {
125*4882a593Smuzhiyun 	u32 ctrl;
126*4882a593Smuzhiyun 	struct mxc_rng *mxc_rng = container_of(rng, struct mxc_rng, rng);
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 	ctrl = __raw_readl(mxc_rng->mem + RNGA_CONTROL);
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun 	/* stop rnga */
131*4882a593Smuzhiyun 	__raw_writel(ctrl & ~RNGA_CONTROL_GO, mxc_rng->mem + RNGA_CONTROL);
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun 
mxc_rnga_probe(struct platform_device * pdev)134*4882a593Smuzhiyun static int __init mxc_rnga_probe(struct platform_device *pdev)
135*4882a593Smuzhiyun {
136*4882a593Smuzhiyun 	int err;
137*4882a593Smuzhiyun 	struct mxc_rng *mxc_rng;
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun 	mxc_rng = devm_kzalloc(&pdev->dev, sizeof(*mxc_rng), GFP_KERNEL);
140*4882a593Smuzhiyun 	if (!mxc_rng)
141*4882a593Smuzhiyun 		return -ENOMEM;
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun 	mxc_rng->dev = &pdev->dev;
144*4882a593Smuzhiyun 	mxc_rng->rng.name = "mxc-rnga";
145*4882a593Smuzhiyun 	mxc_rng->rng.init = mxc_rnga_init;
146*4882a593Smuzhiyun 	mxc_rng->rng.cleanup = mxc_rnga_cleanup;
147*4882a593Smuzhiyun 	mxc_rng->rng.data_present = mxc_rnga_data_present;
148*4882a593Smuzhiyun 	mxc_rng->rng.data_read = mxc_rnga_data_read;
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun 	mxc_rng->clk = devm_clk_get(&pdev->dev, NULL);
151*4882a593Smuzhiyun 	if (IS_ERR(mxc_rng->clk)) {
152*4882a593Smuzhiyun 		dev_err(&pdev->dev, "Could not get rng_clk!\n");
153*4882a593Smuzhiyun 		return PTR_ERR(mxc_rng->clk);
154*4882a593Smuzhiyun 	}
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun 	err = clk_prepare_enable(mxc_rng->clk);
157*4882a593Smuzhiyun 	if (err)
158*4882a593Smuzhiyun 		return err;
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun 	mxc_rng->mem = devm_platform_ioremap_resource(pdev, 0);
161*4882a593Smuzhiyun 	if (IS_ERR(mxc_rng->mem)) {
162*4882a593Smuzhiyun 		err = PTR_ERR(mxc_rng->mem);
163*4882a593Smuzhiyun 		goto err_ioremap;
164*4882a593Smuzhiyun 	}
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun 	err = hwrng_register(&mxc_rng->rng);
167*4882a593Smuzhiyun 	if (err) {
168*4882a593Smuzhiyun 		dev_err(&pdev->dev, "MXC RNGA registering failed (%d)\n", err);
169*4882a593Smuzhiyun 		goto err_ioremap;
170*4882a593Smuzhiyun 	}
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun 	return 0;
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun err_ioremap:
175*4882a593Smuzhiyun 	clk_disable_unprepare(mxc_rng->clk);
176*4882a593Smuzhiyun 	return err;
177*4882a593Smuzhiyun }
178*4882a593Smuzhiyun 
mxc_rnga_remove(struct platform_device * pdev)179*4882a593Smuzhiyun static int __exit mxc_rnga_remove(struct platform_device *pdev)
180*4882a593Smuzhiyun {
181*4882a593Smuzhiyun 	struct mxc_rng *mxc_rng = platform_get_drvdata(pdev);
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun 	hwrng_unregister(&mxc_rng->rng);
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun 	clk_disable_unprepare(mxc_rng->clk);
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun 	return 0;
188*4882a593Smuzhiyun }
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun static const struct of_device_id mxc_rnga_of_match[] = {
191*4882a593Smuzhiyun 	{ .compatible = "fsl,imx21-rnga", },
192*4882a593Smuzhiyun 	{ .compatible = "fsl,imx31-rnga", },
193*4882a593Smuzhiyun 	{ /* sentinel */ },
194*4882a593Smuzhiyun };
195*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, mxc_rnga_of_match);
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun static struct platform_driver mxc_rnga_driver = {
198*4882a593Smuzhiyun 	.driver = {
199*4882a593Smuzhiyun 		.name = "mxc_rnga",
200*4882a593Smuzhiyun 		.of_match_table = mxc_rnga_of_match,
201*4882a593Smuzhiyun 	},
202*4882a593Smuzhiyun 	.remove = __exit_p(mxc_rnga_remove),
203*4882a593Smuzhiyun };
204*4882a593Smuzhiyun 
205*4882a593Smuzhiyun module_platform_driver_probe(mxc_rnga_driver, mxc_rnga_probe);
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun MODULE_AUTHOR("Freescale Semiconductor, Inc.");
208*4882a593Smuzhiyun MODULE_DESCRIPTION("H/W RNGA driver for i.MX");
209*4882a593Smuzhiyun MODULE_LICENSE("GPL");
210