xref: /OK3568_Linux_fs/kernel/drivers/char/hw_random/mtk-rng.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Driver for Mediatek Hardware Random Number Generator
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2017 Sean Wang <sean.wang@mediatek.com>
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun #define MTK_RNG_DEV KBUILD_MODNAME
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #include <linux/clk.h>
10*4882a593Smuzhiyun #include <linux/delay.h>
11*4882a593Smuzhiyun #include <linux/err.h>
12*4882a593Smuzhiyun #include <linux/hw_random.h>
13*4882a593Smuzhiyun #include <linux/io.h>
14*4882a593Smuzhiyun #include <linux/iopoll.h>
15*4882a593Smuzhiyun #include <linux/kernel.h>
16*4882a593Smuzhiyun #include <linux/module.h>
17*4882a593Smuzhiyun #include <linux/of.h>
18*4882a593Smuzhiyun #include <linux/platform_device.h>
19*4882a593Smuzhiyun #include <linux/pm_runtime.h>
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun /* Runtime PM autosuspend timeout: */
22*4882a593Smuzhiyun #define RNG_AUTOSUSPEND_TIMEOUT		100
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun #define USEC_POLL			2
25*4882a593Smuzhiyun #define TIMEOUT_POLL			20
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun #define RNG_CTRL			0x00
28*4882a593Smuzhiyun #define RNG_EN				BIT(0)
29*4882a593Smuzhiyun #define RNG_READY			BIT(31)
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun #define RNG_DATA			0x08
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun #define to_mtk_rng(p)	container_of(p, struct mtk_rng, rng)
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun struct mtk_rng {
36*4882a593Smuzhiyun 	void __iomem *base;
37*4882a593Smuzhiyun 	struct clk *clk;
38*4882a593Smuzhiyun 	struct hwrng rng;
39*4882a593Smuzhiyun };
40*4882a593Smuzhiyun 
mtk_rng_init(struct hwrng * rng)41*4882a593Smuzhiyun static int mtk_rng_init(struct hwrng *rng)
42*4882a593Smuzhiyun {
43*4882a593Smuzhiyun 	struct mtk_rng *priv = to_mtk_rng(rng);
44*4882a593Smuzhiyun 	u32 val;
45*4882a593Smuzhiyun 	int err;
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun 	err = clk_prepare_enable(priv->clk);
48*4882a593Smuzhiyun 	if (err)
49*4882a593Smuzhiyun 		return err;
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun 	val = readl(priv->base + RNG_CTRL);
52*4882a593Smuzhiyun 	val |= RNG_EN;
53*4882a593Smuzhiyun 	writel(val, priv->base + RNG_CTRL);
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun 	return 0;
56*4882a593Smuzhiyun }
57*4882a593Smuzhiyun 
mtk_rng_cleanup(struct hwrng * rng)58*4882a593Smuzhiyun static void mtk_rng_cleanup(struct hwrng *rng)
59*4882a593Smuzhiyun {
60*4882a593Smuzhiyun 	struct mtk_rng *priv = to_mtk_rng(rng);
61*4882a593Smuzhiyun 	u32 val;
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun 	val = readl(priv->base + RNG_CTRL);
64*4882a593Smuzhiyun 	val &= ~RNG_EN;
65*4882a593Smuzhiyun 	writel(val, priv->base + RNG_CTRL);
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun 	clk_disable_unprepare(priv->clk);
68*4882a593Smuzhiyun }
69*4882a593Smuzhiyun 
mtk_rng_wait_ready(struct hwrng * rng,bool wait)70*4882a593Smuzhiyun static bool mtk_rng_wait_ready(struct hwrng *rng, bool wait)
71*4882a593Smuzhiyun {
72*4882a593Smuzhiyun 	struct mtk_rng *priv = to_mtk_rng(rng);
73*4882a593Smuzhiyun 	int ready;
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun 	ready = readl(priv->base + RNG_CTRL) & RNG_READY;
76*4882a593Smuzhiyun 	if (!ready && wait)
77*4882a593Smuzhiyun 		readl_poll_timeout_atomic(priv->base + RNG_CTRL, ready,
78*4882a593Smuzhiyun 					  ready & RNG_READY, USEC_POLL,
79*4882a593Smuzhiyun 					  TIMEOUT_POLL);
80*4882a593Smuzhiyun 	return !!ready;
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun 
mtk_rng_read(struct hwrng * rng,void * buf,size_t max,bool wait)83*4882a593Smuzhiyun static int mtk_rng_read(struct hwrng *rng, void *buf, size_t max, bool wait)
84*4882a593Smuzhiyun {
85*4882a593Smuzhiyun 	struct mtk_rng *priv = to_mtk_rng(rng);
86*4882a593Smuzhiyun 	int retval = 0;
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun 	pm_runtime_get_sync((struct device *)priv->rng.priv);
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun 	while (max >= sizeof(u32)) {
91*4882a593Smuzhiyun 		if (!mtk_rng_wait_ready(rng, wait))
92*4882a593Smuzhiyun 			break;
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun 		*(u32 *)buf = readl(priv->base + RNG_DATA);
95*4882a593Smuzhiyun 		retval += sizeof(u32);
96*4882a593Smuzhiyun 		buf += sizeof(u32);
97*4882a593Smuzhiyun 		max -= sizeof(u32);
98*4882a593Smuzhiyun 	}
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun 	pm_runtime_mark_last_busy((struct device *)priv->rng.priv);
101*4882a593Smuzhiyun 	pm_runtime_put_sync_autosuspend((struct device *)priv->rng.priv);
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun 	return retval || !wait ? retval : -EIO;
104*4882a593Smuzhiyun }
105*4882a593Smuzhiyun 
mtk_rng_probe(struct platform_device * pdev)106*4882a593Smuzhiyun static int mtk_rng_probe(struct platform_device *pdev)
107*4882a593Smuzhiyun {
108*4882a593Smuzhiyun 	int ret;
109*4882a593Smuzhiyun 	struct mtk_rng *priv;
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun 	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
112*4882a593Smuzhiyun 	if (!priv)
113*4882a593Smuzhiyun 		return -ENOMEM;
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun 	priv->rng.name = pdev->name;
116*4882a593Smuzhiyun #ifndef CONFIG_PM
117*4882a593Smuzhiyun 	priv->rng.init = mtk_rng_init;
118*4882a593Smuzhiyun 	priv->rng.cleanup = mtk_rng_cleanup;
119*4882a593Smuzhiyun #endif
120*4882a593Smuzhiyun 	priv->rng.read = mtk_rng_read;
121*4882a593Smuzhiyun 	priv->rng.priv = (unsigned long)&pdev->dev;
122*4882a593Smuzhiyun 	priv->rng.quality = 900;
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun 	priv->clk = devm_clk_get(&pdev->dev, "rng");
125*4882a593Smuzhiyun 	if (IS_ERR(priv->clk)) {
126*4882a593Smuzhiyun 		ret = PTR_ERR(priv->clk);
127*4882a593Smuzhiyun 		dev_err(&pdev->dev, "no clock for device: %d\n", ret);
128*4882a593Smuzhiyun 		return ret;
129*4882a593Smuzhiyun 	}
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun 	priv->base = devm_platform_ioremap_resource(pdev, 0);
132*4882a593Smuzhiyun 	if (IS_ERR(priv->base))
133*4882a593Smuzhiyun 		return PTR_ERR(priv->base);
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun 	ret = devm_hwrng_register(&pdev->dev, &priv->rng);
136*4882a593Smuzhiyun 	if (ret) {
137*4882a593Smuzhiyun 		dev_err(&pdev->dev, "failed to register rng device: %d\n",
138*4882a593Smuzhiyun 			ret);
139*4882a593Smuzhiyun 		return ret;
140*4882a593Smuzhiyun 	}
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun 	dev_set_drvdata(&pdev->dev, priv);
143*4882a593Smuzhiyun 	pm_runtime_set_autosuspend_delay(&pdev->dev, RNG_AUTOSUSPEND_TIMEOUT);
144*4882a593Smuzhiyun 	pm_runtime_use_autosuspend(&pdev->dev);
145*4882a593Smuzhiyun 	pm_runtime_enable(&pdev->dev);
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun 	dev_info(&pdev->dev, "registered RNG driver\n");
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun 	return 0;
150*4882a593Smuzhiyun }
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun #ifdef CONFIG_PM
mtk_rng_runtime_suspend(struct device * dev)153*4882a593Smuzhiyun static int mtk_rng_runtime_suspend(struct device *dev)
154*4882a593Smuzhiyun {
155*4882a593Smuzhiyun 	struct mtk_rng *priv = dev_get_drvdata(dev);
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun 	mtk_rng_cleanup(&priv->rng);
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun 	return 0;
160*4882a593Smuzhiyun }
161*4882a593Smuzhiyun 
mtk_rng_runtime_resume(struct device * dev)162*4882a593Smuzhiyun static int mtk_rng_runtime_resume(struct device *dev)
163*4882a593Smuzhiyun {
164*4882a593Smuzhiyun 	struct mtk_rng *priv = dev_get_drvdata(dev);
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun 	return mtk_rng_init(&priv->rng);
167*4882a593Smuzhiyun }
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun static const struct dev_pm_ops mtk_rng_pm_ops = {
170*4882a593Smuzhiyun 	SET_RUNTIME_PM_OPS(mtk_rng_runtime_suspend,
171*4882a593Smuzhiyun 			   mtk_rng_runtime_resume, NULL)
172*4882a593Smuzhiyun 	SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
173*4882a593Smuzhiyun 				pm_runtime_force_resume)
174*4882a593Smuzhiyun };
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun #define MTK_RNG_PM_OPS (&mtk_rng_pm_ops)
177*4882a593Smuzhiyun #else	/* CONFIG_PM */
178*4882a593Smuzhiyun #define MTK_RNG_PM_OPS NULL
179*4882a593Smuzhiyun #endif	/* CONFIG_PM */
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun static const struct of_device_id mtk_rng_match[] = {
182*4882a593Smuzhiyun 	{ .compatible = "mediatek,mt7623-rng" },
183*4882a593Smuzhiyun 	{},
184*4882a593Smuzhiyun };
185*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, mtk_rng_match);
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun static struct platform_driver mtk_rng_driver = {
188*4882a593Smuzhiyun 	.probe          = mtk_rng_probe,
189*4882a593Smuzhiyun 	.driver = {
190*4882a593Smuzhiyun 		.name = MTK_RNG_DEV,
191*4882a593Smuzhiyun 		.pm = MTK_RNG_PM_OPS,
192*4882a593Smuzhiyun 		.of_match_table = mtk_rng_match,
193*4882a593Smuzhiyun 	},
194*4882a593Smuzhiyun };
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun module_platform_driver(mtk_rng_driver);
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun MODULE_DESCRIPTION("Mediatek Random Number Generator Driver");
199*4882a593Smuzhiyun MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>");
200*4882a593Smuzhiyun MODULE_LICENSE("GPL");
201