xref: /OK3568_Linux_fs/kernel/drivers/char/hw_random/ks-sa-rng.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Random Number Generator driver for the Keystone SOC
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Authors:	Sandeep Nair
8*4882a593Smuzhiyun  *		Vitaly Andrianov
9*4882a593Smuzhiyun  */
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #include <linux/hw_random.h>
12*4882a593Smuzhiyun #include <linux/kernel.h>
13*4882a593Smuzhiyun #include <linux/module.h>
14*4882a593Smuzhiyun #include <linux/io.h>
15*4882a593Smuzhiyun #include <linux/platform_device.h>
16*4882a593Smuzhiyun #include <linux/clk.h>
17*4882a593Smuzhiyun #include <linux/pm_runtime.h>
18*4882a593Smuzhiyun #include <linux/err.h>
19*4882a593Smuzhiyun #include <linux/regmap.h>
20*4882a593Smuzhiyun #include <linux/mfd/syscon.h>
21*4882a593Smuzhiyun #include <linux/of.h>
22*4882a593Smuzhiyun #include <linux/of_address.h>
23*4882a593Smuzhiyun #include <linux/delay.h>
24*4882a593Smuzhiyun #include <linux/timekeeping.h>
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #define SA_CMD_STATUS_OFS			0x8
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun /* TRNG enable control in SA System module*/
29*4882a593Smuzhiyun #define SA_CMD_STATUS_REG_TRNG_ENABLE		BIT(3)
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun /* TRNG start control in TRNG module */
32*4882a593Smuzhiyun #define TRNG_CNTL_REG_TRNG_ENABLE		BIT(10)
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun /* Data ready indicator in STATUS register */
35*4882a593Smuzhiyun #define TRNG_STATUS_REG_READY			BIT(0)
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun /* Data ready clear control in INTACK register */
38*4882a593Smuzhiyun #define TRNG_INTACK_REG_READY			BIT(0)
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun /*
41*4882a593Smuzhiyun  * Number of samples taken to gather entropy during startup.
42*4882a593Smuzhiyun  * If value is 0, the number of samples is 2^24 else
43*4882a593Smuzhiyun  * equals value times 2^8.
44*4882a593Smuzhiyun  */
45*4882a593Smuzhiyun #define TRNG_DEF_STARTUP_CYCLES			0
46*4882a593Smuzhiyun #define TRNG_CNTL_REG_STARTUP_CYCLES_SHIFT	16
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun /*
49*4882a593Smuzhiyun  * Minimum number of samples taken to regenerate entropy
50*4882a593Smuzhiyun  * If value is 0, the number of samples is 2^24 else
51*4882a593Smuzhiyun  * equals value times 2^6.
52*4882a593Smuzhiyun  */
53*4882a593Smuzhiyun #define TRNG_DEF_MIN_REFILL_CYCLES		1
54*4882a593Smuzhiyun #define TRNG_CFG_REG_MIN_REFILL_CYCLES_SHIFT	0
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun /*
57*4882a593Smuzhiyun  * Maximum number of samples taken to regenerate entropy
58*4882a593Smuzhiyun  * If value is 0, the number of samples is 2^24 else
59*4882a593Smuzhiyun  * equals value times 2^8.
60*4882a593Smuzhiyun  */
61*4882a593Smuzhiyun #define TRNG_DEF_MAX_REFILL_CYCLES		0
62*4882a593Smuzhiyun #define TRNG_CFG_REG_MAX_REFILL_CYCLES_SHIFT	16
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun /* Number of CLK input cycles between samples */
65*4882a593Smuzhiyun #define TRNG_DEF_CLK_DIV_CYCLES			0
66*4882a593Smuzhiyun #define TRNG_CFG_REG_SAMPLE_DIV_SHIFT		8
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun /* Maximum retries to get rng data */
69*4882a593Smuzhiyun #define SA_MAX_RNG_DATA_RETRIES			5
70*4882a593Smuzhiyun /* Delay between retries (in usecs) */
71*4882a593Smuzhiyun #define SA_RNG_DATA_RETRY_DELAY			5
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun struct trng_regs {
74*4882a593Smuzhiyun 	u32	output_l;
75*4882a593Smuzhiyun 	u32	output_h;
76*4882a593Smuzhiyun 	u32	status;
77*4882a593Smuzhiyun 	u32	intmask;
78*4882a593Smuzhiyun 	u32	intack;
79*4882a593Smuzhiyun 	u32	control;
80*4882a593Smuzhiyun 	u32	config;
81*4882a593Smuzhiyun };
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun struct ks_sa_rng {
84*4882a593Smuzhiyun 	struct device	*dev;
85*4882a593Smuzhiyun 	struct hwrng	rng;
86*4882a593Smuzhiyun 	struct clk	*clk;
87*4882a593Smuzhiyun 	struct regmap	*regmap_cfg;
88*4882a593Smuzhiyun 	struct trng_regs __iomem *reg_rng;
89*4882a593Smuzhiyun 	u64 ready_ts;
90*4882a593Smuzhiyun 	unsigned int refill_delay_ns;
91*4882a593Smuzhiyun };
92*4882a593Smuzhiyun 
cycles_to_ns(unsigned long clk_rate,unsigned int cycles)93*4882a593Smuzhiyun static unsigned int cycles_to_ns(unsigned long clk_rate, unsigned int cycles)
94*4882a593Smuzhiyun {
95*4882a593Smuzhiyun 	return DIV_ROUND_UP_ULL((TRNG_DEF_CLK_DIV_CYCLES + 1) * 1000000000ull *
96*4882a593Smuzhiyun 				cycles, clk_rate);
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun 
startup_delay_ns(unsigned long clk_rate)99*4882a593Smuzhiyun static unsigned int startup_delay_ns(unsigned long clk_rate)
100*4882a593Smuzhiyun {
101*4882a593Smuzhiyun 	if (!TRNG_DEF_STARTUP_CYCLES)
102*4882a593Smuzhiyun 		return cycles_to_ns(clk_rate, BIT(24));
103*4882a593Smuzhiyun 	return cycles_to_ns(clk_rate, 256 * TRNG_DEF_STARTUP_CYCLES);
104*4882a593Smuzhiyun }
105*4882a593Smuzhiyun 
refill_delay_ns(unsigned long clk_rate)106*4882a593Smuzhiyun static unsigned int refill_delay_ns(unsigned long clk_rate)
107*4882a593Smuzhiyun {
108*4882a593Smuzhiyun 	if (!TRNG_DEF_MAX_REFILL_CYCLES)
109*4882a593Smuzhiyun 		return cycles_to_ns(clk_rate, BIT(24));
110*4882a593Smuzhiyun 	return cycles_to_ns(clk_rate, 256 * TRNG_DEF_MAX_REFILL_CYCLES);
111*4882a593Smuzhiyun }
112*4882a593Smuzhiyun 
ks_sa_rng_init(struct hwrng * rng)113*4882a593Smuzhiyun static int ks_sa_rng_init(struct hwrng *rng)
114*4882a593Smuzhiyun {
115*4882a593Smuzhiyun 	u32 value;
116*4882a593Smuzhiyun 	struct device *dev = (struct device *)rng->priv;
117*4882a593Smuzhiyun 	struct ks_sa_rng *ks_sa_rng = dev_get_drvdata(dev);
118*4882a593Smuzhiyun 	unsigned long clk_rate = clk_get_rate(ks_sa_rng->clk);
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun 	/* Enable RNG module */
121*4882a593Smuzhiyun 	regmap_write_bits(ks_sa_rng->regmap_cfg, SA_CMD_STATUS_OFS,
122*4882a593Smuzhiyun 			  SA_CMD_STATUS_REG_TRNG_ENABLE,
123*4882a593Smuzhiyun 			  SA_CMD_STATUS_REG_TRNG_ENABLE);
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun 	/* Configure RNG module */
126*4882a593Smuzhiyun 	writel(0, &ks_sa_rng->reg_rng->control);
127*4882a593Smuzhiyun 	value = TRNG_DEF_STARTUP_CYCLES << TRNG_CNTL_REG_STARTUP_CYCLES_SHIFT;
128*4882a593Smuzhiyun 	writel(value, &ks_sa_rng->reg_rng->control);
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun 	value =	(TRNG_DEF_MIN_REFILL_CYCLES <<
131*4882a593Smuzhiyun 		 TRNG_CFG_REG_MIN_REFILL_CYCLES_SHIFT) |
132*4882a593Smuzhiyun 		(TRNG_DEF_MAX_REFILL_CYCLES <<
133*4882a593Smuzhiyun 		 TRNG_CFG_REG_MAX_REFILL_CYCLES_SHIFT) |
134*4882a593Smuzhiyun 		(TRNG_DEF_CLK_DIV_CYCLES <<
135*4882a593Smuzhiyun 		 TRNG_CFG_REG_SAMPLE_DIV_SHIFT);
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun 	writel(value, &ks_sa_rng->reg_rng->config);
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun 	/* Disable all interrupts from TRNG */
140*4882a593Smuzhiyun 	writel(0, &ks_sa_rng->reg_rng->intmask);
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun 	/* Enable RNG */
143*4882a593Smuzhiyun 	value = readl(&ks_sa_rng->reg_rng->control);
144*4882a593Smuzhiyun 	value |= TRNG_CNTL_REG_TRNG_ENABLE;
145*4882a593Smuzhiyun 	writel(value, &ks_sa_rng->reg_rng->control);
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun 	ks_sa_rng->refill_delay_ns = refill_delay_ns(clk_rate);
148*4882a593Smuzhiyun 	ks_sa_rng->ready_ts = ktime_get_ns() +
149*4882a593Smuzhiyun 			      startup_delay_ns(clk_rate);
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun 	return 0;
152*4882a593Smuzhiyun }
153*4882a593Smuzhiyun 
ks_sa_rng_cleanup(struct hwrng * rng)154*4882a593Smuzhiyun static void ks_sa_rng_cleanup(struct hwrng *rng)
155*4882a593Smuzhiyun {
156*4882a593Smuzhiyun 	struct device *dev = (struct device *)rng->priv;
157*4882a593Smuzhiyun 	struct ks_sa_rng *ks_sa_rng = dev_get_drvdata(dev);
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun 	/* Disable RNG */
160*4882a593Smuzhiyun 	writel(0, &ks_sa_rng->reg_rng->control);
161*4882a593Smuzhiyun 	regmap_write_bits(ks_sa_rng->regmap_cfg, SA_CMD_STATUS_OFS,
162*4882a593Smuzhiyun 			  SA_CMD_STATUS_REG_TRNG_ENABLE, 0);
163*4882a593Smuzhiyun }
164*4882a593Smuzhiyun 
ks_sa_rng_data_read(struct hwrng * rng,u32 * data)165*4882a593Smuzhiyun static int ks_sa_rng_data_read(struct hwrng *rng, u32 *data)
166*4882a593Smuzhiyun {
167*4882a593Smuzhiyun 	struct device *dev = (struct device *)rng->priv;
168*4882a593Smuzhiyun 	struct ks_sa_rng *ks_sa_rng = dev_get_drvdata(dev);
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun 	/* Read random data */
171*4882a593Smuzhiyun 	data[0] = readl(&ks_sa_rng->reg_rng->output_l);
172*4882a593Smuzhiyun 	data[1] = readl(&ks_sa_rng->reg_rng->output_h);
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun 	writel(TRNG_INTACK_REG_READY, &ks_sa_rng->reg_rng->intack);
175*4882a593Smuzhiyun 	ks_sa_rng->ready_ts = ktime_get_ns() + ks_sa_rng->refill_delay_ns;
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun 	return sizeof(u32) * 2;
178*4882a593Smuzhiyun }
179*4882a593Smuzhiyun 
ks_sa_rng_data_present(struct hwrng * rng,int wait)180*4882a593Smuzhiyun static int ks_sa_rng_data_present(struct hwrng *rng, int wait)
181*4882a593Smuzhiyun {
182*4882a593Smuzhiyun 	struct device *dev = (struct device *)rng->priv;
183*4882a593Smuzhiyun 	struct ks_sa_rng *ks_sa_rng = dev_get_drvdata(dev);
184*4882a593Smuzhiyun 	u64 now = ktime_get_ns();
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun 	u32	ready;
187*4882a593Smuzhiyun 	int	j;
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun 	if (wait && now < ks_sa_rng->ready_ts) {
190*4882a593Smuzhiyun 		/* Max delay expected here is 81920000 ns */
191*4882a593Smuzhiyun 		unsigned long min_delay =
192*4882a593Smuzhiyun 			DIV_ROUND_UP((u32)(ks_sa_rng->ready_ts - now), 1000);
193*4882a593Smuzhiyun 
194*4882a593Smuzhiyun 		usleep_range(min_delay, min_delay + SA_RNG_DATA_RETRY_DELAY);
195*4882a593Smuzhiyun 	}
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun 	for (j = 0; j < SA_MAX_RNG_DATA_RETRIES; j++) {
198*4882a593Smuzhiyun 		ready = readl(&ks_sa_rng->reg_rng->status);
199*4882a593Smuzhiyun 		ready &= TRNG_STATUS_REG_READY;
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun 		if (ready || !wait)
202*4882a593Smuzhiyun 			break;
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun 		udelay(SA_RNG_DATA_RETRY_DELAY);
205*4882a593Smuzhiyun 	}
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun 	return ready;
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun 
ks_sa_rng_probe(struct platform_device * pdev)210*4882a593Smuzhiyun static int ks_sa_rng_probe(struct platform_device *pdev)
211*4882a593Smuzhiyun {
212*4882a593Smuzhiyun 	struct ks_sa_rng	*ks_sa_rng;
213*4882a593Smuzhiyun 	struct device		*dev = &pdev->dev;
214*4882a593Smuzhiyun 	int			ret;
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun 	ks_sa_rng = devm_kzalloc(dev, sizeof(*ks_sa_rng), GFP_KERNEL);
217*4882a593Smuzhiyun 	if (!ks_sa_rng)
218*4882a593Smuzhiyun 		return -ENOMEM;
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun 	ks_sa_rng->dev = dev;
221*4882a593Smuzhiyun 	ks_sa_rng->rng = (struct hwrng) {
222*4882a593Smuzhiyun 		.name = "ks_sa_hwrng",
223*4882a593Smuzhiyun 		.init = ks_sa_rng_init,
224*4882a593Smuzhiyun 		.data_read = ks_sa_rng_data_read,
225*4882a593Smuzhiyun 		.data_present = ks_sa_rng_data_present,
226*4882a593Smuzhiyun 		.cleanup = ks_sa_rng_cleanup,
227*4882a593Smuzhiyun 	};
228*4882a593Smuzhiyun 	ks_sa_rng->rng.priv = (unsigned long)dev;
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun 	ks_sa_rng->reg_rng = devm_platform_ioremap_resource(pdev, 0);
231*4882a593Smuzhiyun 	if (IS_ERR(ks_sa_rng->reg_rng))
232*4882a593Smuzhiyun 		return PTR_ERR(ks_sa_rng->reg_rng);
233*4882a593Smuzhiyun 
234*4882a593Smuzhiyun 	ks_sa_rng->regmap_cfg =
235*4882a593Smuzhiyun 		syscon_regmap_lookup_by_phandle(dev->of_node,
236*4882a593Smuzhiyun 						"ti,syscon-sa-cfg");
237*4882a593Smuzhiyun 
238*4882a593Smuzhiyun 	if (IS_ERR(ks_sa_rng->regmap_cfg)) {
239*4882a593Smuzhiyun 		dev_err(dev, "syscon_node_to_regmap failed\n");
240*4882a593Smuzhiyun 		return -EINVAL;
241*4882a593Smuzhiyun 	}
242*4882a593Smuzhiyun 
243*4882a593Smuzhiyun 	pm_runtime_enable(dev);
244*4882a593Smuzhiyun 	ret = pm_runtime_get_sync(dev);
245*4882a593Smuzhiyun 	if (ret < 0) {
246*4882a593Smuzhiyun 		dev_err(dev, "Failed to enable SA power-domain\n");
247*4882a593Smuzhiyun 		pm_runtime_put_noidle(dev);
248*4882a593Smuzhiyun 		pm_runtime_disable(dev);
249*4882a593Smuzhiyun 		return ret;
250*4882a593Smuzhiyun 	}
251*4882a593Smuzhiyun 
252*4882a593Smuzhiyun 	platform_set_drvdata(pdev, ks_sa_rng);
253*4882a593Smuzhiyun 
254*4882a593Smuzhiyun 	return devm_hwrng_register(&pdev->dev, &ks_sa_rng->rng);
255*4882a593Smuzhiyun }
256*4882a593Smuzhiyun 
ks_sa_rng_remove(struct platform_device * pdev)257*4882a593Smuzhiyun static int ks_sa_rng_remove(struct platform_device *pdev)
258*4882a593Smuzhiyun {
259*4882a593Smuzhiyun 	pm_runtime_put_sync(&pdev->dev);
260*4882a593Smuzhiyun 	pm_runtime_disable(&pdev->dev);
261*4882a593Smuzhiyun 
262*4882a593Smuzhiyun 	return 0;
263*4882a593Smuzhiyun }
264*4882a593Smuzhiyun 
265*4882a593Smuzhiyun static const struct of_device_id ks_sa_rng_dt_match[] = {
266*4882a593Smuzhiyun 	{
267*4882a593Smuzhiyun 		.compatible = "ti,keystone-rng",
268*4882a593Smuzhiyun 	},
269*4882a593Smuzhiyun 	{ },
270*4882a593Smuzhiyun };
271*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, ks_sa_rng_dt_match);
272*4882a593Smuzhiyun 
273*4882a593Smuzhiyun static struct platform_driver ks_sa_rng_driver = {
274*4882a593Smuzhiyun 	.driver		= {
275*4882a593Smuzhiyun 		.name	= "ks-sa-rng",
276*4882a593Smuzhiyun 		.of_match_table = ks_sa_rng_dt_match,
277*4882a593Smuzhiyun 	},
278*4882a593Smuzhiyun 	.probe		= ks_sa_rng_probe,
279*4882a593Smuzhiyun 	.remove		= ks_sa_rng_remove,
280*4882a593Smuzhiyun };
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun module_platform_driver(ks_sa_rng_driver);
283*4882a593Smuzhiyun 
284*4882a593Smuzhiyun MODULE_DESCRIPTION("Keystone NETCP SA H/W Random Number Generator driver");
285*4882a593Smuzhiyun MODULE_AUTHOR("Vitaly Andrianov <vitalya@ti.com>");
286*4882a593Smuzhiyun MODULE_LICENSE("GPL");
287