xref: /OK3568_Linux_fs/kernel/drivers/char/hw_random/bcm2835-rng.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (c) 2010-2012 Broadcom. All rights reserved.
4*4882a593Smuzhiyun  * Copyright (c) 2013 Lubomir Rintel
5*4882a593Smuzhiyun  */
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun #include <linux/hw_random.h>
8*4882a593Smuzhiyun #include <linux/io.h>
9*4882a593Smuzhiyun #include <linux/kernel.h>
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/of_address.h>
12*4882a593Smuzhiyun #include <linux/of_platform.h>
13*4882a593Smuzhiyun #include <linux/platform_device.h>
14*4882a593Smuzhiyun #include <linux/printk.h>
15*4882a593Smuzhiyun #include <linux/clk.h>
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun #define RNG_CTRL	0x0
18*4882a593Smuzhiyun #define RNG_STATUS	0x4
19*4882a593Smuzhiyun #define RNG_DATA	0x8
20*4882a593Smuzhiyun #define RNG_INT_MASK	0x10
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun /* enable rng */
23*4882a593Smuzhiyun #define RNG_RBGEN	0x1
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun /* the initial numbers generated are "less random" so will be discarded */
26*4882a593Smuzhiyun #define RNG_WARMUP_COUNT 0x40000
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun #define RNG_INT_OFF	0x1
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun struct bcm2835_rng_priv {
31*4882a593Smuzhiyun 	struct hwrng rng;
32*4882a593Smuzhiyun 	void __iomem *base;
33*4882a593Smuzhiyun 	bool mask_interrupts;
34*4882a593Smuzhiyun 	struct clk *clk;
35*4882a593Smuzhiyun };
36*4882a593Smuzhiyun 
to_rng_priv(struct hwrng * rng)37*4882a593Smuzhiyun static inline struct bcm2835_rng_priv *to_rng_priv(struct hwrng *rng)
38*4882a593Smuzhiyun {
39*4882a593Smuzhiyun 	return container_of(rng, struct bcm2835_rng_priv, rng);
40*4882a593Smuzhiyun }
41*4882a593Smuzhiyun 
rng_readl(struct bcm2835_rng_priv * priv,u32 offset)42*4882a593Smuzhiyun static inline u32 rng_readl(struct bcm2835_rng_priv *priv, u32 offset)
43*4882a593Smuzhiyun {
44*4882a593Smuzhiyun 	/* MIPS chips strapped for BE will automagically configure the
45*4882a593Smuzhiyun 	 * peripheral registers for CPU-native byte order.
46*4882a593Smuzhiyun 	 */
47*4882a593Smuzhiyun 	if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
48*4882a593Smuzhiyun 		return __raw_readl(priv->base + offset);
49*4882a593Smuzhiyun 	else
50*4882a593Smuzhiyun 		return readl(priv->base + offset);
51*4882a593Smuzhiyun }
52*4882a593Smuzhiyun 
rng_writel(struct bcm2835_rng_priv * priv,u32 val,u32 offset)53*4882a593Smuzhiyun static inline void rng_writel(struct bcm2835_rng_priv *priv, u32 val,
54*4882a593Smuzhiyun 			      u32 offset)
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun 	if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
57*4882a593Smuzhiyun 		__raw_writel(val, priv->base + offset);
58*4882a593Smuzhiyun 	else
59*4882a593Smuzhiyun 		writel(val, priv->base + offset);
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun 
bcm2835_rng_read(struct hwrng * rng,void * buf,size_t max,bool wait)62*4882a593Smuzhiyun static int bcm2835_rng_read(struct hwrng *rng, void *buf, size_t max,
63*4882a593Smuzhiyun 			       bool wait)
64*4882a593Smuzhiyun {
65*4882a593Smuzhiyun 	struct bcm2835_rng_priv *priv = to_rng_priv(rng);
66*4882a593Smuzhiyun 	u32 max_words = max / sizeof(u32);
67*4882a593Smuzhiyun 	u32 num_words, count;
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun 	while ((rng_readl(priv, RNG_STATUS) >> 24) == 0) {
70*4882a593Smuzhiyun 		if (!wait)
71*4882a593Smuzhiyun 			return 0;
72*4882a593Smuzhiyun 		cpu_relax();
73*4882a593Smuzhiyun 	}
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun 	num_words = rng_readl(priv, RNG_STATUS) >> 24;
76*4882a593Smuzhiyun 	if (num_words > max_words)
77*4882a593Smuzhiyun 		num_words = max_words;
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun 	for (count = 0; count < num_words; count++)
80*4882a593Smuzhiyun 		((u32 *)buf)[count] = rng_readl(priv, RNG_DATA);
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun 	return num_words * sizeof(u32);
83*4882a593Smuzhiyun }
84*4882a593Smuzhiyun 
bcm2835_rng_init(struct hwrng * rng)85*4882a593Smuzhiyun static int bcm2835_rng_init(struct hwrng *rng)
86*4882a593Smuzhiyun {
87*4882a593Smuzhiyun 	struct bcm2835_rng_priv *priv = to_rng_priv(rng);
88*4882a593Smuzhiyun 	int ret = 0;
89*4882a593Smuzhiyun 	u32 val;
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun 	if (!IS_ERR(priv->clk)) {
92*4882a593Smuzhiyun 		ret = clk_prepare_enable(priv->clk);
93*4882a593Smuzhiyun 		if (ret)
94*4882a593Smuzhiyun 			return ret;
95*4882a593Smuzhiyun 	}
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun 	if (priv->mask_interrupts) {
98*4882a593Smuzhiyun 		/* mask the interrupt */
99*4882a593Smuzhiyun 		val = rng_readl(priv, RNG_INT_MASK);
100*4882a593Smuzhiyun 		val |= RNG_INT_OFF;
101*4882a593Smuzhiyun 		rng_writel(priv, val, RNG_INT_MASK);
102*4882a593Smuzhiyun 	}
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun 	/* set warm-up count & enable */
105*4882a593Smuzhiyun 	rng_writel(priv, RNG_WARMUP_COUNT, RNG_STATUS);
106*4882a593Smuzhiyun 	rng_writel(priv, RNG_RBGEN, RNG_CTRL);
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun 	return ret;
109*4882a593Smuzhiyun }
110*4882a593Smuzhiyun 
bcm2835_rng_cleanup(struct hwrng * rng)111*4882a593Smuzhiyun static void bcm2835_rng_cleanup(struct hwrng *rng)
112*4882a593Smuzhiyun {
113*4882a593Smuzhiyun 	struct bcm2835_rng_priv *priv = to_rng_priv(rng);
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun 	/* disable rng hardware */
116*4882a593Smuzhiyun 	rng_writel(priv, 0, RNG_CTRL);
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun 	if (!IS_ERR(priv->clk))
119*4882a593Smuzhiyun 		clk_disable_unprepare(priv->clk);
120*4882a593Smuzhiyun }
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun struct bcm2835_rng_of_data {
123*4882a593Smuzhiyun 	bool mask_interrupts;
124*4882a593Smuzhiyun };
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun static const struct bcm2835_rng_of_data nsp_rng_of_data = {
127*4882a593Smuzhiyun 	.mask_interrupts = true,
128*4882a593Smuzhiyun };
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun static const struct of_device_id bcm2835_rng_of_match[] = {
131*4882a593Smuzhiyun 	{ .compatible = "brcm,bcm2835-rng"},
132*4882a593Smuzhiyun 	{ .compatible = "brcm,bcm-nsp-rng", .data = &nsp_rng_of_data },
133*4882a593Smuzhiyun 	{ .compatible = "brcm,bcm5301x-rng", .data = &nsp_rng_of_data },
134*4882a593Smuzhiyun 	{ .compatible = "brcm,bcm6368-rng"},
135*4882a593Smuzhiyun 	{},
136*4882a593Smuzhiyun };
137*4882a593Smuzhiyun 
bcm2835_rng_probe(struct platform_device * pdev)138*4882a593Smuzhiyun static int bcm2835_rng_probe(struct platform_device *pdev)
139*4882a593Smuzhiyun {
140*4882a593Smuzhiyun 	const struct bcm2835_rng_of_data *of_data;
141*4882a593Smuzhiyun 	struct device *dev = &pdev->dev;
142*4882a593Smuzhiyun 	const struct of_device_id *rng_id;
143*4882a593Smuzhiyun 	struct bcm2835_rng_priv *priv;
144*4882a593Smuzhiyun 	int err;
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun 	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
147*4882a593Smuzhiyun 	if (!priv)
148*4882a593Smuzhiyun 		return -ENOMEM;
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun 	platform_set_drvdata(pdev, priv);
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun 	/* map peripheral */
153*4882a593Smuzhiyun 	priv->base = devm_platform_ioremap_resource(pdev, 0);
154*4882a593Smuzhiyun 	if (IS_ERR(priv->base))
155*4882a593Smuzhiyun 		return PTR_ERR(priv->base);
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun 	/* Clock is optional on most platforms */
158*4882a593Smuzhiyun 	priv->clk = devm_clk_get(dev, NULL);
159*4882a593Smuzhiyun 	if (PTR_ERR(priv->clk) == -EPROBE_DEFER)
160*4882a593Smuzhiyun 		return -EPROBE_DEFER;
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun 	priv->rng.name = pdev->name;
163*4882a593Smuzhiyun 	priv->rng.init = bcm2835_rng_init;
164*4882a593Smuzhiyun 	priv->rng.read = bcm2835_rng_read;
165*4882a593Smuzhiyun 	priv->rng.cleanup = bcm2835_rng_cleanup;
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun 	if (dev_of_node(dev)) {
168*4882a593Smuzhiyun 		rng_id = of_match_node(bcm2835_rng_of_match, dev->of_node);
169*4882a593Smuzhiyun 		if (!rng_id)
170*4882a593Smuzhiyun 			return -EINVAL;
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun 		/* Check for rng init function, execute it */
173*4882a593Smuzhiyun 		of_data = rng_id->data;
174*4882a593Smuzhiyun 		if (of_data)
175*4882a593Smuzhiyun 			priv->mask_interrupts = of_data->mask_interrupts;
176*4882a593Smuzhiyun 	}
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun 	/* register driver */
179*4882a593Smuzhiyun 	err = devm_hwrng_register(dev, &priv->rng);
180*4882a593Smuzhiyun 	if (err)
181*4882a593Smuzhiyun 		dev_err(dev, "hwrng registration failed\n");
182*4882a593Smuzhiyun 	else
183*4882a593Smuzhiyun 		dev_info(dev, "hwrng registered\n");
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun 	return err;
186*4882a593Smuzhiyun }
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, bcm2835_rng_of_match);
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun static const struct platform_device_id bcm2835_rng_devtype[] = {
191*4882a593Smuzhiyun 	{ .name = "bcm2835-rng" },
192*4882a593Smuzhiyun 	{ .name = "bcm63xx-rng" },
193*4882a593Smuzhiyun 	{ /* sentinel */ }
194*4882a593Smuzhiyun };
195*4882a593Smuzhiyun MODULE_DEVICE_TABLE(platform, bcm2835_rng_devtype);
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun static struct platform_driver bcm2835_rng_driver = {
198*4882a593Smuzhiyun 	.driver = {
199*4882a593Smuzhiyun 		.name = "bcm2835-rng",
200*4882a593Smuzhiyun 		.of_match_table = bcm2835_rng_of_match,
201*4882a593Smuzhiyun 	},
202*4882a593Smuzhiyun 	.probe		= bcm2835_rng_probe,
203*4882a593Smuzhiyun 	.id_table	= bcm2835_rng_devtype,
204*4882a593Smuzhiyun };
205*4882a593Smuzhiyun module_platform_driver(bcm2835_rng_driver);
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun MODULE_AUTHOR("Lubomir Rintel <lkundrak@v3.sk>");
208*4882a593Smuzhiyun MODULE_DESCRIPTION("BCM2835 Random Number Generator (RNG) driver");
209*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
210