1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * AGPGART driver.
3*4882a593Smuzhiyun * Copyright (C) 2004 Silicon Graphics, Inc.
4*4882a593Smuzhiyun * Copyright (C) 2002-2005 Dave Jones.
5*4882a593Smuzhiyun * Copyright (C) 1999 Jeff Hartmann.
6*4882a593Smuzhiyun * Copyright (C) 1999 Precision Insight, Inc.
7*4882a593Smuzhiyun * Copyright (C) 1999 Xi Graphics, Inc.
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * Permission is hereby granted, free of charge, to any person obtaining a
10*4882a593Smuzhiyun * copy of this software and associated documentation files (the "Software"),
11*4882a593Smuzhiyun * to deal in the Software without restriction, including without limitation
12*4882a593Smuzhiyun * the rights to use, copy, modify, merge, publish, distribute, sublicense,
13*4882a593Smuzhiyun * and/or sell copies of the Software, and to permit persons to whom the
14*4882a593Smuzhiyun * Software is furnished to do so, subject to the following conditions:
15*4882a593Smuzhiyun *
16*4882a593Smuzhiyun * The above copyright notice and this permission notice shall be included
17*4882a593Smuzhiyun * in all copies or substantial portions of the Software.
18*4882a593Smuzhiyun *
19*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20*4882a593Smuzhiyun * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22*4882a593Smuzhiyun * JEFF HARTMANN, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM,
23*4882a593Smuzhiyun * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
24*4882a593Smuzhiyun * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
25*4882a593Smuzhiyun * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26*4882a593Smuzhiyun *
27*4882a593Smuzhiyun * TODO:
28*4882a593Smuzhiyun * - Allocate more than order 0 pages to avoid too much linear map splitting.
29*4882a593Smuzhiyun */
30*4882a593Smuzhiyun #include <linux/module.h>
31*4882a593Smuzhiyun #include <linux/pci.h>
32*4882a593Smuzhiyun #include <linux/pagemap.h>
33*4882a593Smuzhiyun #include <linux/miscdevice.h>
34*4882a593Smuzhiyun #include <linux/pm.h>
35*4882a593Smuzhiyun #include <linux/agp_backend.h>
36*4882a593Smuzhiyun #include <linux/vmalloc.h>
37*4882a593Smuzhiyun #include <linux/dma-mapping.h>
38*4882a593Smuzhiyun #include <linux/mm.h>
39*4882a593Smuzhiyun #include <linux/sched.h>
40*4882a593Smuzhiyun #include <linux/slab.h>
41*4882a593Smuzhiyun #include <asm/io.h>
42*4882a593Smuzhiyun #ifdef CONFIG_X86
43*4882a593Smuzhiyun #include <asm/set_memory.h>
44*4882a593Smuzhiyun #endif
45*4882a593Smuzhiyun #include "agp.h"
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun __u32 *agp_gatt_table;
48*4882a593Smuzhiyun int agp_memory_reserved;
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun /*
51*4882a593Smuzhiyun * Needed by the Nforce GART driver for the time being. Would be
52*4882a593Smuzhiyun * nice to do this some other way instead of needing this export.
53*4882a593Smuzhiyun */
54*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(agp_memory_reserved);
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun /*
57*4882a593Smuzhiyun * Generic routines for handling agp_memory structures -
58*4882a593Smuzhiyun * They use the basic page allocation routines to do the brunt of the work.
59*4882a593Smuzhiyun */
60*4882a593Smuzhiyun
agp_free_key(int key)61*4882a593Smuzhiyun void agp_free_key(int key)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun if (key < 0)
64*4882a593Smuzhiyun return;
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun if (key < MAXKEY)
67*4882a593Smuzhiyun clear_bit(key, agp_bridge->key_list);
68*4882a593Smuzhiyun }
69*4882a593Smuzhiyun EXPORT_SYMBOL(agp_free_key);
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun
agp_get_key(void)72*4882a593Smuzhiyun static int agp_get_key(void)
73*4882a593Smuzhiyun {
74*4882a593Smuzhiyun int bit;
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun bit = find_first_zero_bit(agp_bridge->key_list, MAXKEY);
77*4882a593Smuzhiyun if (bit < MAXKEY) {
78*4882a593Smuzhiyun set_bit(bit, agp_bridge->key_list);
79*4882a593Smuzhiyun return bit;
80*4882a593Smuzhiyun }
81*4882a593Smuzhiyun return -1;
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun /*
85*4882a593Smuzhiyun * Use kmalloc if possible for the page list. Otherwise fall back to
86*4882a593Smuzhiyun * vmalloc. This speeds things up and also saves memory for small AGP
87*4882a593Smuzhiyun * regions.
88*4882a593Smuzhiyun */
89*4882a593Smuzhiyun
agp_alloc_page_array(size_t size,struct agp_memory * mem)90*4882a593Smuzhiyun void agp_alloc_page_array(size_t size, struct agp_memory *mem)
91*4882a593Smuzhiyun {
92*4882a593Smuzhiyun mem->pages = kvmalloc(size, GFP_KERNEL);
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun EXPORT_SYMBOL(agp_alloc_page_array);
95*4882a593Smuzhiyun
agp_create_user_memory(unsigned long num_agp_pages)96*4882a593Smuzhiyun static struct agp_memory *agp_create_user_memory(unsigned long num_agp_pages)
97*4882a593Smuzhiyun {
98*4882a593Smuzhiyun struct agp_memory *new;
99*4882a593Smuzhiyun unsigned long alloc_size = num_agp_pages*sizeof(struct page *);
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun if (INT_MAX/sizeof(struct page *) < num_agp_pages)
102*4882a593Smuzhiyun return NULL;
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun new = kzalloc(sizeof(struct agp_memory), GFP_KERNEL);
105*4882a593Smuzhiyun if (new == NULL)
106*4882a593Smuzhiyun return NULL;
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun new->key = agp_get_key();
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun if (new->key < 0) {
111*4882a593Smuzhiyun kfree(new);
112*4882a593Smuzhiyun return NULL;
113*4882a593Smuzhiyun }
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun agp_alloc_page_array(alloc_size, new);
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun if (new->pages == NULL) {
118*4882a593Smuzhiyun agp_free_key(new->key);
119*4882a593Smuzhiyun kfree(new);
120*4882a593Smuzhiyun return NULL;
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun new->num_scratch_pages = 0;
123*4882a593Smuzhiyun return new;
124*4882a593Smuzhiyun }
125*4882a593Smuzhiyun
agp_create_memory(int scratch_pages)126*4882a593Smuzhiyun struct agp_memory *agp_create_memory(int scratch_pages)
127*4882a593Smuzhiyun {
128*4882a593Smuzhiyun struct agp_memory *new;
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun new = kzalloc(sizeof(struct agp_memory), GFP_KERNEL);
131*4882a593Smuzhiyun if (new == NULL)
132*4882a593Smuzhiyun return NULL;
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun new->key = agp_get_key();
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun if (new->key < 0) {
137*4882a593Smuzhiyun kfree(new);
138*4882a593Smuzhiyun return NULL;
139*4882a593Smuzhiyun }
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun agp_alloc_page_array(PAGE_SIZE * scratch_pages, new);
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun if (new->pages == NULL) {
144*4882a593Smuzhiyun agp_free_key(new->key);
145*4882a593Smuzhiyun kfree(new);
146*4882a593Smuzhiyun return NULL;
147*4882a593Smuzhiyun }
148*4882a593Smuzhiyun new->num_scratch_pages = scratch_pages;
149*4882a593Smuzhiyun new->type = AGP_NORMAL_MEMORY;
150*4882a593Smuzhiyun return new;
151*4882a593Smuzhiyun }
152*4882a593Smuzhiyun EXPORT_SYMBOL(agp_create_memory);
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun /**
155*4882a593Smuzhiyun * agp_free_memory - free memory associated with an agp_memory pointer.
156*4882a593Smuzhiyun *
157*4882a593Smuzhiyun * @curr: agp_memory pointer to be freed.
158*4882a593Smuzhiyun *
159*4882a593Smuzhiyun * It is the only function that can be called when the backend is not owned
160*4882a593Smuzhiyun * by the caller. (So it can free memory on client death.)
161*4882a593Smuzhiyun */
agp_free_memory(struct agp_memory * curr)162*4882a593Smuzhiyun void agp_free_memory(struct agp_memory *curr)
163*4882a593Smuzhiyun {
164*4882a593Smuzhiyun size_t i;
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun if (curr == NULL)
167*4882a593Smuzhiyun return;
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun if (curr->is_bound)
170*4882a593Smuzhiyun agp_unbind_memory(curr);
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun if (curr->type >= AGP_USER_TYPES) {
173*4882a593Smuzhiyun agp_generic_free_by_type(curr);
174*4882a593Smuzhiyun return;
175*4882a593Smuzhiyun }
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun if (curr->type != 0) {
178*4882a593Smuzhiyun curr->bridge->driver->free_by_type(curr);
179*4882a593Smuzhiyun return;
180*4882a593Smuzhiyun }
181*4882a593Smuzhiyun if (curr->page_count != 0) {
182*4882a593Smuzhiyun if (curr->bridge->driver->agp_destroy_pages) {
183*4882a593Smuzhiyun curr->bridge->driver->agp_destroy_pages(curr);
184*4882a593Smuzhiyun } else {
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun for (i = 0; i < curr->page_count; i++) {
187*4882a593Smuzhiyun curr->bridge->driver->agp_destroy_page(
188*4882a593Smuzhiyun curr->pages[i],
189*4882a593Smuzhiyun AGP_PAGE_DESTROY_UNMAP);
190*4882a593Smuzhiyun }
191*4882a593Smuzhiyun for (i = 0; i < curr->page_count; i++) {
192*4882a593Smuzhiyun curr->bridge->driver->agp_destroy_page(
193*4882a593Smuzhiyun curr->pages[i],
194*4882a593Smuzhiyun AGP_PAGE_DESTROY_FREE);
195*4882a593Smuzhiyun }
196*4882a593Smuzhiyun }
197*4882a593Smuzhiyun }
198*4882a593Smuzhiyun agp_free_key(curr->key);
199*4882a593Smuzhiyun agp_free_page_array(curr);
200*4882a593Smuzhiyun kfree(curr);
201*4882a593Smuzhiyun }
202*4882a593Smuzhiyun EXPORT_SYMBOL(agp_free_memory);
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun #define ENTRIES_PER_PAGE (PAGE_SIZE / sizeof(unsigned long))
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun /**
207*4882a593Smuzhiyun * agp_allocate_memory - allocate a group of pages of a certain type.
208*4882a593Smuzhiyun *
209*4882a593Smuzhiyun * @bridge: an agp_bridge_data struct allocated for the AGP host bridge.
210*4882a593Smuzhiyun * @page_count: size_t argument of the number of pages
211*4882a593Smuzhiyun * @type: u32 argument of the type of memory to be allocated.
212*4882a593Smuzhiyun *
213*4882a593Smuzhiyun * Every agp bridge device will allow you to allocate AGP_NORMAL_MEMORY which
214*4882a593Smuzhiyun * maps to physical ram. Any other type is device dependent.
215*4882a593Smuzhiyun *
216*4882a593Smuzhiyun * It returns NULL whenever memory is unavailable.
217*4882a593Smuzhiyun */
agp_allocate_memory(struct agp_bridge_data * bridge,size_t page_count,u32 type)218*4882a593Smuzhiyun struct agp_memory *agp_allocate_memory(struct agp_bridge_data *bridge,
219*4882a593Smuzhiyun size_t page_count, u32 type)
220*4882a593Smuzhiyun {
221*4882a593Smuzhiyun int scratch_pages;
222*4882a593Smuzhiyun struct agp_memory *new;
223*4882a593Smuzhiyun size_t i;
224*4882a593Smuzhiyun int cur_memory;
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun if (!bridge)
227*4882a593Smuzhiyun return NULL;
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun cur_memory = atomic_read(&bridge->current_memory_agp);
230*4882a593Smuzhiyun if ((cur_memory + page_count > bridge->max_memory_agp) ||
231*4882a593Smuzhiyun (cur_memory + page_count < page_count))
232*4882a593Smuzhiyun return NULL;
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun if (type >= AGP_USER_TYPES) {
235*4882a593Smuzhiyun new = agp_generic_alloc_user(page_count, type);
236*4882a593Smuzhiyun if (new)
237*4882a593Smuzhiyun new->bridge = bridge;
238*4882a593Smuzhiyun return new;
239*4882a593Smuzhiyun }
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun if (type != 0) {
242*4882a593Smuzhiyun new = bridge->driver->alloc_by_type(page_count, type);
243*4882a593Smuzhiyun if (new)
244*4882a593Smuzhiyun new->bridge = bridge;
245*4882a593Smuzhiyun return new;
246*4882a593Smuzhiyun }
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun scratch_pages = (page_count + ENTRIES_PER_PAGE - 1) / ENTRIES_PER_PAGE;
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun new = agp_create_memory(scratch_pages);
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun if (new == NULL)
253*4882a593Smuzhiyun return NULL;
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun if (bridge->driver->agp_alloc_pages) {
256*4882a593Smuzhiyun if (bridge->driver->agp_alloc_pages(bridge, new, page_count)) {
257*4882a593Smuzhiyun agp_free_memory(new);
258*4882a593Smuzhiyun return NULL;
259*4882a593Smuzhiyun }
260*4882a593Smuzhiyun new->bridge = bridge;
261*4882a593Smuzhiyun return new;
262*4882a593Smuzhiyun }
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun for (i = 0; i < page_count; i++) {
265*4882a593Smuzhiyun struct page *page = bridge->driver->agp_alloc_page(bridge);
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun if (page == NULL) {
268*4882a593Smuzhiyun agp_free_memory(new);
269*4882a593Smuzhiyun return NULL;
270*4882a593Smuzhiyun }
271*4882a593Smuzhiyun new->pages[i] = page;
272*4882a593Smuzhiyun new->page_count++;
273*4882a593Smuzhiyun }
274*4882a593Smuzhiyun new->bridge = bridge;
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun return new;
277*4882a593Smuzhiyun }
278*4882a593Smuzhiyun EXPORT_SYMBOL(agp_allocate_memory);
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun /* End - Generic routines for handling agp_memory structures */
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun
agp_return_size(void)284*4882a593Smuzhiyun static int agp_return_size(void)
285*4882a593Smuzhiyun {
286*4882a593Smuzhiyun int current_size;
287*4882a593Smuzhiyun void *temp;
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun temp = agp_bridge->current_size;
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun switch (agp_bridge->driver->size_type) {
292*4882a593Smuzhiyun case U8_APER_SIZE:
293*4882a593Smuzhiyun current_size = A_SIZE_8(temp)->size;
294*4882a593Smuzhiyun break;
295*4882a593Smuzhiyun case U16_APER_SIZE:
296*4882a593Smuzhiyun current_size = A_SIZE_16(temp)->size;
297*4882a593Smuzhiyun break;
298*4882a593Smuzhiyun case U32_APER_SIZE:
299*4882a593Smuzhiyun current_size = A_SIZE_32(temp)->size;
300*4882a593Smuzhiyun break;
301*4882a593Smuzhiyun case LVL2_APER_SIZE:
302*4882a593Smuzhiyun current_size = A_SIZE_LVL2(temp)->size;
303*4882a593Smuzhiyun break;
304*4882a593Smuzhiyun case FIXED_APER_SIZE:
305*4882a593Smuzhiyun current_size = A_SIZE_FIX(temp)->size;
306*4882a593Smuzhiyun break;
307*4882a593Smuzhiyun default:
308*4882a593Smuzhiyun current_size = 0;
309*4882a593Smuzhiyun break;
310*4882a593Smuzhiyun }
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun current_size -= (agp_memory_reserved / (1024*1024));
313*4882a593Smuzhiyun if (current_size <0)
314*4882a593Smuzhiyun current_size = 0;
315*4882a593Smuzhiyun return current_size;
316*4882a593Smuzhiyun }
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun
agp_num_entries(void)319*4882a593Smuzhiyun int agp_num_entries(void)
320*4882a593Smuzhiyun {
321*4882a593Smuzhiyun int num_entries;
322*4882a593Smuzhiyun void *temp;
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun temp = agp_bridge->current_size;
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun switch (agp_bridge->driver->size_type) {
327*4882a593Smuzhiyun case U8_APER_SIZE:
328*4882a593Smuzhiyun num_entries = A_SIZE_8(temp)->num_entries;
329*4882a593Smuzhiyun break;
330*4882a593Smuzhiyun case U16_APER_SIZE:
331*4882a593Smuzhiyun num_entries = A_SIZE_16(temp)->num_entries;
332*4882a593Smuzhiyun break;
333*4882a593Smuzhiyun case U32_APER_SIZE:
334*4882a593Smuzhiyun num_entries = A_SIZE_32(temp)->num_entries;
335*4882a593Smuzhiyun break;
336*4882a593Smuzhiyun case LVL2_APER_SIZE:
337*4882a593Smuzhiyun num_entries = A_SIZE_LVL2(temp)->num_entries;
338*4882a593Smuzhiyun break;
339*4882a593Smuzhiyun case FIXED_APER_SIZE:
340*4882a593Smuzhiyun num_entries = A_SIZE_FIX(temp)->num_entries;
341*4882a593Smuzhiyun break;
342*4882a593Smuzhiyun default:
343*4882a593Smuzhiyun num_entries = 0;
344*4882a593Smuzhiyun break;
345*4882a593Smuzhiyun }
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun num_entries -= agp_memory_reserved>>PAGE_SHIFT;
348*4882a593Smuzhiyun if (num_entries<0)
349*4882a593Smuzhiyun num_entries = 0;
350*4882a593Smuzhiyun return num_entries;
351*4882a593Smuzhiyun }
352*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(agp_num_entries);
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun /**
356*4882a593Smuzhiyun * agp_copy_info - copy bridge state information
357*4882a593Smuzhiyun *
358*4882a593Smuzhiyun * @bridge: an agp_bridge_data struct allocated for the AGP host bridge.
359*4882a593Smuzhiyun * @info: agp_kern_info pointer. The caller should insure that this pointer is valid.
360*4882a593Smuzhiyun *
361*4882a593Smuzhiyun * This function copies information about the agp bridge device and the state of
362*4882a593Smuzhiyun * the agp backend into an agp_kern_info pointer.
363*4882a593Smuzhiyun */
agp_copy_info(struct agp_bridge_data * bridge,struct agp_kern_info * info)364*4882a593Smuzhiyun int agp_copy_info(struct agp_bridge_data *bridge, struct agp_kern_info *info)
365*4882a593Smuzhiyun {
366*4882a593Smuzhiyun memset(info, 0, sizeof(struct agp_kern_info));
367*4882a593Smuzhiyun if (!bridge) {
368*4882a593Smuzhiyun info->chipset = NOT_SUPPORTED;
369*4882a593Smuzhiyun return -EIO;
370*4882a593Smuzhiyun }
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun info->version.major = bridge->version->major;
373*4882a593Smuzhiyun info->version.minor = bridge->version->minor;
374*4882a593Smuzhiyun info->chipset = SUPPORTED;
375*4882a593Smuzhiyun info->device = bridge->dev;
376*4882a593Smuzhiyun if (bridge->mode & AGPSTAT_MODE_3_0)
377*4882a593Smuzhiyun info->mode = bridge->mode & ~AGP3_RESERVED_MASK;
378*4882a593Smuzhiyun else
379*4882a593Smuzhiyun info->mode = bridge->mode & ~AGP2_RESERVED_MASK;
380*4882a593Smuzhiyun info->aper_base = bridge->gart_bus_addr;
381*4882a593Smuzhiyun info->aper_size = agp_return_size();
382*4882a593Smuzhiyun info->max_memory = bridge->max_memory_agp;
383*4882a593Smuzhiyun info->current_memory = atomic_read(&bridge->current_memory_agp);
384*4882a593Smuzhiyun info->cant_use_aperture = bridge->driver->cant_use_aperture;
385*4882a593Smuzhiyun info->vm_ops = bridge->vm_ops;
386*4882a593Smuzhiyun info->page_mask = ~0UL;
387*4882a593Smuzhiyun return 0;
388*4882a593Smuzhiyun }
389*4882a593Smuzhiyun EXPORT_SYMBOL(agp_copy_info);
390*4882a593Smuzhiyun
391*4882a593Smuzhiyun /* End - Routine to copy over information structure */
392*4882a593Smuzhiyun
393*4882a593Smuzhiyun /*
394*4882a593Smuzhiyun * Routines for handling swapping of agp_memory into the GATT -
395*4882a593Smuzhiyun * These routines take agp_memory and insert them into the GATT.
396*4882a593Smuzhiyun * They call device specific routines to actually write to the GATT.
397*4882a593Smuzhiyun */
398*4882a593Smuzhiyun
399*4882a593Smuzhiyun /**
400*4882a593Smuzhiyun * agp_bind_memory - Bind an agp_memory structure into the GATT.
401*4882a593Smuzhiyun *
402*4882a593Smuzhiyun * @curr: agp_memory pointer
403*4882a593Smuzhiyun * @pg_start: an offset into the graphics aperture translation table
404*4882a593Smuzhiyun *
405*4882a593Smuzhiyun * It returns -EINVAL if the pointer == NULL.
406*4882a593Smuzhiyun * It returns -EBUSY if the area of the table requested is already in use.
407*4882a593Smuzhiyun */
agp_bind_memory(struct agp_memory * curr,off_t pg_start)408*4882a593Smuzhiyun int agp_bind_memory(struct agp_memory *curr, off_t pg_start)
409*4882a593Smuzhiyun {
410*4882a593Smuzhiyun int ret_val;
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun if (curr == NULL)
413*4882a593Smuzhiyun return -EINVAL;
414*4882a593Smuzhiyun
415*4882a593Smuzhiyun if (curr->is_bound) {
416*4882a593Smuzhiyun printk(KERN_INFO PFX "memory %p is already bound!\n", curr);
417*4882a593Smuzhiyun return -EINVAL;
418*4882a593Smuzhiyun }
419*4882a593Smuzhiyun if (!curr->is_flushed) {
420*4882a593Smuzhiyun curr->bridge->driver->cache_flush();
421*4882a593Smuzhiyun curr->is_flushed = true;
422*4882a593Smuzhiyun }
423*4882a593Smuzhiyun
424*4882a593Smuzhiyun ret_val = curr->bridge->driver->insert_memory(curr, pg_start, curr->type);
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun if (ret_val != 0)
427*4882a593Smuzhiyun return ret_val;
428*4882a593Smuzhiyun
429*4882a593Smuzhiyun curr->is_bound = true;
430*4882a593Smuzhiyun curr->pg_start = pg_start;
431*4882a593Smuzhiyun spin_lock(&agp_bridge->mapped_lock);
432*4882a593Smuzhiyun list_add(&curr->mapped_list, &agp_bridge->mapped_list);
433*4882a593Smuzhiyun spin_unlock(&agp_bridge->mapped_lock);
434*4882a593Smuzhiyun
435*4882a593Smuzhiyun return 0;
436*4882a593Smuzhiyun }
437*4882a593Smuzhiyun EXPORT_SYMBOL(agp_bind_memory);
438*4882a593Smuzhiyun
439*4882a593Smuzhiyun
440*4882a593Smuzhiyun /**
441*4882a593Smuzhiyun * agp_unbind_memory - Removes an agp_memory structure from the GATT
442*4882a593Smuzhiyun *
443*4882a593Smuzhiyun * @curr: agp_memory pointer to be removed from the GATT.
444*4882a593Smuzhiyun *
445*4882a593Smuzhiyun * It returns -EINVAL if this piece of agp_memory is not currently bound to
446*4882a593Smuzhiyun * the graphics aperture translation table or if the agp_memory pointer == NULL
447*4882a593Smuzhiyun */
agp_unbind_memory(struct agp_memory * curr)448*4882a593Smuzhiyun int agp_unbind_memory(struct agp_memory *curr)
449*4882a593Smuzhiyun {
450*4882a593Smuzhiyun int ret_val;
451*4882a593Smuzhiyun
452*4882a593Smuzhiyun if (curr == NULL)
453*4882a593Smuzhiyun return -EINVAL;
454*4882a593Smuzhiyun
455*4882a593Smuzhiyun if (!curr->is_bound) {
456*4882a593Smuzhiyun printk(KERN_INFO PFX "memory %p was not bound!\n", curr);
457*4882a593Smuzhiyun return -EINVAL;
458*4882a593Smuzhiyun }
459*4882a593Smuzhiyun
460*4882a593Smuzhiyun ret_val = curr->bridge->driver->remove_memory(curr, curr->pg_start, curr->type);
461*4882a593Smuzhiyun
462*4882a593Smuzhiyun if (ret_val != 0)
463*4882a593Smuzhiyun return ret_val;
464*4882a593Smuzhiyun
465*4882a593Smuzhiyun curr->is_bound = false;
466*4882a593Smuzhiyun curr->pg_start = 0;
467*4882a593Smuzhiyun spin_lock(&curr->bridge->mapped_lock);
468*4882a593Smuzhiyun list_del(&curr->mapped_list);
469*4882a593Smuzhiyun spin_unlock(&curr->bridge->mapped_lock);
470*4882a593Smuzhiyun return 0;
471*4882a593Smuzhiyun }
472*4882a593Smuzhiyun EXPORT_SYMBOL(agp_unbind_memory);
473*4882a593Smuzhiyun
474*4882a593Smuzhiyun
475*4882a593Smuzhiyun /* End - Routines for handling swapping of agp_memory into the GATT */
476*4882a593Smuzhiyun
477*4882a593Smuzhiyun
478*4882a593Smuzhiyun /* Generic Agp routines - Start */
agp_v2_parse_one(u32 * requested_mode,u32 * bridge_agpstat,u32 * vga_agpstat)479*4882a593Smuzhiyun static void agp_v2_parse_one(u32 *requested_mode, u32 *bridge_agpstat, u32 *vga_agpstat)
480*4882a593Smuzhiyun {
481*4882a593Smuzhiyun u32 tmp;
482*4882a593Smuzhiyun
483*4882a593Smuzhiyun if (*requested_mode & AGP2_RESERVED_MASK) {
484*4882a593Smuzhiyun printk(KERN_INFO PFX "reserved bits set (%x) in mode 0x%x. Fixed.\n",
485*4882a593Smuzhiyun *requested_mode & AGP2_RESERVED_MASK, *requested_mode);
486*4882a593Smuzhiyun *requested_mode &= ~AGP2_RESERVED_MASK;
487*4882a593Smuzhiyun }
488*4882a593Smuzhiyun
489*4882a593Smuzhiyun /*
490*4882a593Smuzhiyun * Some dumb bridges are programmed to disobey the AGP2 spec.
491*4882a593Smuzhiyun * This is likely a BIOS misprogramming rather than poweron default, or
492*4882a593Smuzhiyun * it would be a lot more common.
493*4882a593Smuzhiyun * https://bugs.freedesktop.org/show_bug.cgi?id=8816
494*4882a593Smuzhiyun * AGPv2 spec 6.1.9 states:
495*4882a593Smuzhiyun * The RATE field indicates the data transfer rates supported by this
496*4882a593Smuzhiyun * device. A.G.P. devices must report all that apply.
497*4882a593Smuzhiyun * Fix them up as best we can.
498*4882a593Smuzhiyun */
499*4882a593Smuzhiyun switch (*bridge_agpstat & 7) {
500*4882a593Smuzhiyun case 4:
501*4882a593Smuzhiyun *bridge_agpstat |= (AGPSTAT2_2X | AGPSTAT2_1X);
502*4882a593Smuzhiyun printk(KERN_INFO PFX "BIOS bug. AGP bridge claims to only support x4 rate. "
503*4882a593Smuzhiyun "Fixing up support for x2 & x1\n");
504*4882a593Smuzhiyun break;
505*4882a593Smuzhiyun case 2:
506*4882a593Smuzhiyun *bridge_agpstat |= AGPSTAT2_1X;
507*4882a593Smuzhiyun printk(KERN_INFO PFX "BIOS bug. AGP bridge claims to only support x2 rate. "
508*4882a593Smuzhiyun "Fixing up support for x1\n");
509*4882a593Smuzhiyun break;
510*4882a593Smuzhiyun default:
511*4882a593Smuzhiyun break;
512*4882a593Smuzhiyun }
513*4882a593Smuzhiyun
514*4882a593Smuzhiyun /* Check the speed bits make sense. Only one should be set. */
515*4882a593Smuzhiyun tmp = *requested_mode & 7;
516*4882a593Smuzhiyun switch (tmp) {
517*4882a593Smuzhiyun case 0:
518*4882a593Smuzhiyun printk(KERN_INFO PFX "%s tried to set rate=x0. Setting to x1 mode.\n", current->comm);
519*4882a593Smuzhiyun *requested_mode |= AGPSTAT2_1X;
520*4882a593Smuzhiyun break;
521*4882a593Smuzhiyun case 1:
522*4882a593Smuzhiyun case 2:
523*4882a593Smuzhiyun break;
524*4882a593Smuzhiyun case 3:
525*4882a593Smuzhiyun *requested_mode &= ~(AGPSTAT2_1X); /* rate=2 */
526*4882a593Smuzhiyun break;
527*4882a593Smuzhiyun case 4:
528*4882a593Smuzhiyun break;
529*4882a593Smuzhiyun case 5:
530*4882a593Smuzhiyun case 6:
531*4882a593Smuzhiyun case 7:
532*4882a593Smuzhiyun *requested_mode &= ~(AGPSTAT2_1X|AGPSTAT2_2X); /* rate=4*/
533*4882a593Smuzhiyun break;
534*4882a593Smuzhiyun }
535*4882a593Smuzhiyun
536*4882a593Smuzhiyun /* disable SBA if it's not supported */
537*4882a593Smuzhiyun if (!((*bridge_agpstat & AGPSTAT_SBA) && (*vga_agpstat & AGPSTAT_SBA) && (*requested_mode & AGPSTAT_SBA)))
538*4882a593Smuzhiyun *bridge_agpstat &= ~AGPSTAT_SBA;
539*4882a593Smuzhiyun
540*4882a593Smuzhiyun /* Set rate */
541*4882a593Smuzhiyun if (!((*bridge_agpstat & AGPSTAT2_4X) && (*vga_agpstat & AGPSTAT2_4X) && (*requested_mode & AGPSTAT2_4X)))
542*4882a593Smuzhiyun *bridge_agpstat &= ~AGPSTAT2_4X;
543*4882a593Smuzhiyun
544*4882a593Smuzhiyun if (!((*bridge_agpstat & AGPSTAT2_2X) && (*vga_agpstat & AGPSTAT2_2X) && (*requested_mode & AGPSTAT2_2X)))
545*4882a593Smuzhiyun *bridge_agpstat &= ~AGPSTAT2_2X;
546*4882a593Smuzhiyun
547*4882a593Smuzhiyun if (!((*bridge_agpstat & AGPSTAT2_1X) && (*vga_agpstat & AGPSTAT2_1X) && (*requested_mode & AGPSTAT2_1X)))
548*4882a593Smuzhiyun *bridge_agpstat &= ~AGPSTAT2_1X;
549*4882a593Smuzhiyun
550*4882a593Smuzhiyun /* Now we know what mode it should be, clear out the unwanted bits. */
551*4882a593Smuzhiyun if (*bridge_agpstat & AGPSTAT2_4X)
552*4882a593Smuzhiyun *bridge_agpstat &= ~(AGPSTAT2_1X | AGPSTAT2_2X); /* 4X */
553*4882a593Smuzhiyun
554*4882a593Smuzhiyun if (*bridge_agpstat & AGPSTAT2_2X)
555*4882a593Smuzhiyun *bridge_agpstat &= ~(AGPSTAT2_1X | AGPSTAT2_4X); /* 2X */
556*4882a593Smuzhiyun
557*4882a593Smuzhiyun if (*bridge_agpstat & AGPSTAT2_1X)
558*4882a593Smuzhiyun *bridge_agpstat &= ~(AGPSTAT2_2X | AGPSTAT2_4X); /* 1X */
559*4882a593Smuzhiyun
560*4882a593Smuzhiyun /* Apply any errata. */
561*4882a593Smuzhiyun if (agp_bridge->flags & AGP_ERRATA_FASTWRITES)
562*4882a593Smuzhiyun *bridge_agpstat &= ~AGPSTAT_FW;
563*4882a593Smuzhiyun
564*4882a593Smuzhiyun if (agp_bridge->flags & AGP_ERRATA_SBA)
565*4882a593Smuzhiyun *bridge_agpstat &= ~AGPSTAT_SBA;
566*4882a593Smuzhiyun
567*4882a593Smuzhiyun if (agp_bridge->flags & AGP_ERRATA_1X) {
568*4882a593Smuzhiyun *bridge_agpstat &= ~(AGPSTAT2_2X | AGPSTAT2_4X);
569*4882a593Smuzhiyun *bridge_agpstat |= AGPSTAT2_1X;
570*4882a593Smuzhiyun }
571*4882a593Smuzhiyun
572*4882a593Smuzhiyun /* If we've dropped down to 1X, disable fast writes. */
573*4882a593Smuzhiyun if (*bridge_agpstat & AGPSTAT2_1X)
574*4882a593Smuzhiyun *bridge_agpstat &= ~AGPSTAT_FW;
575*4882a593Smuzhiyun }
576*4882a593Smuzhiyun
577*4882a593Smuzhiyun /*
578*4882a593Smuzhiyun * requested_mode = Mode requested by (typically) X.
579*4882a593Smuzhiyun * bridge_agpstat = PCI_AGP_STATUS from agp bridge.
580*4882a593Smuzhiyun * vga_agpstat = PCI_AGP_STATUS from graphic card.
581*4882a593Smuzhiyun */
agp_v3_parse_one(u32 * requested_mode,u32 * bridge_agpstat,u32 * vga_agpstat)582*4882a593Smuzhiyun static void agp_v3_parse_one(u32 *requested_mode, u32 *bridge_agpstat, u32 *vga_agpstat)
583*4882a593Smuzhiyun {
584*4882a593Smuzhiyun u32 origbridge=*bridge_agpstat, origvga=*vga_agpstat;
585*4882a593Smuzhiyun u32 tmp;
586*4882a593Smuzhiyun
587*4882a593Smuzhiyun if (*requested_mode & AGP3_RESERVED_MASK) {
588*4882a593Smuzhiyun printk(KERN_INFO PFX "reserved bits set (%x) in mode 0x%x. Fixed.\n",
589*4882a593Smuzhiyun *requested_mode & AGP3_RESERVED_MASK, *requested_mode);
590*4882a593Smuzhiyun *requested_mode &= ~AGP3_RESERVED_MASK;
591*4882a593Smuzhiyun }
592*4882a593Smuzhiyun
593*4882a593Smuzhiyun /* Check the speed bits make sense. */
594*4882a593Smuzhiyun tmp = *requested_mode & 7;
595*4882a593Smuzhiyun if (tmp == 0) {
596*4882a593Smuzhiyun printk(KERN_INFO PFX "%s tried to set rate=x0. Setting to AGP3 x4 mode.\n", current->comm);
597*4882a593Smuzhiyun *requested_mode |= AGPSTAT3_4X;
598*4882a593Smuzhiyun }
599*4882a593Smuzhiyun if (tmp >= 3) {
600*4882a593Smuzhiyun printk(KERN_INFO PFX "%s tried to set rate=x%d. Setting to AGP3 x8 mode.\n", current->comm, tmp * 4);
601*4882a593Smuzhiyun *requested_mode = (*requested_mode & ~7) | AGPSTAT3_8X;
602*4882a593Smuzhiyun }
603*4882a593Smuzhiyun
604*4882a593Smuzhiyun /* ARQSZ - Set the value to the maximum one.
605*4882a593Smuzhiyun * Don't allow the mode register to override values. */
606*4882a593Smuzhiyun *bridge_agpstat = ((*bridge_agpstat & ~AGPSTAT_ARQSZ) |
607*4882a593Smuzhiyun max_t(u32,(*bridge_agpstat & AGPSTAT_ARQSZ),(*vga_agpstat & AGPSTAT_ARQSZ)));
608*4882a593Smuzhiyun
609*4882a593Smuzhiyun /* Calibration cycle.
610*4882a593Smuzhiyun * Don't allow the mode register to override values. */
611*4882a593Smuzhiyun *bridge_agpstat = ((*bridge_agpstat & ~AGPSTAT_CAL_MASK) |
612*4882a593Smuzhiyun min_t(u32,(*bridge_agpstat & AGPSTAT_CAL_MASK),(*vga_agpstat & AGPSTAT_CAL_MASK)));
613*4882a593Smuzhiyun
614*4882a593Smuzhiyun /* SBA *must* be supported for AGP v3 */
615*4882a593Smuzhiyun *bridge_agpstat |= AGPSTAT_SBA;
616*4882a593Smuzhiyun
617*4882a593Smuzhiyun /*
618*4882a593Smuzhiyun * Set speed.
619*4882a593Smuzhiyun * Check for invalid speeds. This can happen when applications
620*4882a593Smuzhiyun * written before the AGP 3.0 standard pass AGP2.x modes to AGP3 hardware
621*4882a593Smuzhiyun */
622*4882a593Smuzhiyun if (*requested_mode & AGPSTAT_MODE_3_0) {
623*4882a593Smuzhiyun /*
624*4882a593Smuzhiyun * Caller hasn't a clue what it is doing. Bridge is in 3.0 mode,
625*4882a593Smuzhiyun * have been passed a 3.0 mode, but with 2.x speed bits set.
626*4882a593Smuzhiyun * AGP2.x 4x -> AGP3.0 4x.
627*4882a593Smuzhiyun */
628*4882a593Smuzhiyun if (*requested_mode & AGPSTAT2_4X) {
629*4882a593Smuzhiyun printk(KERN_INFO PFX "%s passes broken AGP3 flags (%x). Fixed.\n",
630*4882a593Smuzhiyun current->comm, *requested_mode);
631*4882a593Smuzhiyun *requested_mode &= ~AGPSTAT2_4X;
632*4882a593Smuzhiyun *requested_mode |= AGPSTAT3_4X;
633*4882a593Smuzhiyun }
634*4882a593Smuzhiyun } else {
635*4882a593Smuzhiyun /*
636*4882a593Smuzhiyun * The caller doesn't know what they are doing. We are in 3.0 mode,
637*4882a593Smuzhiyun * but have been passed an AGP 2.x mode.
638*4882a593Smuzhiyun * Convert AGP 1x,2x,4x -> AGP 3.0 4x.
639*4882a593Smuzhiyun */
640*4882a593Smuzhiyun printk(KERN_INFO PFX "%s passes broken AGP2 flags (%x) in AGP3 mode. Fixed.\n",
641*4882a593Smuzhiyun current->comm, *requested_mode);
642*4882a593Smuzhiyun *requested_mode &= ~(AGPSTAT2_4X | AGPSTAT2_2X | AGPSTAT2_1X);
643*4882a593Smuzhiyun *requested_mode |= AGPSTAT3_4X;
644*4882a593Smuzhiyun }
645*4882a593Smuzhiyun
646*4882a593Smuzhiyun if (*requested_mode & AGPSTAT3_8X) {
647*4882a593Smuzhiyun if (!(*bridge_agpstat & AGPSTAT3_8X)) {
648*4882a593Smuzhiyun *bridge_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD);
649*4882a593Smuzhiyun *bridge_agpstat |= AGPSTAT3_4X;
650*4882a593Smuzhiyun printk(KERN_INFO PFX "%s requested AGPx8 but bridge not capable.\n", current->comm);
651*4882a593Smuzhiyun return;
652*4882a593Smuzhiyun }
653*4882a593Smuzhiyun if (!(*vga_agpstat & AGPSTAT3_8X)) {
654*4882a593Smuzhiyun *bridge_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD);
655*4882a593Smuzhiyun *bridge_agpstat |= AGPSTAT3_4X;
656*4882a593Smuzhiyun printk(KERN_INFO PFX "%s requested AGPx8 but graphic card not capable.\n", current->comm);
657*4882a593Smuzhiyun return;
658*4882a593Smuzhiyun }
659*4882a593Smuzhiyun /* All set, bridge & device can do AGP x8*/
660*4882a593Smuzhiyun *bridge_agpstat &= ~(AGPSTAT3_4X | AGPSTAT3_RSVD);
661*4882a593Smuzhiyun goto done;
662*4882a593Smuzhiyun
663*4882a593Smuzhiyun } else if (*requested_mode & AGPSTAT3_4X) {
664*4882a593Smuzhiyun *bridge_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD);
665*4882a593Smuzhiyun *bridge_agpstat |= AGPSTAT3_4X;
666*4882a593Smuzhiyun goto done;
667*4882a593Smuzhiyun
668*4882a593Smuzhiyun } else {
669*4882a593Smuzhiyun
670*4882a593Smuzhiyun /*
671*4882a593Smuzhiyun * If we didn't specify an AGP mode, we see if both
672*4882a593Smuzhiyun * the graphics card, and the bridge can do x8, and use if so.
673*4882a593Smuzhiyun * If not, we fall back to x4 mode.
674*4882a593Smuzhiyun */
675*4882a593Smuzhiyun if ((*bridge_agpstat & AGPSTAT3_8X) && (*vga_agpstat & AGPSTAT3_8X)) {
676*4882a593Smuzhiyun printk(KERN_INFO PFX "No AGP mode specified. Setting to highest mode "
677*4882a593Smuzhiyun "supported by bridge & card (x8).\n");
678*4882a593Smuzhiyun *bridge_agpstat &= ~(AGPSTAT3_4X | AGPSTAT3_RSVD);
679*4882a593Smuzhiyun *vga_agpstat &= ~(AGPSTAT3_4X | AGPSTAT3_RSVD);
680*4882a593Smuzhiyun } else {
681*4882a593Smuzhiyun printk(KERN_INFO PFX "Fell back to AGPx4 mode because ");
682*4882a593Smuzhiyun if (!(*bridge_agpstat & AGPSTAT3_8X)) {
683*4882a593Smuzhiyun printk(KERN_INFO PFX "bridge couldn't do x8. bridge_agpstat:%x (orig=%x)\n",
684*4882a593Smuzhiyun *bridge_agpstat, origbridge);
685*4882a593Smuzhiyun *bridge_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD);
686*4882a593Smuzhiyun *bridge_agpstat |= AGPSTAT3_4X;
687*4882a593Smuzhiyun }
688*4882a593Smuzhiyun if (!(*vga_agpstat & AGPSTAT3_8X)) {
689*4882a593Smuzhiyun printk(KERN_INFO PFX "graphics card couldn't do x8. vga_agpstat:%x (orig=%x)\n",
690*4882a593Smuzhiyun *vga_agpstat, origvga);
691*4882a593Smuzhiyun *vga_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD);
692*4882a593Smuzhiyun *vga_agpstat |= AGPSTAT3_4X;
693*4882a593Smuzhiyun }
694*4882a593Smuzhiyun }
695*4882a593Smuzhiyun }
696*4882a593Smuzhiyun
697*4882a593Smuzhiyun done:
698*4882a593Smuzhiyun /* Apply any errata. */
699*4882a593Smuzhiyun if (agp_bridge->flags & AGP_ERRATA_FASTWRITES)
700*4882a593Smuzhiyun *bridge_agpstat &= ~AGPSTAT_FW;
701*4882a593Smuzhiyun
702*4882a593Smuzhiyun if (agp_bridge->flags & AGP_ERRATA_SBA)
703*4882a593Smuzhiyun *bridge_agpstat &= ~AGPSTAT_SBA;
704*4882a593Smuzhiyun
705*4882a593Smuzhiyun if (agp_bridge->flags & AGP_ERRATA_1X) {
706*4882a593Smuzhiyun *bridge_agpstat &= ~(AGPSTAT2_2X | AGPSTAT2_4X);
707*4882a593Smuzhiyun *bridge_agpstat |= AGPSTAT2_1X;
708*4882a593Smuzhiyun }
709*4882a593Smuzhiyun }
710*4882a593Smuzhiyun
711*4882a593Smuzhiyun
712*4882a593Smuzhiyun /**
713*4882a593Smuzhiyun * agp_collect_device_status - determine correct agp_cmd from various agp_stat's
714*4882a593Smuzhiyun * @bridge: an agp_bridge_data struct allocated for the AGP host bridge.
715*4882a593Smuzhiyun * @requested_mode: requested agp_stat from userspace (Typically from X)
716*4882a593Smuzhiyun * @bridge_agpstat: current agp_stat from AGP bridge.
717*4882a593Smuzhiyun *
718*4882a593Smuzhiyun * This function will hunt for an AGP graphics card, and try to match
719*4882a593Smuzhiyun * the requested mode to the capabilities of both the bridge and the card.
720*4882a593Smuzhiyun */
agp_collect_device_status(struct agp_bridge_data * bridge,u32 requested_mode,u32 bridge_agpstat)721*4882a593Smuzhiyun u32 agp_collect_device_status(struct agp_bridge_data *bridge, u32 requested_mode, u32 bridge_agpstat)
722*4882a593Smuzhiyun {
723*4882a593Smuzhiyun struct pci_dev *device = NULL;
724*4882a593Smuzhiyun u32 vga_agpstat;
725*4882a593Smuzhiyun u8 cap_ptr;
726*4882a593Smuzhiyun
727*4882a593Smuzhiyun for (;;) {
728*4882a593Smuzhiyun device = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, device);
729*4882a593Smuzhiyun if (!device) {
730*4882a593Smuzhiyun printk(KERN_INFO PFX "Couldn't find an AGP VGA controller.\n");
731*4882a593Smuzhiyun return 0;
732*4882a593Smuzhiyun }
733*4882a593Smuzhiyun cap_ptr = pci_find_capability(device, PCI_CAP_ID_AGP);
734*4882a593Smuzhiyun if (cap_ptr)
735*4882a593Smuzhiyun break;
736*4882a593Smuzhiyun }
737*4882a593Smuzhiyun
738*4882a593Smuzhiyun /*
739*4882a593Smuzhiyun * Ok, here we have a AGP device. Disable impossible
740*4882a593Smuzhiyun * settings, and adjust the readqueue to the minimum.
741*4882a593Smuzhiyun */
742*4882a593Smuzhiyun pci_read_config_dword(device, cap_ptr+PCI_AGP_STATUS, &vga_agpstat);
743*4882a593Smuzhiyun
744*4882a593Smuzhiyun /* adjust RQ depth */
745*4882a593Smuzhiyun bridge_agpstat = ((bridge_agpstat & ~AGPSTAT_RQ_DEPTH) |
746*4882a593Smuzhiyun min_t(u32, (requested_mode & AGPSTAT_RQ_DEPTH),
747*4882a593Smuzhiyun min_t(u32, (bridge_agpstat & AGPSTAT_RQ_DEPTH), (vga_agpstat & AGPSTAT_RQ_DEPTH))));
748*4882a593Smuzhiyun
749*4882a593Smuzhiyun /* disable FW if it's not supported */
750*4882a593Smuzhiyun if (!((bridge_agpstat & AGPSTAT_FW) &&
751*4882a593Smuzhiyun (vga_agpstat & AGPSTAT_FW) &&
752*4882a593Smuzhiyun (requested_mode & AGPSTAT_FW)))
753*4882a593Smuzhiyun bridge_agpstat &= ~AGPSTAT_FW;
754*4882a593Smuzhiyun
755*4882a593Smuzhiyun /* Check to see if we are operating in 3.0 mode */
756*4882a593Smuzhiyun if (agp_bridge->mode & AGPSTAT_MODE_3_0)
757*4882a593Smuzhiyun agp_v3_parse_one(&requested_mode, &bridge_agpstat, &vga_agpstat);
758*4882a593Smuzhiyun else
759*4882a593Smuzhiyun agp_v2_parse_one(&requested_mode, &bridge_agpstat, &vga_agpstat);
760*4882a593Smuzhiyun
761*4882a593Smuzhiyun pci_dev_put(device);
762*4882a593Smuzhiyun return bridge_agpstat;
763*4882a593Smuzhiyun }
764*4882a593Smuzhiyun EXPORT_SYMBOL(agp_collect_device_status);
765*4882a593Smuzhiyun
766*4882a593Smuzhiyun
agp_device_command(u32 bridge_agpstat,bool agp_v3)767*4882a593Smuzhiyun void agp_device_command(u32 bridge_agpstat, bool agp_v3)
768*4882a593Smuzhiyun {
769*4882a593Smuzhiyun struct pci_dev *device = NULL;
770*4882a593Smuzhiyun int mode;
771*4882a593Smuzhiyun
772*4882a593Smuzhiyun mode = bridge_agpstat & 0x7;
773*4882a593Smuzhiyun if (agp_v3)
774*4882a593Smuzhiyun mode *= 4;
775*4882a593Smuzhiyun
776*4882a593Smuzhiyun for_each_pci_dev(device) {
777*4882a593Smuzhiyun u8 agp = pci_find_capability(device, PCI_CAP_ID_AGP);
778*4882a593Smuzhiyun if (!agp)
779*4882a593Smuzhiyun continue;
780*4882a593Smuzhiyun
781*4882a593Smuzhiyun dev_info(&device->dev, "putting AGP V%d device into %dx mode\n",
782*4882a593Smuzhiyun agp_v3 ? 3 : 2, mode);
783*4882a593Smuzhiyun pci_write_config_dword(device, agp + PCI_AGP_COMMAND, bridge_agpstat);
784*4882a593Smuzhiyun }
785*4882a593Smuzhiyun }
786*4882a593Smuzhiyun EXPORT_SYMBOL(agp_device_command);
787*4882a593Smuzhiyun
788*4882a593Smuzhiyun
get_agp_version(struct agp_bridge_data * bridge)789*4882a593Smuzhiyun void get_agp_version(struct agp_bridge_data *bridge)
790*4882a593Smuzhiyun {
791*4882a593Smuzhiyun u32 ncapid;
792*4882a593Smuzhiyun
793*4882a593Smuzhiyun /* Exit early if already set by errata workarounds. */
794*4882a593Smuzhiyun if (bridge->major_version != 0)
795*4882a593Smuzhiyun return;
796*4882a593Smuzhiyun
797*4882a593Smuzhiyun pci_read_config_dword(bridge->dev, bridge->capndx, &ncapid);
798*4882a593Smuzhiyun bridge->major_version = (ncapid >> AGP_MAJOR_VERSION_SHIFT) & 0xf;
799*4882a593Smuzhiyun bridge->minor_version = (ncapid >> AGP_MINOR_VERSION_SHIFT) & 0xf;
800*4882a593Smuzhiyun }
801*4882a593Smuzhiyun EXPORT_SYMBOL(get_agp_version);
802*4882a593Smuzhiyun
803*4882a593Smuzhiyun
agp_generic_enable(struct agp_bridge_data * bridge,u32 requested_mode)804*4882a593Smuzhiyun void agp_generic_enable(struct agp_bridge_data *bridge, u32 requested_mode)
805*4882a593Smuzhiyun {
806*4882a593Smuzhiyun u32 bridge_agpstat, temp;
807*4882a593Smuzhiyun
808*4882a593Smuzhiyun get_agp_version(agp_bridge);
809*4882a593Smuzhiyun
810*4882a593Smuzhiyun dev_info(&agp_bridge->dev->dev, "AGP %d.%d bridge\n",
811*4882a593Smuzhiyun agp_bridge->major_version, agp_bridge->minor_version);
812*4882a593Smuzhiyun
813*4882a593Smuzhiyun pci_read_config_dword(agp_bridge->dev,
814*4882a593Smuzhiyun agp_bridge->capndx + PCI_AGP_STATUS, &bridge_agpstat);
815*4882a593Smuzhiyun
816*4882a593Smuzhiyun bridge_agpstat = agp_collect_device_status(agp_bridge, requested_mode, bridge_agpstat);
817*4882a593Smuzhiyun if (bridge_agpstat == 0)
818*4882a593Smuzhiyun /* Something bad happened. FIXME: Return error code? */
819*4882a593Smuzhiyun return;
820*4882a593Smuzhiyun
821*4882a593Smuzhiyun bridge_agpstat |= AGPSTAT_AGP_ENABLE;
822*4882a593Smuzhiyun
823*4882a593Smuzhiyun /* Do AGP version specific frobbing. */
824*4882a593Smuzhiyun if (bridge->major_version >= 3) {
825*4882a593Smuzhiyun if (bridge->mode & AGPSTAT_MODE_3_0) {
826*4882a593Smuzhiyun /* If we have 3.5, we can do the isoch stuff. */
827*4882a593Smuzhiyun if (bridge->minor_version >= 5)
828*4882a593Smuzhiyun agp_3_5_enable(bridge);
829*4882a593Smuzhiyun agp_device_command(bridge_agpstat, true);
830*4882a593Smuzhiyun return;
831*4882a593Smuzhiyun } else {
832*4882a593Smuzhiyun /* Disable calibration cycle in RX91<1> when not in AGP3.0 mode of operation.*/
833*4882a593Smuzhiyun bridge_agpstat &= ~(7<<10) ;
834*4882a593Smuzhiyun pci_read_config_dword(bridge->dev,
835*4882a593Smuzhiyun bridge->capndx+AGPCTRL, &temp);
836*4882a593Smuzhiyun temp |= (1<<9);
837*4882a593Smuzhiyun pci_write_config_dword(bridge->dev,
838*4882a593Smuzhiyun bridge->capndx+AGPCTRL, temp);
839*4882a593Smuzhiyun
840*4882a593Smuzhiyun dev_info(&bridge->dev->dev, "bridge is in legacy mode, falling back to 2.x\n");
841*4882a593Smuzhiyun }
842*4882a593Smuzhiyun }
843*4882a593Smuzhiyun
844*4882a593Smuzhiyun /* AGP v<3 */
845*4882a593Smuzhiyun agp_device_command(bridge_agpstat, false);
846*4882a593Smuzhiyun }
847*4882a593Smuzhiyun EXPORT_SYMBOL(agp_generic_enable);
848*4882a593Smuzhiyun
849*4882a593Smuzhiyun
agp_generic_create_gatt_table(struct agp_bridge_data * bridge)850*4882a593Smuzhiyun int agp_generic_create_gatt_table(struct agp_bridge_data *bridge)
851*4882a593Smuzhiyun {
852*4882a593Smuzhiyun char *table;
853*4882a593Smuzhiyun char *table_end;
854*4882a593Smuzhiyun int page_order;
855*4882a593Smuzhiyun int num_entries;
856*4882a593Smuzhiyun int i;
857*4882a593Smuzhiyun void *temp;
858*4882a593Smuzhiyun struct page *page;
859*4882a593Smuzhiyun
860*4882a593Smuzhiyun /* The generic routines can't handle 2 level gatt's */
861*4882a593Smuzhiyun if (bridge->driver->size_type == LVL2_APER_SIZE)
862*4882a593Smuzhiyun return -EINVAL;
863*4882a593Smuzhiyun
864*4882a593Smuzhiyun table = NULL;
865*4882a593Smuzhiyun i = bridge->aperture_size_idx;
866*4882a593Smuzhiyun temp = bridge->current_size;
867*4882a593Smuzhiyun page_order = num_entries = 0;
868*4882a593Smuzhiyun
869*4882a593Smuzhiyun if (bridge->driver->size_type != FIXED_APER_SIZE) {
870*4882a593Smuzhiyun do {
871*4882a593Smuzhiyun switch (bridge->driver->size_type) {
872*4882a593Smuzhiyun case U8_APER_SIZE:
873*4882a593Smuzhiyun page_order =
874*4882a593Smuzhiyun A_SIZE_8(temp)->page_order;
875*4882a593Smuzhiyun num_entries =
876*4882a593Smuzhiyun A_SIZE_8(temp)->num_entries;
877*4882a593Smuzhiyun break;
878*4882a593Smuzhiyun case U16_APER_SIZE:
879*4882a593Smuzhiyun page_order = A_SIZE_16(temp)->page_order;
880*4882a593Smuzhiyun num_entries = A_SIZE_16(temp)->num_entries;
881*4882a593Smuzhiyun break;
882*4882a593Smuzhiyun case U32_APER_SIZE:
883*4882a593Smuzhiyun page_order = A_SIZE_32(temp)->page_order;
884*4882a593Smuzhiyun num_entries = A_SIZE_32(temp)->num_entries;
885*4882a593Smuzhiyun break;
886*4882a593Smuzhiyun /* This case will never really happen. */
887*4882a593Smuzhiyun case FIXED_APER_SIZE:
888*4882a593Smuzhiyun case LVL2_APER_SIZE:
889*4882a593Smuzhiyun default:
890*4882a593Smuzhiyun page_order = num_entries = 0;
891*4882a593Smuzhiyun break;
892*4882a593Smuzhiyun }
893*4882a593Smuzhiyun
894*4882a593Smuzhiyun table = alloc_gatt_pages(page_order);
895*4882a593Smuzhiyun
896*4882a593Smuzhiyun if (table == NULL) {
897*4882a593Smuzhiyun i++;
898*4882a593Smuzhiyun switch (bridge->driver->size_type) {
899*4882a593Smuzhiyun case U8_APER_SIZE:
900*4882a593Smuzhiyun bridge->current_size = A_IDX8(bridge);
901*4882a593Smuzhiyun break;
902*4882a593Smuzhiyun case U16_APER_SIZE:
903*4882a593Smuzhiyun bridge->current_size = A_IDX16(bridge);
904*4882a593Smuzhiyun break;
905*4882a593Smuzhiyun case U32_APER_SIZE:
906*4882a593Smuzhiyun bridge->current_size = A_IDX32(bridge);
907*4882a593Smuzhiyun break;
908*4882a593Smuzhiyun /* These cases will never really happen. */
909*4882a593Smuzhiyun case FIXED_APER_SIZE:
910*4882a593Smuzhiyun case LVL2_APER_SIZE:
911*4882a593Smuzhiyun default:
912*4882a593Smuzhiyun break;
913*4882a593Smuzhiyun }
914*4882a593Smuzhiyun temp = bridge->current_size;
915*4882a593Smuzhiyun } else {
916*4882a593Smuzhiyun bridge->aperture_size_idx = i;
917*4882a593Smuzhiyun }
918*4882a593Smuzhiyun } while (!table && (i < bridge->driver->num_aperture_sizes));
919*4882a593Smuzhiyun } else {
920*4882a593Smuzhiyun page_order = ((struct aper_size_info_fixed *) temp)->page_order;
921*4882a593Smuzhiyun num_entries = ((struct aper_size_info_fixed *) temp)->num_entries;
922*4882a593Smuzhiyun table = alloc_gatt_pages(page_order);
923*4882a593Smuzhiyun }
924*4882a593Smuzhiyun
925*4882a593Smuzhiyun if (table == NULL)
926*4882a593Smuzhiyun return -ENOMEM;
927*4882a593Smuzhiyun
928*4882a593Smuzhiyun table_end = table + ((PAGE_SIZE * (1 << page_order)) - 1);
929*4882a593Smuzhiyun
930*4882a593Smuzhiyun for (page = virt_to_page(table); page <= virt_to_page(table_end); page++)
931*4882a593Smuzhiyun SetPageReserved(page);
932*4882a593Smuzhiyun
933*4882a593Smuzhiyun bridge->gatt_table_real = (u32 *) table;
934*4882a593Smuzhiyun agp_gatt_table = (void *)table;
935*4882a593Smuzhiyun
936*4882a593Smuzhiyun bridge->driver->cache_flush();
937*4882a593Smuzhiyun #ifdef CONFIG_X86
938*4882a593Smuzhiyun if (set_memory_uc((unsigned long)table, 1 << page_order))
939*4882a593Smuzhiyun printk(KERN_WARNING "Could not set GATT table memory to UC!\n");
940*4882a593Smuzhiyun
941*4882a593Smuzhiyun bridge->gatt_table = (u32 __iomem *)table;
942*4882a593Smuzhiyun #else
943*4882a593Smuzhiyun bridge->gatt_table = ioremap(virt_to_phys(table),
944*4882a593Smuzhiyun (PAGE_SIZE * (1 << page_order)));
945*4882a593Smuzhiyun bridge->driver->cache_flush();
946*4882a593Smuzhiyun #endif
947*4882a593Smuzhiyun
948*4882a593Smuzhiyun if (bridge->gatt_table == NULL) {
949*4882a593Smuzhiyun for (page = virt_to_page(table); page <= virt_to_page(table_end); page++)
950*4882a593Smuzhiyun ClearPageReserved(page);
951*4882a593Smuzhiyun
952*4882a593Smuzhiyun free_gatt_pages(table, page_order);
953*4882a593Smuzhiyun
954*4882a593Smuzhiyun return -ENOMEM;
955*4882a593Smuzhiyun }
956*4882a593Smuzhiyun bridge->gatt_bus_addr = virt_to_phys(bridge->gatt_table_real);
957*4882a593Smuzhiyun
958*4882a593Smuzhiyun /* AK: bogus, should encode addresses > 4GB */
959*4882a593Smuzhiyun for (i = 0; i < num_entries; i++) {
960*4882a593Smuzhiyun writel(bridge->scratch_page, bridge->gatt_table+i);
961*4882a593Smuzhiyun readl(bridge->gatt_table+i); /* PCI Posting. */
962*4882a593Smuzhiyun }
963*4882a593Smuzhiyun
964*4882a593Smuzhiyun return 0;
965*4882a593Smuzhiyun }
966*4882a593Smuzhiyun EXPORT_SYMBOL(agp_generic_create_gatt_table);
967*4882a593Smuzhiyun
agp_generic_free_gatt_table(struct agp_bridge_data * bridge)968*4882a593Smuzhiyun int agp_generic_free_gatt_table(struct agp_bridge_data *bridge)
969*4882a593Smuzhiyun {
970*4882a593Smuzhiyun int page_order;
971*4882a593Smuzhiyun char *table, *table_end;
972*4882a593Smuzhiyun void *temp;
973*4882a593Smuzhiyun struct page *page;
974*4882a593Smuzhiyun
975*4882a593Smuzhiyun temp = bridge->current_size;
976*4882a593Smuzhiyun
977*4882a593Smuzhiyun switch (bridge->driver->size_type) {
978*4882a593Smuzhiyun case U8_APER_SIZE:
979*4882a593Smuzhiyun page_order = A_SIZE_8(temp)->page_order;
980*4882a593Smuzhiyun break;
981*4882a593Smuzhiyun case U16_APER_SIZE:
982*4882a593Smuzhiyun page_order = A_SIZE_16(temp)->page_order;
983*4882a593Smuzhiyun break;
984*4882a593Smuzhiyun case U32_APER_SIZE:
985*4882a593Smuzhiyun page_order = A_SIZE_32(temp)->page_order;
986*4882a593Smuzhiyun break;
987*4882a593Smuzhiyun case FIXED_APER_SIZE:
988*4882a593Smuzhiyun page_order = A_SIZE_FIX(temp)->page_order;
989*4882a593Smuzhiyun break;
990*4882a593Smuzhiyun case LVL2_APER_SIZE:
991*4882a593Smuzhiyun /* The generic routines can't deal with 2 level gatt's */
992*4882a593Smuzhiyun return -EINVAL;
993*4882a593Smuzhiyun default:
994*4882a593Smuzhiyun page_order = 0;
995*4882a593Smuzhiyun break;
996*4882a593Smuzhiyun }
997*4882a593Smuzhiyun
998*4882a593Smuzhiyun /* Do not worry about freeing memory, because if this is
999*4882a593Smuzhiyun * called, then all agp memory is deallocated and removed
1000*4882a593Smuzhiyun * from the table. */
1001*4882a593Smuzhiyun
1002*4882a593Smuzhiyun #ifdef CONFIG_X86
1003*4882a593Smuzhiyun set_memory_wb((unsigned long)bridge->gatt_table, 1 << page_order);
1004*4882a593Smuzhiyun #else
1005*4882a593Smuzhiyun iounmap(bridge->gatt_table);
1006*4882a593Smuzhiyun #endif
1007*4882a593Smuzhiyun table = (char *) bridge->gatt_table_real;
1008*4882a593Smuzhiyun table_end = table + ((PAGE_SIZE * (1 << page_order)) - 1);
1009*4882a593Smuzhiyun
1010*4882a593Smuzhiyun for (page = virt_to_page(table); page <= virt_to_page(table_end); page++)
1011*4882a593Smuzhiyun ClearPageReserved(page);
1012*4882a593Smuzhiyun
1013*4882a593Smuzhiyun free_gatt_pages(bridge->gatt_table_real, page_order);
1014*4882a593Smuzhiyun
1015*4882a593Smuzhiyun agp_gatt_table = NULL;
1016*4882a593Smuzhiyun bridge->gatt_table = NULL;
1017*4882a593Smuzhiyun bridge->gatt_table_real = NULL;
1018*4882a593Smuzhiyun bridge->gatt_bus_addr = 0;
1019*4882a593Smuzhiyun
1020*4882a593Smuzhiyun return 0;
1021*4882a593Smuzhiyun }
1022*4882a593Smuzhiyun EXPORT_SYMBOL(agp_generic_free_gatt_table);
1023*4882a593Smuzhiyun
1024*4882a593Smuzhiyun
agp_generic_insert_memory(struct agp_memory * mem,off_t pg_start,int type)1025*4882a593Smuzhiyun int agp_generic_insert_memory(struct agp_memory * mem, off_t pg_start, int type)
1026*4882a593Smuzhiyun {
1027*4882a593Smuzhiyun int num_entries;
1028*4882a593Smuzhiyun size_t i;
1029*4882a593Smuzhiyun off_t j;
1030*4882a593Smuzhiyun void *temp;
1031*4882a593Smuzhiyun struct agp_bridge_data *bridge;
1032*4882a593Smuzhiyun int mask_type;
1033*4882a593Smuzhiyun
1034*4882a593Smuzhiyun bridge = mem->bridge;
1035*4882a593Smuzhiyun if (!bridge)
1036*4882a593Smuzhiyun return -EINVAL;
1037*4882a593Smuzhiyun
1038*4882a593Smuzhiyun if (mem->page_count == 0)
1039*4882a593Smuzhiyun return 0;
1040*4882a593Smuzhiyun
1041*4882a593Smuzhiyun temp = bridge->current_size;
1042*4882a593Smuzhiyun
1043*4882a593Smuzhiyun switch (bridge->driver->size_type) {
1044*4882a593Smuzhiyun case U8_APER_SIZE:
1045*4882a593Smuzhiyun num_entries = A_SIZE_8(temp)->num_entries;
1046*4882a593Smuzhiyun break;
1047*4882a593Smuzhiyun case U16_APER_SIZE:
1048*4882a593Smuzhiyun num_entries = A_SIZE_16(temp)->num_entries;
1049*4882a593Smuzhiyun break;
1050*4882a593Smuzhiyun case U32_APER_SIZE:
1051*4882a593Smuzhiyun num_entries = A_SIZE_32(temp)->num_entries;
1052*4882a593Smuzhiyun break;
1053*4882a593Smuzhiyun case FIXED_APER_SIZE:
1054*4882a593Smuzhiyun num_entries = A_SIZE_FIX(temp)->num_entries;
1055*4882a593Smuzhiyun break;
1056*4882a593Smuzhiyun case LVL2_APER_SIZE:
1057*4882a593Smuzhiyun /* The generic routines can't deal with 2 level gatt's */
1058*4882a593Smuzhiyun return -EINVAL;
1059*4882a593Smuzhiyun default:
1060*4882a593Smuzhiyun num_entries = 0;
1061*4882a593Smuzhiyun break;
1062*4882a593Smuzhiyun }
1063*4882a593Smuzhiyun
1064*4882a593Smuzhiyun num_entries -= agp_memory_reserved/PAGE_SIZE;
1065*4882a593Smuzhiyun if (num_entries < 0) num_entries = 0;
1066*4882a593Smuzhiyun
1067*4882a593Smuzhiyun if (type != mem->type)
1068*4882a593Smuzhiyun return -EINVAL;
1069*4882a593Smuzhiyun
1070*4882a593Smuzhiyun mask_type = bridge->driver->agp_type_to_mask_type(bridge, type);
1071*4882a593Smuzhiyun if (mask_type != 0) {
1072*4882a593Smuzhiyun /* The generic routines know nothing of memory types */
1073*4882a593Smuzhiyun return -EINVAL;
1074*4882a593Smuzhiyun }
1075*4882a593Smuzhiyun
1076*4882a593Smuzhiyun if (((pg_start + mem->page_count) > num_entries) ||
1077*4882a593Smuzhiyun ((pg_start + mem->page_count) < pg_start))
1078*4882a593Smuzhiyun return -EINVAL;
1079*4882a593Smuzhiyun
1080*4882a593Smuzhiyun j = pg_start;
1081*4882a593Smuzhiyun
1082*4882a593Smuzhiyun while (j < (pg_start + mem->page_count)) {
1083*4882a593Smuzhiyun if (!PGE_EMPTY(bridge, readl(bridge->gatt_table+j)))
1084*4882a593Smuzhiyun return -EBUSY;
1085*4882a593Smuzhiyun j++;
1086*4882a593Smuzhiyun }
1087*4882a593Smuzhiyun
1088*4882a593Smuzhiyun if (!mem->is_flushed) {
1089*4882a593Smuzhiyun bridge->driver->cache_flush();
1090*4882a593Smuzhiyun mem->is_flushed = true;
1091*4882a593Smuzhiyun }
1092*4882a593Smuzhiyun
1093*4882a593Smuzhiyun for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
1094*4882a593Smuzhiyun writel(bridge->driver->mask_memory(bridge,
1095*4882a593Smuzhiyun page_to_phys(mem->pages[i]),
1096*4882a593Smuzhiyun mask_type),
1097*4882a593Smuzhiyun bridge->gatt_table+j);
1098*4882a593Smuzhiyun }
1099*4882a593Smuzhiyun readl(bridge->gatt_table+j-1); /* PCI Posting. */
1100*4882a593Smuzhiyun
1101*4882a593Smuzhiyun bridge->driver->tlb_flush(mem);
1102*4882a593Smuzhiyun return 0;
1103*4882a593Smuzhiyun }
1104*4882a593Smuzhiyun EXPORT_SYMBOL(agp_generic_insert_memory);
1105*4882a593Smuzhiyun
1106*4882a593Smuzhiyun
agp_generic_remove_memory(struct agp_memory * mem,off_t pg_start,int type)1107*4882a593Smuzhiyun int agp_generic_remove_memory(struct agp_memory *mem, off_t pg_start, int type)
1108*4882a593Smuzhiyun {
1109*4882a593Smuzhiyun size_t i;
1110*4882a593Smuzhiyun struct agp_bridge_data *bridge;
1111*4882a593Smuzhiyun int mask_type, num_entries;
1112*4882a593Smuzhiyun
1113*4882a593Smuzhiyun bridge = mem->bridge;
1114*4882a593Smuzhiyun if (!bridge)
1115*4882a593Smuzhiyun return -EINVAL;
1116*4882a593Smuzhiyun
1117*4882a593Smuzhiyun if (mem->page_count == 0)
1118*4882a593Smuzhiyun return 0;
1119*4882a593Smuzhiyun
1120*4882a593Smuzhiyun if (type != mem->type)
1121*4882a593Smuzhiyun return -EINVAL;
1122*4882a593Smuzhiyun
1123*4882a593Smuzhiyun num_entries = agp_num_entries();
1124*4882a593Smuzhiyun if (((pg_start + mem->page_count) > num_entries) ||
1125*4882a593Smuzhiyun ((pg_start + mem->page_count) < pg_start))
1126*4882a593Smuzhiyun return -EINVAL;
1127*4882a593Smuzhiyun
1128*4882a593Smuzhiyun mask_type = bridge->driver->agp_type_to_mask_type(bridge, type);
1129*4882a593Smuzhiyun if (mask_type != 0) {
1130*4882a593Smuzhiyun /* The generic routines know nothing of memory types */
1131*4882a593Smuzhiyun return -EINVAL;
1132*4882a593Smuzhiyun }
1133*4882a593Smuzhiyun
1134*4882a593Smuzhiyun /* AK: bogus, should encode addresses > 4GB */
1135*4882a593Smuzhiyun for (i = pg_start; i < (mem->page_count + pg_start); i++) {
1136*4882a593Smuzhiyun writel(bridge->scratch_page, bridge->gatt_table+i);
1137*4882a593Smuzhiyun }
1138*4882a593Smuzhiyun readl(bridge->gatt_table+i-1); /* PCI Posting. */
1139*4882a593Smuzhiyun
1140*4882a593Smuzhiyun bridge->driver->tlb_flush(mem);
1141*4882a593Smuzhiyun return 0;
1142*4882a593Smuzhiyun }
1143*4882a593Smuzhiyun EXPORT_SYMBOL(agp_generic_remove_memory);
1144*4882a593Smuzhiyun
agp_generic_alloc_by_type(size_t page_count,int type)1145*4882a593Smuzhiyun struct agp_memory *agp_generic_alloc_by_type(size_t page_count, int type)
1146*4882a593Smuzhiyun {
1147*4882a593Smuzhiyun return NULL;
1148*4882a593Smuzhiyun }
1149*4882a593Smuzhiyun EXPORT_SYMBOL(agp_generic_alloc_by_type);
1150*4882a593Smuzhiyun
agp_generic_free_by_type(struct agp_memory * curr)1151*4882a593Smuzhiyun void agp_generic_free_by_type(struct agp_memory *curr)
1152*4882a593Smuzhiyun {
1153*4882a593Smuzhiyun agp_free_page_array(curr);
1154*4882a593Smuzhiyun agp_free_key(curr->key);
1155*4882a593Smuzhiyun kfree(curr);
1156*4882a593Smuzhiyun }
1157*4882a593Smuzhiyun EXPORT_SYMBOL(agp_generic_free_by_type);
1158*4882a593Smuzhiyun
agp_generic_alloc_user(size_t page_count,int type)1159*4882a593Smuzhiyun struct agp_memory *agp_generic_alloc_user(size_t page_count, int type)
1160*4882a593Smuzhiyun {
1161*4882a593Smuzhiyun struct agp_memory *new;
1162*4882a593Smuzhiyun int i;
1163*4882a593Smuzhiyun int pages;
1164*4882a593Smuzhiyun
1165*4882a593Smuzhiyun pages = (page_count + ENTRIES_PER_PAGE - 1) / ENTRIES_PER_PAGE;
1166*4882a593Smuzhiyun new = agp_create_user_memory(page_count);
1167*4882a593Smuzhiyun if (new == NULL)
1168*4882a593Smuzhiyun return NULL;
1169*4882a593Smuzhiyun
1170*4882a593Smuzhiyun for (i = 0; i < page_count; i++)
1171*4882a593Smuzhiyun new->pages[i] = NULL;
1172*4882a593Smuzhiyun new->page_count = 0;
1173*4882a593Smuzhiyun new->type = type;
1174*4882a593Smuzhiyun new->num_scratch_pages = pages;
1175*4882a593Smuzhiyun
1176*4882a593Smuzhiyun return new;
1177*4882a593Smuzhiyun }
1178*4882a593Smuzhiyun EXPORT_SYMBOL(agp_generic_alloc_user);
1179*4882a593Smuzhiyun
1180*4882a593Smuzhiyun /*
1181*4882a593Smuzhiyun * Basic Page Allocation Routines -
1182*4882a593Smuzhiyun * These routines handle page allocation and by default they reserve the allocated
1183*4882a593Smuzhiyun * memory. They also handle incrementing the current_memory_agp value, Which is checked
1184*4882a593Smuzhiyun * against a maximum value.
1185*4882a593Smuzhiyun */
1186*4882a593Smuzhiyun
agp_generic_alloc_pages(struct agp_bridge_data * bridge,struct agp_memory * mem,size_t num_pages)1187*4882a593Smuzhiyun int agp_generic_alloc_pages(struct agp_bridge_data *bridge, struct agp_memory *mem, size_t num_pages)
1188*4882a593Smuzhiyun {
1189*4882a593Smuzhiyun struct page * page;
1190*4882a593Smuzhiyun int i, ret = -ENOMEM;
1191*4882a593Smuzhiyun
1192*4882a593Smuzhiyun for (i = 0; i < num_pages; i++) {
1193*4882a593Smuzhiyun page = alloc_page(GFP_KERNEL | GFP_DMA32 | __GFP_ZERO);
1194*4882a593Smuzhiyun /* agp_free_memory() needs gart address */
1195*4882a593Smuzhiyun if (page == NULL)
1196*4882a593Smuzhiyun goto out;
1197*4882a593Smuzhiyun
1198*4882a593Smuzhiyun #ifndef CONFIG_X86
1199*4882a593Smuzhiyun map_page_into_agp(page);
1200*4882a593Smuzhiyun #endif
1201*4882a593Smuzhiyun get_page(page);
1202*4882a593Smuzhiyun atomic_inc(&agp_bridge->current_memory_agp);
1203*4882a593Smuzhiyun
1204*4882a593Smuzhiyun mem->pages[i] = page;
1205*4882a593Smuzhiyun mem->page_count++;
1206*4882a593Smuzhiyun }
1207*4882a593Smuzhiyun
1208*4882a593Smuzhiyun #ifdef CONFIG_X86
1209*4882a593Smuzhiyun set_pages_array_uc(mem->pages, num_pages);
1210*4882a593Smuzhiyun #endif
1211*4882a593Smuzhiyun ret = 0;
1212*4882a593Smuzhiyun out:
1213*4882a593Smuzhiyun return ret;
1214*4882a593Smuzhiyun }
1215*4882a593Smuzhiyun EXPORT_SYMBOL(agp_generic_alloc_pages);
1216*4882a593Smuzhiyun
agp_generic_alloc_page(struct agp_bridge_data * bridge)1217*4882a593Smuzhiyun struct page *agp_generic_alloc_page(struct agp_bridge_data *bridge)
1218*4882a593Smuzhiyun {
1219*4882a593Smuzhiyun struct page * page;
1220*4882a593Smuzhiyun
1221*4882a593Smuzhiyun page = alloc_page(GFP_KERNEL | GFP_DMA32 | __GFP_ZERO);
1222*4882a593Smuzhiyun if (page == NULL)
1223*4882a593Smuzhiyun return NULL;
1224*4882a593Smuzhiyun
1225*4882a593Smuzhiyun map_page_into_agp(page);
1226*4882a593Smuzhiyun
1227*4882a593Smuzhiyun get_page(page);
1228*4882a593Smuzhiyun atomic_inc(&agp_bridge->current_memory_agp);
1229*4882a593Smuzhiyun return page;
1230*4882a593Smuzhiyun }
1231*4882a593Smuzhiyun EXPORT_SYMBOL(agp_generic_alloc_page);
1232*4882a593Smuzhiyun
agp_generic_destroy_pages(struct agp_memory * mem)1233*4882a593Smuzhiyun void agp_generic_destroy_pages(struct agp_memory *mem)
1234*4882a593Smuzhiyun {
1235*4882a593Smuzhiyun int i;
1236*4882a593Smuzhiyun struct page *page;
1237*4882a593Smuzhiyun
1238*4882a593Smuzhiyun if (!mem)
1239*4882a593Smuzhiyun return;
1240*4882a593Smuzhiyun
1241*4882a593Smuzhiyun #ifdef CONFIG_X86
1242*4882a593Smuzhiyun set_pages_array_wb(mem->pages, mem->page_count);
1243*4882a593Smuzhiyun #endif
1244*4882a593Smuzhiyun
1245*4882a593Smuzhiyun for (i = 0; i < mem->page_count; i++) {
1246*4882a593Smuzhiyun page = mem->pages[i];
1247*4882a593Smuzhiyun
1248*4882a593Smuzhiyun #ifndef CONFIG_X86
1249*4882a593Smuzhiyun unmap_page_from_agp(page);
1250*4882a593Smuzhiyun #endif
1251*4882a593Smuzhiyun put_page(page);
1252*4882a593Smuzhiyun __free_page(page);
1253*4882a593Smuzhiyun atomic_dec(&agp_bridge->current_memory_agp);
1254*4882a593Smuzhiyun mem->pages[i] = NULL;
1255*4882a593Smuzhiyun }
1256*4882a593Smuzhiyun }
1257*4882a593Smuzhiyun EXPORT_SYMBOL(agp_generic_destroy_pages);
1258*4882a593Smuzhiyun
agp_generic_destroy_page(struct page * page,int flags)1259*4882a593Smuzhiyun void agp_generic_destroy_page(struct page *page, int flags)
1260*4882a593Smuzhiyun {
1261*4882a593Smuzhiyun if (page == NULL)
1262*4882a593Smuzhiyun return;
1263*4882a593Smuzhiyun
1264*4882a593Smuzhiyun if (flags & AGP_PAGE_DESTROY_UNMAP)
1265*4882a593Smuzhiyun unmap_page_from_agp(page);
1266*4882a593Smuzhiyun
1267*4882a593Smuzhiyun if (flags & AGP_PAGE_DESTROY_FREE) {
1268*4882a593Smuzhiyun put_page(page);
1269*4882a593Smuzhiyun __free_page(page);
1270*4882a593Smuzhiyun atomic_dec(&agp_bridge->current_memory_agp);
1271*4882a593Smuzhiyun }
1272*4882a593Smuzhiyun }
1273*4882a593Smuzhiyun EXPORT_SYMBOL(agp_generic_destroy_page);
1274*4882a593Smuzhiyun
1275*4882a593Smuzhiyun /* End Basic Page Allocation Routines */
1276*4882a593Smuzhiyun
1277*4882a593Smuzhiyun
1278*4882a593Smuzhiyun /**
1279*4882a593Smuzhiyun * agp_enable - initialise the agp point-to-point connection.
1280*4882a593Smuzhiyun *
1281*4882a593Smuzhiyun * @bridge: an agp_bridge_data struct allocated for the AGP host bridge.
1282*4882a593Smuzhiyun * @mode: agp mode register value to configure with.
1283*4882a593Smuzhiyun */
agp_enable(struct agp_bridge_data * bridge,u32 mode)1284*4882a593Smuzhiyun void agp_enable(struct agp_bridge_data *bridge, u32 mode)
1285*4882a593Smuzhiyun {
1286*4882a593Smuzhiyun if (!bridge)
1287*4882a593Smuzhiyun return;
1288*4882a593Smuzhiyun bridge->driver->agp_enable(bridge, mode);
1289*4882a593Smuzhiyun }
1290*4882a593Smuzhiyun EXPORT_SYMBOL(agp_enable);
1291*4882a593Smuzhiyun
1292*4882a593Smuzhiyun /* When we remove the global variable agp_bridge from all drivers
1293*4882a593Smuzhiyun * then agp_alloc_bridge and agp_generic_find_bridge need to be updated
1294*4882a593Smuzhiyun */
1295*4882a593Smuzhiyun
agp_generic_find_bridge(struct pci_dev * pdev)1296*4882a593Smuzhiyun struct agp_bridge_data *agp_generic_find_bridge(struct pci_dev *pdev)
1297*4882a593Smuzhiyun {
1298*4882a593Smuzhiyun if (list_empty(&agp_bridges))
1299*4882a593Smuzhiyun return NULL;
1300*4882a593Smuzhiyun
1301*4882a593Smuzhiyun return agp_bridge;
1302*4882a593Smuzhiyun }
1303*4882a593Smuzhiyun
ipi_handler(void * null)1304*4882a593Smuzhiyun static void ipi_handler(void *null)
1305*4882a593Smuzhiyun {
1306*4882a593Smuzhiyun flush_agp_cache();
1307*4882a593Smuzhiyun }
1308*4882a593Smuzhiyun
global_cache_flush(void)1309*4882a593Smuzhiyun void global_cache_flush(void)
1310*4882a593Smuzhiyun {
1311*4882a593Smuzhiyun on_each_cpu(ipi_handler, NULL, 1);
1312*4882a593Smuzhiyun }
1313*4882a593Smuzhiyun EXPORT_SYMBOL(global_cache_flush);
1314*4882a593Smuzhiyun
agp_generic_mask_memory(struct agp_bridge_data * bridge,dma_addr_t addr,int type)1315*4882a593Smuzhiyun unsigned long agp_generic_mask_memory(struct agp_bridge_data *bridge,
1316*4882a593Smuzhiyun dma_addr_t addr, int type)
1317*4882a593Smuzhiyun {
1318*4882a593Smuzhiyun /* memory type is ignored in the generic routine */
1319*4882a593Smuzhiyun if (bridge->driver->masks)
1320*4882a593Smuzhiyun return addr | bridge->driver->masks[0].mask;
1321*4882a593Smuzhiyun else
1322*4882a593Smuzhiyun return addr;
1323*4882a593Smuzhiyun }
1324*4882a593Smuzhiyun EXPORT_SYMBOL(agp_generic_mask_memory);
1325*4882a593Smuzhiyun
agp_generic_type_to_mask_type(struct agp_bridge_data * bridge,int type)1326*4882a593Smuzhiyun int agp_generic_type_to_mask_type(struct agp_bridge_data *bridge,
1327*4882a593Smuzhiyun int type)
1328*4882a593Smuzhiyun {
1329*4882a593Smuzhiyun if (type >= AGP_USER_TYPES)
1330*4882a593Smuzhiyun return 0;
1331*4882a593Smuzhiyun return type;
1332*4882a593Smuzhiyun }
1333*4882a593Smuzhiyun EXPORT_SYMBOL(agp_generic_type_to_mask_type);
1334*4882a593Smuzhiyun
1335*4882a593Smuzhiyun /*
1336*4882a593Smuzhiyun * These functions are implemented according to the AGPv3 spec,
1337*4882a593Smuzhiyun * which covers implementation details that had previously been
1338*4882a593Smuzhiyun * left open.
1339*4882a593Smuzhiyun */
1340*4882a593Smuzhiyun
agp3_generic_fetch_size(void)1341*4882a593Smuzhiyun int agp3_generic_fetch_size(void)
1342*4882a593Smuzhiyun {
1343*4882a593Smuzhiyun u16 temp_size;
1344*4882a593Smuzhiyun int i;
1345*4882a593Smuzhiyun struct aper_size_info_16 *values;
1346*4882a593Smuzhiyun
1347*4882a593Smuzhiyun pci_read_config_word(agp_bridge->dev, agp_bridge->capndx+AGPAPSIZE, &temp_size);
1348*4882a593Smuzhiyun values = A_SIZE_16(agp_bridge->driver->aperture_sizes);
1349*4882a593Smuzhiyun
1350*4882a593Smuzhiyun for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
1351*4882a593Smuzhiyun if (temp_size == values[i].size_value) {
1352*4882a593Smuzhiyun agp_bridge->previous_size =
1353*4882a593Smuzhiyun agp_bridge->current_size = (void *) (values + i);
1354*4882a593Smuzhiyun
1355*4882a593Smuzhiyun agp_bridge->aperture_size_idx = i;
1356*4882a593Smuzhiyun return values[i].size;
1357*4882a593Smuzhiyun }
1358*4882a593Smuzhiyun }
1359*4882a593Smuzhiyun return 0;
1360*4882a593Smuzhiyun }
1361*4882a593Smuzhiyun EXPORT_SYMBOL(agp3_generic_fetch_size);
1362*4882a593Smuzhiyun
agp3_generic_tlbflush(struct agp_memory * mem)1363*4882a593Smuzhiyun void agp3_generic_tlbflush(struct agp_memory *mem)
1364*4882a593Smuzhiyun {
1365*4882a593Smuzhiyun u32 ctrl;
1366*4882a593Smuzhiyun pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, &ctrl);
1367*4882a593Smuzhiyun pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, ctrl & ~AGPCTRL_GTLBEN);
1368*4882a593Smuzhiyun pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, ctrl);
1369*4882a593Smuzhiyun }
1370*4882a593Smuzhiyun EXPORT_SYMBOL(agp3_generic_tlbflush);
1371*4882a593Smuzhiyun
agp3_generic_configure(void)1372*4882a593Smuzhiyun int agp3_generic_configure(void)
1373*4882a593Smuzhiyun {
1374*4882a593Smuzhiyun u32 temp;
1375*4882a593Smuzhiyun struct aper_size_info_16 *current_size;
1376*4882a593Smuzhiyun
1377*4882a593Smuzhiyun current_size = A_SIZE_16(agp_bridge->current_size);
1378*4882a593Smuzhiyun
1379*4882a593Smuzhiyun agp_bridge->gart_bus_addr = pci_bus_address(agp_bridge->dev,
1380*4882a593Smuzhiyun AGP_APERTURE_BAR);
1381*4882a593Smuzhiyun
1382*4882a593Smuzhiyun /* set aperture size */
1383*4882a593Smuzhiyun pci_write_config_word(agp_bridge->dev, agp_bridge->capndx+AGPAPSIZE, current_size->size_value);
1384*4882a593Smuzhiyun /* set gart pointer */
1385*4882a593Smuzhiyun pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPGARTLO, agp_bridge->gatt_bus_addr);
1386*4882a593Smuzhiyun /* enable aperture and GTLB */
1387*4882a593Smuzhiyun pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, &temp);
1388*4882a593Smuzhiyun pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, temp | AGPCTRL_APERENB | AGPCTRL_GTLBEN);
1389*4882a593Smuzhiyun return 0;
1390*4882a593Smuzhiyun }
1391*4882a593Smuzhiyun EXPORT_SYMBOL(agp3_generic_configure);
1392*4882a593Smuzhiyun
agp3_generic_cleanup(void)1393*4882a593Smuzhiyun void agp3_generic_cleanup(void)
1394*4882a593Smuzhiyun {
1395*4882a593Smuzhiyun u32 ctrl;
1396*4882a593Smuzhiyun pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, &ctrl);
1397*4882a593Smuzhiyun pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, ctrl & ~AGPCTRL_APERENB);
1398*4882a593Smuzhiyun }
1399*4882a593Smuzhiyun EXPORT_SYMBOL(agp3_generic_cleanup);
1400*4882a593Smuzhiyun
1401*4882a593Smuzhiyun const struct aper_size_info_16 agp3_generic_sizes[AGP_GENERIC_SIZES_ENTRIES] =
1402*4882a593Smuzhiyun {
1403*4882a593Smuzhiyun {4096, 1048576, 10,0x000},
1404*4882a593Smuzhiyun {2048, 524288, 9, 0x800},
1405*4882a593Smuzhiyun {1024, 262144, 8, 0xc00},
1406*4882a593Smuzhiyun { 512, 131072, 7, 0xe00},
1407*4882a593Smuzhiyun { 256, 65536, 6, 0xf00},
1408*4882a593Smuzhiyun { 128, 32768, 5, 0xf20},
1409*4882a593Smuzhiyun { 64, 16384, 4, 0xf30},
1410*4882a593Smuzhiyun { 32, 8192, 3, 0xf38},
1411*4882a593Smuzhiyun { 16, 4096, 2, 0xf3c},
1412*4882a593Smuzhiyun { 8, 2048, 1, 0xf3e},
1413*4882a593Smuzhiyun { 4, 1024, 0, 0xf3f}
1414*4882a593Smuzhiyun };
1415*4882a593Smuzhiyun EXPORT_SYMBOL(agp3_generic_sizes);
1416*4882a593Smuzhiyun
1417