xref: /OK3568_Linux_fs/kernel/drivers/char/agp/ati-agp.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * ATi AGPGART routines.
3*4882a593Smuzhiyun  */
4*4882a593Smuzhiyun 
5*4882a593Smuzhiyun #include <linux/types.h>
6*4882a593Smuzhiyun #include <linux/module.h>
7*4882a593Smuzhiyun #include <linux/pci.h>
8*4882a593Smuzhiyun #include <linux/init.h>
9*4882a593Smuzhiyun #include <linux/string.h>
10*4882a593Smuzhiyun #include <linux/slab.h>
11*4882a593Smuzhiyun #include <linux/agp_backend.h>
12*4882a593Smuzhiyun #include <asm/agp.h>
13*4882a593Smuzhiyun #include <asm/set_memory.h>
14*4882a593Smuzhiyun #include "agp.h"
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #define ATI_GART_MMBASE_BAR	1
17*4882a593Smuzhiyun #define ATI_RS100_APSIZE	0xac
18*4882a593Smuzhiyun #define ATI_RS100_IG_AGPMODE	0xb0
19*4882a593Smuzhiyun #define ATI_RS300_APSIZE	0xf8
20*4882a593Smuzhiyun #define ATI_RS300_IG_AGPMODE	0xfc
21*4882a593Smuzhiyun #define ATI_GART_FEATURE_ID		0x00
22*4882a593Smuzhiyun #define ATI_GART_BASE			0x04
23*4882a593Smuzhiyun #define ATI_GART_CACHE_SZBASE		0x08
24*4882a593Smuzhiyun #define ATI_GART_CACHE_CNTRL		0x0c
25*4882a593Smuzhiyun #define ATI_GART_CACHE_ENTRY_CNTRL	0x10
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun static const struct aper_size_info_lvl2 ati_generic_sizes[7] =
29*4882a593Smuzhiyun {
30*4882a593Smuzhiyun 	{2048, 524288, 0x0000000c},
31*4882a593Smuzhiyun 	{1024, 262144, 0x0000000a},
32*4882a593Smuzhiyun 	{512, 131072, 0x00000008},
33*4882a593Smuzhiyun 	{256, 65536, 0x00000006},
34*4882a593Smuzhiyun 	{128, 32768, 0x00000004},
35*4882a593Smuzhiyun 	{64, 16384, 0x00000002},
36*4882a593Smuzhiyun 	{32, 8192, 0x00000000}
37*4882a593Smuzhiyun };
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun static struct gatt_mask ati_generic_masks[] =
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun 	{ .mask = 1, .type = 0}
42*4882a593Smuzhiyun };
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun struct ati_page_map {
46*4882a593Smuzhiyun 	unsigned long *real;
47*4882a593Smuzhiyun 	unsigned long __iomem *remapped;
48*4882a593Smuzhiyun };
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun static struct _ati_generic_private {
51*4882a593Smuzhiyun 	volatile u8 __iomem *registers;
52*4882a593Smuzhiyun 	struct ati_page_map **gatt_pages;
53*4882a593Smuzhiyun 	int num_tables;
54*4882a593Smuzhiyun } ati_generic_private;
55*4882a593Smuzhiyun 
ati_create_page_map(struct ati_page_map * page_map)56*4882a593Smuzhiyun static int ati_create_page_map(struct ati_page_map *page_map)
57*4882a593Smuzhiyun {
58*4882a593Smuzhiyun 	int i, err = 0;
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun 	page_map->real = (unsigned long *) __get_free_page(GFP_KERNEL);
61*4882a593Smuzhiyun 	if (page_map->real == NULL)
62*4882a593Smuzhiyun 		return -ENOMEM;
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun 	set_memory_uc((unsigned long)page_map->real, 1);
65*4882a593Smuzhiyun 	err = map_page_into_agp(virt_to_page(page_map->real));
66*4882a593Smuzhiyun 	page_map->remapped = page_map->real;
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun 	for (i = 0; i < PAGE_SIZE / sizeof(unsigned long); i++) {
69*4882a593Smuzhiyun 		writel(agp_bridge->scratch_page, page_map->remapped+i);
70*4882a593Smuzhiyun 		readl(page_map->remapped+i);	/* PCI Posting. */
71*4882a593Smuzhiyun 	}
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun 	return 0;
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun 
ati_free_page_map(struct ati_page_map * page_map)77*4882a593Smuzhiyun static void ati_free_page_map(struct ati_page_map *page_map)
78*4882a593Smuzhiyun {
79*4882a593Smuzhiyun 	unmap_page_from_agp(virt_to_page(page_map->real));
80*4882a593Smuzhiyun 	set_memory_wb((unsigned long)page_map->real, 1);
81*4882a593Smuzhiyun 	free_page((unsigned long) page_map->real);
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun 
ati_free_gatt_pages(void)85*4882a593Smuzhiyun static void ati_free_gatt_pages(void)
86*4882a593Smuzhiyun {
87*4882a593Smuzhiyun 	int i;
88*4882a593Smuzhiyun 	struct ati_page_map **tables;
89*4882a593Smuzhiyun 	struct ati_page_map *entry;
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun 	tables = ati_generic_private.gatt_pages;
92*4882a593Smuzhiyun 	for (i = 0; i < ati_generic_private.num_tables; i++) {
93*4882a593Smuzhiyun 		entry = tables[i];
94*4882a593Smuzhiyun 		if (entry != NULL) {
95*4882a593Smuzhiyun 			if (entry->real != NULL)
96*4882a593Smuzhiyun 				ati_free_page_map(entry);
97*4882a593Smuzhiyun 			kfree(entry);
98*4882a593Smuzhiyun 		}
99*4882a593Smuzhiyun 	}
100*4882a593Smuzhiyun 	kfree(tables);
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun 
ati_create_gatt_pages(int nr_tables)104*4882a593Smuzhiyun static int ati_create_gatt_pages(int nr_tables)
105*4882a593Smuzhiyun {
106*4882a593Smuzhiyun 	struct ati_page_map **tables;
107*4882a593Smuzhiyun 	struct ati_page_map *entry;
108*4882a593Smuzhiyun 	int retval = 0;
109*4882a593Smuzhiyun 	int i;
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun 	tables = kcalloc(nr_tables + 1, sizeof(struct ati_page_map *),
112*4882a593Smuzhiyun 			 GFP_KERNEL);
113*4882a593Smuzhiyun 	if (tables == NULL)
114*4882a593Smuzhiyun 		return -ENOMEM;
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun 	for (i = 0; i < nr_tables; i++) {
117*4882a593Smuzhiyun 		entry = kzalloc(sizeof(struct ati_page_map), GFP_KERNEL);
118*4882a593Smuzhiyun 		tables[i] = entry;
119*4882a593Smuzhiyun 		if (entry == NULL) {
120*4882a593Smuzhiyun 			retval = -ENOMEM;
121*4882a593Smuzhiyun 			break;
122*4882a593Smuzhiyun 		}
123*4882a593Smuzhiyun 		retval = ati_create_page_map(entry);
124*4882a593Smuzhiyun 		if (retval != 0)
125*4882a593Smuzhiyun 			break;
126*4882a593Smuzhiyun 	}
127*4882a593Smuzhiyun 	ati_generic_private.num_tables = i;
128*4882a593Smuzhiyun 	ati_generic_private.gatt_pages = tables;
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun 	if (retval != 0)
131*4882a593Smuzhiyun 		ati_free_gatt_pages();
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun 	return retval;
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun 
is_r200(void)136*4882a593Smuzhiyun static int is_r200(void)
137*4882a593Smuzhiyun {
138*4882a593Smuzhiyun 	if ((agp_bridge->dev->device == PCI_DEVICE_ID_ATI_RS100) ||
139*4882a593Smuzhiyun 	    (agp_bridge->dev->device == PCI_DEVICE_ID_ATI_RS200) ||
140*4882a593Smuzhiyun 	    (agp_bridge->dev->device == PCI_DEVICE_ID_ATI_RS200_B) ||
141*4882a593Smuzhiyun 	    (agp_bridge->dev->device == PCI_DEVICE_ID_ATI_RS250))
142*4882a593Smuzhiyun 		return 1;
143*4882a593Smuzhiyun 	return 0;
144*4882a593Smuzhiyun }
145*4882a593Smuzhiyun 
ati_fetch_size(void)146*4882a593Smuzhiyun static int ati_fetch_size(void)
147*4882a593Smuzhiyun {
148*4882a593Smuzhiyun 	int i;
149*4882a593Smuzhiyun 	u32 temp;
150*4882a593Smuzhiyun 	struct aper_size_info_lvl2 *values;
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun 	if (is_r200())
153*4882a593Smuzhiyun 		pci_read_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, &temp);
154*4882a593Smuzhiyun 	else
155*4882a593Smuzhiyun 		pci_read_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, &temp);
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun 	temp = (temp & 0x0000000e);
158*4882a593Smuzhiyun 	values = A_SIZE_LVL2(agp_bridge->driver->aperture_sizes);
159*4882a593Smuzhiyun 	for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
160*4882a593Smuzhiyun 		if (temp == values[i].size_value) {
161*4882a593Smuzhiyun 			agp_bridge->previous_size =
162*4882a593Smuzhiyun 			    agp_bridge->current_size = (void *) (values + i);
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun 			agp_bridge->aperture_size_idx = i;
165*4882a593Smuzhiyun 			return values[i].size;
166*4882a593Smuzhiyun 		}
167*4882a593Smuzhiyun 	}
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun 	return 0;
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun 
ati_tlbflush(struct agp_memory * mem)172*4882a593Smuzhiyun static void ati_tlbflush(struct agp_memory * mem)
173*4882a593Smuzhiyun {
174*4882a593Smuzhiyun 	writel(1, ati_generic_private.registers+ATI_GART_CACHE_CNTRL);
175*4882a593Smuzhiyun 	readl(ati_generic_private.registers+ATI_GART_CACHE_CNTRL);	/* PCI Posting. */
176*4882a593Smuzhiyun }
177*4882a593Smuzhiyun 
ati_cleanup(void)178*4882a593Smuzhiyun static void ati_cleanup(void)
179*4882a593Smuzhiyun {
180*4882a593Smuzhiyun 	struct aper_size_info_lvl2 *previous_size;
181*4882a593Smuzhiyun 	u32 temp;
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun 	previous_size = A_SIZE_LVL2(agp_bridge->previous_size);
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun 	/* Write back the previous size and disable gart translation */
186*4882a593Smuzhiyun 	if (is_r200()) {
187*4882a593Smuzhiyun 		pci_read_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, &temp);
188*4882a593Smuzhiyun 		temp = ((temp & ~(0x0000000f)) | previous_size->size_value);
189*4882a593Smuzhiyun 		pci_write_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, temp);
190*4882a593Smuzhiyun 	} else {
191*4882a593Smuzhiyun 		pci_read_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, &temp);
192*4882a593Smuzhiyun 		temp = ((temp & ~(0x0000000f)) | previous_size->size_value);
193*4882a593Smuzhiyun 		pci_write_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, temp);
194*4882a593Smuzhiyun 	}
195*4882a593Smuzhiyun 	iounmap((volatile u8 __iomem *)ati_generic_private.registers);
196*4882a593Smuzhiyun }
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun 
ati_configure(void)199*4882a593Smuzhiyun static int ati_configure(void)
200*4882a593Smuzhiyun {
201*4882a593Smuzhiyun 	phys_addr_t reg;
202*4882a593Smuzhiyun 	u32 temp;
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun 	/* Get the memory mapped registers */
205*4882a593Smuzhiyun 	reg = pci_resource_start(agp_bridge->dev, ATI_GART_MMBASE_BAR);
206*4882a593Smuzhiyun 	ati_generic_private.registers = (volatile u8 __iomem *) ioremap(reg, 4096);
207*4882a593Smuzhiyun 
208*4882a593Smuzhiyun 	if (!ati_generic_private.registers)
209*4882a593Smuzhiyun 		return -ENOMEM;
210*4882a593Smuzhiyun 
211*4882a593Smuzhiyun 	if (is_r200())
212*4882a593Smuzhiyun 		pci_write_config_dword(agp_bridge->dev, ATI_RS100_IG_AGPMODE, 0x20000);
213*4882a593Smuzhiyun 	else
214*4882a593Smuzhiyun 		pci_write_config_dword(agp_bridge->dev, ATI_RS300_IG_AGPMODE, 0x20000);
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun 	/* address to map to */
217*4882a593Smuzhiyun 	/*
218*4882a593Smuzhiyun 	agp_bridge.gart_bus_addr = pci_bus_address(agp_bridge.dev,
219*4882a593Smuzhiyun 						   AGP_APERTURE_BAR);
220*4882a593Smuzhiyun 	printk(KERN_INFO PFX "IGP320 gart_bus_addr: %x\n", agp_bridge.gart_bus_addr);
221*4882a593Smuzhiyun 	*/
222*4882a593Smuzhiyun 	writel(0x60000, ati_generic_private.registers+ATI_GART_FEATURE_ID);
223*4882a593Smuzhiyun 	readl(ati_generic_private.registers+ATI_GART_FEATURE_ID);	/* PCI Posting.*/
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun 	/* SIGNALED_SYSTEM_ERROR @ NB_STATUS */
226*4882a593Smuzhiyun 	pci_read_config_dword(agp_bridge->dev, PCI_COMMAND, &temp);
227*4882a593Smuzhiyun 	pci_write_config_dword(agp_bridge->dev, PCI_COMMAND, temp | (1<<14));
228*4882a593Smuzhiyun 
229*4882a593Smuzhiyun 	/* Write out the address of the gatt table */
230*4882a593Smuzhiyun 	writel(agp_bridge->gatt_bus_addr, ati_generic_private.registers+ATI_GART_BASE);
231*4882a593Smuzhiyun 	readl(ati_generic_private.registers+ATI_GART_BASE);	/* PCI Posting. */
232*4882a593Smuzhiyun 
233*4882a593Smuzhiyun 	return 0;
234*4882a593Smuzhiyun }
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun #ifdef CONFIG_PM
agp_ati_suspend(struct pci_dev * dev,pm_message_t state)238*4882a593Smuzhiyun static int agp_ati_suspend(struct pci_dev *dev, pm_message_t state)
239*4882a593Smuzhiyun {
240*4882a593Smuzhiyun 	pci_save_state(dev);
241*4882a593Smuzhiyun 	pci_set_power_state(dev, PCI_D3hot);
242*4882a593Smuzhiyun 
243*4882a593Smuzhiyun 	return 0;
244*4882a593Smuzhiyun }
245*4882a593Smuzhiyun 
agp_ati_resume(struct pci_dev * dev)246*4882a593Smuzhiyun static int agp_ati_resume(struct pci_dev *dev)
247*4882a593Smuzhiyun {
248*4882a593Smuzhiyun 	pci_set_power_state(dev, PCI_D0);
249*4882a593Smuzhiyun 	pci_restore_state(dev);
250*4882a593Smuzhiyun 
251*4882a593Smuzhiyun 	return ati_configure();
252*4882a593Smuzhiyun }
253*4882a593Smuzhiyun #endif
254*4882a593Smuzhiyun 
255*4882a593Smuzhiyun /*
256*4882a593Smuzhiyun  *Since we don't need contiguous memory we just try
257*4882a593Smuzhiyun  * to get the gatt table once
258*4882a593Smuzhiyun  */
259*4882a593Smuzhiyun 
260*4882a593Smuzhiyun #define GET_PAGE_DIR_OFF(addr) (addr >> 22)
261*4882a593Smuzhiyun #define GET_PAGE_DIR_IDX(addr) (GET_PAGE_DIR_OFF(addr) - \
262*4882a593Smuzhiyun 	GET_PAGE_DIR_OFF(agp_bridge->gart_bus_addr))
263*4882a593Smuzhiyun #define GET_GATT_OFF(addr) ((addr & 0x003ff000) >> 12)
264*4882a593Smuzhiyun #undef  GET_GATT
265*4882a593Smuzhiyun #define GET_GATT(addr) (ati_generic_private.gatt_pages[\
266*4882a593Smuzhiyun 	GET_PAGE_DIR_IDX(addr)]->remapped)
267*4882a593Smuzhiyun 
ati_insert_memory(struct agp_memory * mem,off_t pg_start,int type)268*4882a593Smuzhiyun static int ati_insert_memory(struct agp_memory * mem,
269*4882a593Smuzhiyun 			     off_t pg_start, int type)
270*4882a593Smuzhiyun {
271*4882a593Smuzhiyun 	int i, j, num_entries;
272*4882a593Smuzhiyun 	unsigned long __iomem *cur_gatt;
273*4882a593Smuzhiyun 	unsigned long addr;
274*4882a593Smuzhiyun 	int mask_type;
275*4882a593Smuzhiyun 
276*4882a593Smuzhiyun 	num_entries = A_SIZE_LVL2(agp_bridge->current_size)->num_entries;
277*4882a593Smuzhiyun 
278*4882a593Smuzhiyun 	mask_type = agp_generic_type_to_mask_type(mem->bridge, type);
279*4882a593Smuzhiyun 	if (mask_type != 0 || type != mem->type)
280*4882a593Smuzhiyun 		return -EINVAL;
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun 	if (mem->page_count == 0)
283*4882a593Smuzhiyun 		return 0;
284*4882a593Smuzhiyun 
285*4882a593Smuzhiyun 	if ((pg_start + mem->page_count) > num_entries)
286*4882a593Smuzhiyun 		return -EINVAL;
287*4882a593Smuzhiyun 
288*4882a593Smuzhiyun 	j = pg_start;
289*4882a593Smuzhiyun 	while (j < (pg_start + mem->page_count)) {
290*4882a593Smuzhiyun 		addr = (j * PAGE_SIZE) + agp_bridge->gart_bus_addr;
291*4882a593Smuzhiyun 		cur_gatt = GET_GATT(addr);
292*4882a593Smuzhiyun 		if (!PGE_EMPTY(agp_bridge,readl(cur_gatt+GET_GATT_OFF(addr))))
293*4882a593Smuzhiyun 			return -EBUSY;
294*4882a593Smuzhiyun 		j++;
295*4882a593Smuzhiyun 	}
296*4882a593Smuzhiyun 
297*4882a593Smuzhiyun 	if (!mem->is_flushed) {
298*4882a593Smuzhiyun 		/*CACHE_FLUSH(); */
299*4882a593Smuzhiyun 		global_cache_flush();
300*4882a593Smuzhiyun 		mem->is_flushed = true;
301*4882a593Smuzhiyun 	}
302*4882a593Smuzhiyun 
303*4882a593Smuzhiyun 	for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
304*4882a593Smuzhiyun 		addr = (j * PAGE_SIZE) + agp_bridge->gart_bus_addr;
305*4882a593Smuzhiyun 		cur_gatt = GET_GATT(addr);
306*4882a593Smuzhiyun 		writel(agp_bridge->driver->mask_memory(agp_bridge,
307*4882a593Smuzhiyun 						       page_to_phys(mem->pages[i]),
308*4882a593Smuzhiyun 						       mem->type),
309*4882a593Smuzhiyun 		       cur_gatt+GET_GATT_OFF(addr));
310*4882a593Smuzhiyun 	}
311*4882a593Smuzhiyun 	readl(GET_GATT(agp_bridge->gart_bus_addr)); /* PCI posting */
312*4882a593Smuzhiyun 	agp_bridge->driver->tlb_flush(mem);
313*4882a593Smuzhiyun 	return 0;
314*4882a593Smuzhiyun }
315*4882a593Smuzhiyun 
ati_remove_memory(struct agp_memory * mem,off_t pg_start,int type)316*4882a593Smuzhiyun static int ati_remove_memory(struct agp_memory * mem, off_t pg_start,
317*4882a593Smuzhiyun 			     int type)
318*4882a593Smuzhiyun {
319*4882a593Smuzhiyun 	int i;
320*4882a593Smuzhiyun 	unsigned long __iomem *cur_gatt;
321*4882a593Smuzhiyun 	unsigned long addr;
322*4882a593Smuzhiyun 	int mask_type;
323*4882a593Smuzhiyun 
324*4882a593Smuzhiyun 	mask_type = agp_generic_type_to_mask_type(mem->bridge, type);
325*4882a593Smuzhiyun 	if (mask_type != 0 || type != mem->type)
326*4882a593Smuzhiyun 		return -EINVAL;
327*4882a593Smuzhiyun 
328*4882a593Smuzhiyun 	if (mem->page_count == 0)
329*4882a593Smuzhiyun 		return 0;
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun 	for (i = pg_start; i < (mem->page_count + pg_start); i++) {
332*4882a593Smuzhiyun 		addr = (i * PAGE_SIZE) + agp_bridge->gart_bus_addr;
333*4882a593Smuzhiyun 		cur_gatt = GET_GATT(addr);
334*4882a593Smuzhiyun 		writel(agp_bridge->scratch_page, cur_gatt+GET_GATT_OFF(addr));
335*4882a593Smuzhiyun 	}
336*4882a593Smuzhiyun 
337*4882a593Smuzhiyun 	readl(GET_GATT(agp_bridge->gart_bus_addr)); /* PCI posting */
338*4882a593Smuzhiyun 	agp_bridge->driver->tlb_flush(mem);
339*4882a593Smuzhiyun 	return 0;
340*4882a593Smuzhiyun }
341*4882a593Smuzhiyun 
ati_create_gatt_table(struct agp_bridge_data * bridge)342*4882a593Smuzhiyun static int ati_create_gatt_table(struct agp_bridge_data *bridge)
343*4882a593Smuzhiyun {
344*4882a593Smuzhiyun 	struct aper_size_info_lvl2 *value;
345*4882a593Smuzhiyun 	struct ati_page_map page_dir;
346*4882a593Smuzhiyun 	unsigned long __iomem *cur_gatt;
347*4882a593Smuzhiyun 	unsigned long addr;
348*4882a593Smuzhiyun 	int retval;
349*4882a593Smuzhiyun 	u32 temp;
350*4882a593Smuzhiyun 	int i;
351*4882a593Smuzhiyun 	struct aper_size_info_lvl2 *current_size;
352*4882a593Smuzhiyun 
353*4882a593Smuzhiyun 	value = A_SIZE_LVL2(agp_bridge->current_size);
354*4882a593Smuzhiyun 	retval = ati_create_page_map(&page_dir);
355*4882a593Smuzhiyun 	if (retval != 0)
356*4882a593Smuzhiyun 		return retval;
357*4882a593Smuzhiyun 
358*4882a593Smuzhiyun 	retval = ati_create_gatt_pages(value->num_entries / 1024);
359*4882a593Smuzhiyun 	if (retval != 0) {
360*4882a593Smuzhiyun 		ati_free_page_map(&page_dir);
361*4882a593Smuzhiyun 		return retval;
362*4882a593Smuzhiyun 	}
363*4882a593Smuzhiyun 
364*4882a593Smuzhiyun 	agp_bridge->gatt_table_real = (u32 *)page_dir.real;
365*4882a593Smuzhiyun 	agp_bridge->gatt_table = (u32 __iomem *) page_dir.remapped;
366*4882a593Smuzhiyun 	agp_bridge->gatt_bus_addr = virt_to_phys(page_dir.real);
367*4882a593Smuzhiyun 
368*4882a593Smuzhiyun 	/* Write out the size register */
369*4882a593Smuzhiyun 	current_size = A_SIZE_LVL2(agp_bridge->current_size);
370*4882a593Smuzhiyun 
371*4882a593Smuzhiyun 	if (is_r200()) {
372*4882a593Smuzhiyun 		pci_read_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, &temp);
373*4882a593Smuzhiyun 		temp = (((temp & ~(0x0000000e)) | current_size->size_value)
374*4882a593Smuzhiyun 			| 0x00000001);
375*4882a593Smuzhiyun 		pci_write_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, temp);
376*4882a593Smuzhiyun 		pci_read_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, &temp);
377*4882a593Smuzhiyun 	} else {
378*4882a593Smuzhiyun 		pci_read_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, &temp);
379*4882a593Smuzhiyun 		temp = (((temp & ~(0x0000000e)) | current_size->size_value)
380*4882a593Smuzhiyun 			| 0x00000001);
381*4882a593Smuzhiyun 		pci_write_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, temp);
382*4882a593Smuzhiyun 		pci_read_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, &temp);
383*4882a593Smuzhiyun 	}
384*4882a593Smuzhiyun 
385*4882a593Smuzhiyun 	/*
386*4882a593Smuzhiyun 	 * Get the address for the gart region.
387*4882a593Smuzhiyun 	 * This is a bus address even on the alpha, b/c its
388*4882a593Smuzhiyun 	 * used to program the agp master not the cpu
389*4882a593Smuzhiyun 	 */
390*4882a593Smuzhiyun 	addr = pci_bus_address(agp_bridge->dev, AGP_APERTURE_BAR);
391*4882a593Smuzhiyun 	agp_bridge->gart_bus_addr = addr;
392*4882a593Smuzhiyun 
393*4882a593Smuzhiyun 	/* Calculate the agp offset */
394*4882a593Smuzhiyun 	for (i = 0; i < value->num_entries / 1024; i++, addr += 0x00400000) {
395*4882a593Smuzhiyun 		writel(virt_to_phys(ati_generic_private.gatt_pages[i]->real) | 1,
396*4882a593Smuzhiyun 			page_dir.remapped+GET_PAGE_DIR_OFF(addr));
397*4882a593Smuzhiyun 		readl(page_dir.remapped+GET_PAGE_DIR_OFF(addr));	/* PCI Posting. */
398*4882a593Smuzhiyun 	}
399*4882a593Smuzhiyun 
400*4882a593Smuzhiyun 	for (i = 0; i < value->num_entries; i++) {
401*4882a593Smuzhiyun 		addr = (i * PAGE_SIZE) + agp_bridge->gart_bus_addr;
402*4882a593Smuzhiyun 		cur_gatt = GET_GATT(addr);
403*4882a593Smuzhiyun 		writel(agp_bridge->scratch_page, cur_gatt+GET_GATT_OFF(addr));
404*4882a593Smuzhiyun 	}
405*4882a593Smuzhiyun 
406*4882a593Smuzhiyun 	return 0;
407*4882a593Smuzhiyun }
408*4882a593Smuzhiyun 
ati_free_gatt_table(struct agp_bridge_data * bridge)409*4882a593Smuzhiyun static int ati_free_gatt_table(struct agp_bridge_data *bridge)
410*4882a593Smuzhiyun {
411*4882a593Smuzhiyun 	struct ati_page_map page_dir;
412*4882a593Smuzhiyun 
413*4882a593Smuzhiyun 	page_dir.real = (unsigned long *)agp_bridge->gatt_table_real;
414*4882a593Smuzhiyun 	page_dir.remapped = (unsigned long __iomem *)agp_bridge->gatt_table;
415*4882a593Smuzhiyun 
416*4882a593Smuzhiyun 	ati_free_gatt_pages();
417*4882a593Smuzhiyun 	ati_free_page_map(&page_dir);
418*4882a593Smuzhiyun 	return 0;
419*4882a593Smuzhiyun }
420*4882a593Smuzhiyun 
421*4882a593Smuzhiyun static const struct agp_bridge_driver ati_generic_bridge = {
422*4882a593Smuzhiyun 	.owner			= THIS_MODULE,
423*4882a593Smuzhiyun 	.aperture_sizes		= ati_generic_sizes,
424*4882a593Smuzhiyun 	.size_type		= LVL2_APER_SIZE,
425*4882a593Smuzhiyun 	.num_aperture_sizes	= 7,
426*4882a593Smuzhiyun 	.needs_scratch_page	= true,
427*4882a593Smuzhiyun 	.configure		= ati_configure,
428*4882a593Smuzhiyun 	.fetch_size		= ati_fetch_size,
429*4882a593Smuzhiyun 	.cleanup		= ati_cleanup,
430*4882a593Smuzhiyun 	.tlb_flush		= ati_tlbflush,
431*4882a593Smuzhiyun 	.mask_memory		= agp_generic_mask_memory,
432*4882a593Smuzhiyun 	.masks			= ati_generic_masks,
433*4882a593Smuzhiyun 	.agp_enable		= agp_generic_enable,
434*4882a593Smuzhiyun 	.cache_flush		= global_cache_flush,
435*4882a593Smuzhiyun 	.create_gatt_table	= ati_create_gatt_table,
436*4882a593Smuzhiyun 	.free_gatt_table	= ati_free_gatt_table,
437*4882a593Smuzhiyun 	.insert_memory		= ati_insert_memory,
438*4882a593Smuzhiyun 	.remove_memory		= ati_remove_memory,
439*4882a593Smuzhiyun 	.alloc_by_type		= agp_generic_alloc_by_type,
440*4882a593Smuzhiyun 	.free_by_type		= agp_generic_free_by_type,
441*4882a593Smuzhiyun 	.agp_alloc_page		= agp_generic_alloc_page,
442*4882a593Smuzhiyun 	.agp_alloc_pages	= agp_generic_alloc_pages,
443*4882a593Smuzhiyun 	.agp_destroy_page	= agp_generic_destroy_page,
444*4882a593Smuzhiyun 	.agp_destroy_pages	= agp_generic_destroy_pages,
445*4882a593Smuzhiyun 	.agp_type_to_mask_type  = agp_generic_type_to_mask_type,
446*4882a593Smuzhiyun };
447*4882a593Smuzhiyun 
448*4882a593Smuzhiyun 
449*4882a593Smuzhiyun static struct agp_device_ids ati_agp_device_ids[] =
450*4882a593Smuzhiyun {
451*4882a593Smuzhiyun 	{
452*4882a593Smuzhiyun 		.device_id	= PCI_DEVICE_ID_ATI_RS100,
453*4882a593Smuzhiyun 		.chipset_name	= "IGP320/M",
454*4882a593Smuzhiyun 	},
455*4882a593Smuzhiyun 	{
456*4882a593Smuzhiyun 		.device_id	= PCI_DEVICE_ID_ATI_RS200,
457*4882a593Smuzhiyun 		.chipset_name	= "IGP330/340/345/350/M",
458*4882a593Smuzhiyun 	},
459*4882a593Smuzhiyun 	{
460*4882a593Smuzhiyun 		.device_id	= PCI_DEVICE_ID_ATI_RS200_B,
461*4882a593Smuzhiyun 		.chipset_name	= "IGP345M",
462*4882a593Smuzhiyun 	},
463*4882a593Smuzhiyun 	{
464*4882a593Smuzhiyun 		.device_id	= PCI_DEVICE_ID_ATI_RS250,
465*4882a593Smuzhiyun 		.chipset_name	= "IGP7000/M",
466*4882a593Smuzhiyun 	},
467*4882a593Smuzhiyun 	{
468*4882a593Smuzhiyun 		.device_id	= PCI_DEVICE_ID_ATI_RS300_100,
469*4882a593Smuzhiyun 		.chipset_name	= "IGP9100/M",
470*4882a593Smuzhiyun 	},
471*4882a593Smuzhiyun 	{
472*4882a593Smuzhiyun 		.device_id	= PCI_DEVICE_ID_ATI_RS300_133,
473*4882a593Smuzhiyun 		.chipset_name	= "IGP9100/M",
474*4882a593Smuzhiyun 	},
475*4882a593Smuzhiyun 	{
476*4882a593Smuzhiyun 		.device_id	= PCI_DEVICE_ID_ATI_RS300_166,
477*4882a593Smuzhiyun 		.chipset_name	= "IGP9100/M",
478*4882a593Smuzhiyun 	},
479*4882a593Smuzhiyun 	{
480*4882a593Smuzhiyun 		.device_id	= PCI_DEVICE_ID_ATI_RS300_200,
481*4882a593Smuzhiyun 		.chipset_name	= "IGP9100/M",
482*4882a593Smuzhiyun 	},
483*4882a593Smuzhiyun 	{
484*4882a593Smuzhiyun 		.device_id	= PCI_DEVICE_ID_ATI_RS350_133,
485*4882a593Smuzhiyun 		.chipset_name	= "IGP9000/M",
486*4882a593Smuzhiyun 	},
487*4882a593Smuzhiyun 	{
488*4882a593Smuzhiyun 		.device_id	= PCI_DEVICE_ID_ATI_RS350_200,
489*4882a593Smuzhiyun 		.chipset_name	= "IGP9100/M",
490*4882a593Smuzhiyun 	},
491*4882a593Smuzhiyun 	{ }, /* dummy final entry, always present */
492*4882a593Smuzhiyun };
493*4882a593Smuzhiyun 
agp_ati_probe(struct pci_dev * pdev,const struct pci_device_id * ent)494*4882a593Smuzhiyun static int agp_ati_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
495*4882a593Smuzhiyun {
496*4882a593Smuzhiyun 	struct agp_device_ids *devs = ati_agp_device_ids;
497*4882a593Smuzhiyun 	struct agp_bridge_data *bridge;
498*4882a593Smuzhiyun 	u8 cap_ptr;
499*4882a593Smuzhiyun 	int j;
500*4882a593Smuzhiyun 
501*4882a593Smuzhiyun 	cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
502*4882a593Smuzhiyun 	if (!cap_ptr)
503*4882a593Smuzhiyun 		return -ENODEV;
504*4882a593Smuzhiyun 
505*4882a593Smuzhiyun 	/* probe for known chipsets */
506*4882a593Smuzhiyun 	for (j = 0; devs[j].chipset_name; j++) {
507*4882a593Smuzhiyun 		if (pdev->device == devs[j].device_id)
508*4882a593Smuzhiyun 			goto found;
509*4882a593Smuzhiyun 	}
510*4882a593Smuzhiyun 
511*4882a593Smuzhiyun 	dev_err(&pdev->dev, "unsupported Ati chipset [%04x/%04x])\n",
512*4882a593Smuzhiyun 		pdev->vendor, pdev->device);
513*4882a593Smuzhiyun 	return -ENODEV;
514*4882a593Smuzhiyun 
515*4882a593Smuzhiyun found:
516*4882a593Smuzhiyun 	bridge = agp_alloc_bridge();
517*4882a593Smuzhiyun 	if (!bridge)
518*4882a593Smuzhiyun 		return -ENOMEM;
519*4882a593Smuzhiyun 
520*4882a593Smuzhiyun 	bridge->dev = pdev;
521*4882a593Smuzhiyun 	bridge->capndx = cap_ptr;
522*4882a593Smuzhiyun 
523*4882a593Smuzhiyun 	bridge->driver = &ati_generic_bridge;
524*4882a593Smuzhiyun 
525*4882a593Smuzhiyun 	dev_info(&pdev->dev, "Ati %s chipset\n", devs[j].chipset_name);
526*4882a593Smuzhiyun 
527*4882a593Smuzhiyun 	/* Fill in the mode register */
528*4882a593Smuzhiyun 	pci_read_config_dword(pdev,
529*4882a593Smuzhiyun 			bridge->capndx+PCI_AGP_STATUS,
530*4882a593Smuzhiyun 			&bridge->mode);
531*4882a593Smuzhiyun 
532*4882a593Smuzhiyun 	pci_set_drvdata(pdev, bridge);
533*4882a593Smuzhiyun 	return agp_add_bridge(bridge);
534*4882a593Smuzhiyun }
535*4882a593Smuzhiyun 
agp_ati_remove(struct pci_dev * pdev)536*4882a593Smuzhiyun static void agp_ati_remove(struct pci_dev *pdev)
537*4882a593Smuzhiyun {
538*4882a593Smuzhiyun 	struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
539*4882a593Smuzhiyun 
540*4882a593Smuzhiyun 	agp_remove_bridge(bridge);
541*4882a593Smuzhiyun 	agp_put_bridge(bridge);
542*4882a593Smuzhiyun }
543*4882a593Smuzhiyun 
544*4882a593Smuzhiyun static const struct pci_device_id agp_ati_pci_table[] = {
545*4882a593Smuzhiyun 	{
546*4882a593Smuzhiyun 	.class		= (PCI_CLASS_BRIDGE_HOST << 8),
547*4882a593Smuzhiyun 	.class_mask	= ~0,
548*4882a593Smuzhiyun 	.vendor		= PCI_VENDOR_ID_ATI,
549*4882a593Smuzhiyun 	.device		= PCI_ANY_ID,
550*4882a593Smuzhiyun 	.subvendor	= PCI_ANY_ID,
551*4882a593Smuzhiyun 	.subdevice	= PCI_ANY_ID,
552*4882a593Smuzhiyun 	},
553*4882a593Smuzhiyun 	{ }
554*4882a593Smuzhiyun };
555*4882a593Smuzhiyun 
556*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pci, agp_ati_pci_table);
557*4882a593Smuzhiyun 
558*4882a593Smuzhiyun static struct pci_driver agp_ati_pci_driver = {
559*4882a593Smuzhiyun 	.name		= "agpgart-ati",
560*4882a593Smuzhiyun 	.id_table	= agp_ati_pci_table,
561*4882a593Smuzhiyun 	.probe		= agp_ati_probe,
562*4882a593Smuzhiyun 	.remove		= agp_ati_remove,
563*4882a593Smuzhiyun #ifdef CONFIG_PM
564*4882a593Smuzhiyun 	.suspend	= agp_ati_suspend,
565*4882a593Smuzhiyun 	.resume		= agp_ati_resume,
566*4882a593Smuzhiyun #endif
567*4882a593Smuzhiyun };
568*4882a593Smuzhiyun 
agp_ati_init(void)569*4882a593Smuzhiyun static int __init agp_ati_init(void)
570*4882a593Smuzhiyun {
571*4882a593Smuzhiyun 	if (agp_off)
572*4882a593Smuzhiyun 		return -EINVAL;
573*4882a593Smuzhiyun 	return pci_register_driver(&agp_ati_pci_driver);
574*4882a593Smuzhiyun }
575*4882a593Smuzhiyun 
agp_ati_cleanup(void)576*4882a593Smuzhiyun static void __exit agp_ati_cleanup(void)
577*4882a593Smuzhiyun {
578*4882a593Smuzhiyun 	pci_unregister_driver(&agp_ati_pci_driver);
579*4882a593Smuzhiyun }
580*4882a593Smuzhiyun 
581*4882a593Smuzhiyun module_init(agp_ati_init);
582*4882a593Smuzhiyun module_exit(agp_ati_cleanup);
583*4882a593Smuzhiyun 
584*4882a593Smuzhiyun MODULE_AUTHOR("Dave Jones");
585*4882a593Smuzhiyun MODULE_LICENSE("GPL and additional rights");
586*4882a593Smuzhiyun 
587