1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * AGPGART
3*4882a593Smuzhiyun * Copyright (C) 2004 Silicon Graphics, Inc.
4*4882a593Smuzhiyun * Copyright (C) 2002-2004 Dave Jones
5*4882a593Smuzhiyun * Copyright (C) 1999 Jeff Hartmann
6*4882a593Smuzhiyun * Copyright (C) 1999 Precision Insight, Inc.
7*4882a593Smuzhiyun * Copyright (C) 1999 Xi Graphics, Inc.
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * Permission is hereby granted, free of charge, to any person obtaining a
10*4882a593Smuzhiyun * copy of this software and associated documentation files (the "Software"),
11*4882a593Smuzhiyun * to deal in the Software without restriction, including without limitation
12*4882a593Smuzhiyun * the rights to use, copy, modify, merge, publish, distribute, sublicense,
13*4882a593Smuzhiyun * and/or sell copies of the Software, and to permit persons to whom the
14*4882a593Smuzhiyun * Software is furnished to do so, subject to the following conditions:
15*4882a593Smuzhiyun *
16*4882a593Smuzhiyun * The above copyright notice and this permission notice shall be included
17*4882a593Smuzhiyun * in all copies or substantial portions of the Software.
18*4882a593Smuzhiyun *
19*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20*4882a593Smuzhiyun * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22*4882a593Smuzhiyun * JEFF HARTMANN, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM,
23*4882a593Smuzhiyun * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
24*4882a593Smuzhiyun * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
25*4882a593Smuzhiyun * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26*4882a593Smuzhiyun *
27*4882a593Smuzhiyun */
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun #ifndef _AGP_BACKEND_PRIV_H
30*4882a593Smuzhiyun #define _AGP_BACKEND_PRIV_H 1
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun #include <asm/agp.h> /* for flush_agp_cache() */
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun #define PFX "agpgart: "
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun //#define AGP_DEBUG 1
37*4882a593Smuzhiyun #ifdef AGP_DEBUG
38*4882a593Smuzhiyun #define DBG(x,y...) printk (KERN_DEBUG PFX "%s: " x "\n", __func__ , ## y)
39*4882a593Smuzhiyun #else
40*4882a593Smuzhiyun #define DBG(x,y...) do { } while (0)
41*4882a593Smuzhiyun #endif
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun extern struct agp_bridge_data *agp_bridge;
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun enum aper_size_type {
46*4882a593Smuzhiyun U8_APER_SIZE,
47*4882a593Smuzhiyun U16_APER_SIZE,
48*4882a593Smuzhiyun U32_APER_SIZE,
49*4882a593Smuzhiyun LVL2_APER_SIZE,
50*4882a593Smuzhiyun FIXED_APER_SIZE
51*4882a593Smuzhiyun };
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun struct gatt_mask {
54*4882a593Smuzhiyun unsigned long mask;
55*4882a593Smuzhiyun u32 type;
56*4882a593Smuzhiyun /* totally device specific, for integrated chipsets that
57*4882a593Smuzhiyun * might have different types of memory masks. For other
58*4882a593Smuzhiyun * devices this will probably be ignored */
59*4882a593Smuzhiyun };
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun #define AGP_PAGE_DESTROY_UNMAP 1
62*4882a593Smuzhiyun #define AGP_PAGE_DESTROY_FREE 2
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun struct aper_size_info_8 {
65*4882a593Smuzhiyun int size;
66*4882a593Smuzhiyun int num_entries;
67*4882a593Smuzhiyun int page_order;
68*4882a593Smuzhiyun u8 size_value;
69*4882a593Smuzhiyun };
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun struct aper_size_info_16 {
72*4882a593Smuzhiyun int size;
73*4882a593Smuzhiyun int num_entries;
74*4882a593Smuzhiyun int page_order;
75*4882a593Smuzhiyun u16 size_value;
76*4882a593Smuzhiyun };
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun struct aper_size_info_32 {
79*4882a593Smuzhiyun int size;
80*4882a593Smuzhiyun int num_entries;
81*4882a593Smuzhiyun int page_order;
82*4882a593Smuzhiyun u32 size_value;
83*4882a593Smuzhiyun };
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun struct aper_size_info_lvl2 {
86*4882a593Smuzhiyun int size;
87*4882a593Smuzhiyun int num_entries;
88*4882a593Smuzhiyun u32 size_value;
89*4882a593Smuzhiyun };
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun struct aper_size_info_fixed {
92*4882a593Smuzhiyun int size;
93*4882a593Smuzhiyun int num_entries;
94*4882a593Smuzhiyun int page_order;
95*4882a593Smuzhiyun };
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun struct agp_bridge_driver {
98*4882a593Smuzhiyun struct module *owner;
99*4882a593Smuzhiyun const void *aperture_sizes;
100*4882a593Smuzhiyun int num_aperture_sizes;
101*4882a593Smuzhiyun enum aper_size_type size_type;
102*4882a593Smuzhiyun bool cant_use_aperture;
103*4882a593Smuzhiyun bool needs_scratch_page;
104*4882a593Smuzhiyun const struct gatt_mask *masks;
105*4882a593Smuzhiyun int (*fetch_size)(void);
106*4882a593Smuzhiyun int (*configure)(void);
107*4882a593Smuzhiyun void (*agp_enable)(struct agp_bridge_data *, u32);
108*4882a593Smuzhiyun void (*cleanup)(void);
109*4882a593Smuzhiyun void (*tlb_flush)(struct agp_memory *);
110*4882a593Smuzhiyun unsigned long (*mask_memory)(struct agp_bridge_data *, dma_addr_t, int);
111*4882a593Smuzhiyun void (*cache_flush)(void);
112*4882a593Smuzhiyun int (*create_gatt_table)(struct agp_bridge_data *);
113*4882a593Smuzhiyun int (*free_gatt_table)(struct agp_bridge_data *);
114*4882a593Smuzhiyun int (*insert_memory)(struct agp_memory *, off_t, int);
115*4882a593Smuzhiyun int (*remove_memory)(struct agp_memory *, off_t, int);
116*4882a593Smuzhiyun struct agp_memory *(*alloc_by_type) (size_t, int);
117*4882a593Smuzhiyun void (*free_by_type)(struct agp_memory *);
118*4882a593Smuzhiyun struct page *(*agp_alloc_page)(struct agp_bridge_data *);
119*4882a593Smuzhiyun int (*agp_alloc_pages)(struct agp_bridge_data *, struct agp_memory *, size_t);
120*4882a593Smuzhiyun void (*agp_destroy_page)(struct page *, int flags);
121*4882a593Smuzhiyun void (*agp_destroy_pages)(struct agp_memory *);
122*4882a593Smuzhiyun int (*agp_type_to_mask_type) (struct agp_bridge_data *, int);
123*4882a593Smuzhiyun };
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun struct agp_bridge_data {
126*4882a593Smuzhiyun const struct agp_version *version;
127*4882a593Smuzhiyun const struct agp_bridge_driver *driver;
128*4882a593Smuzhiyun const struct vm_operations_struct *vm_ops;
129*4882a593Smuzhiyun void *previous_size;
130*4882a593Smuzhiyun void *current_size;
131*4882a593Smuzhiyun void *dev_private_data;
132*4882a593Smuzhiyun struct pci_dev *dev;
133*4882a593Smuzhiyun u32 __iomem *gatt_table;
134*4882a593Smuzhiyun u32 *gatt_table_real;
135*4882a593Smuzhiyun unsigned long scratch_page;
136*4882a593Smuzhiyun struct page *scratch_page_page;
137*4882a593Smuzhiyun dma_addr_t scratch_page_dma;
138*4882a593Smuzhiyun unsigned long gart_bus_addr;
139*4882a593Smuzhiyun unsigned long gatt_bus_addr;
140*4882a593Smuzhiyun u32 mode;
141*4882a593Smuzhiyun enum chipset_type type;
142*4882a593Smuzhiyun unsigned long *key_list;
143*4882a593Smuzhiyun atomic_t current_memory_agp;
144*4882a593Smuzhiyun atomic_t agp_in_use;
145*4882a593Smuzhiyun int max_memory_agp; /* in number of pages */
146*4882a593Smuzhiyun int aperture_size_idx;
147*4882a593Smuzhiyun int capndx;
148*4882a593Smuzhiyun int flags;
149*4882a593Smuzhiyun char major_version;
150*4882a593Smuzhiyun char minor_version;
151*4882a593Smuzhiyun struct list_head list;
152*4882a593Smuzhiyun u32 apbase_config;
153*4882a593Smuzhiyun /* list of agp_memory mapped to the aperture */
154*4882a593Smuzhiyun struct list_head mapped_list;
155*4882a593Smuzhiyun spinlock_t mapped_lock;
156*4882a593Smuzhiyun };
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun #define KB(x) ((x) * 1024)
159*4882a593Smuzhiyun #define MB(x) (KB (KB (x)))
160*4882a593Smuzhiyun #define GB(x) (MB (KB (x)))
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun #define A_SIZE_8(x) ((struct aper_size_info_8 *) x)
163*4882a593Smuzhiyun #define A_SIZE_16(x) ((struct aper_size_info_16 *) x)
164*4882a593Smuzhiyun #define A_SIZE_32(x) ((struct aper_size_info_32 *) x)
165*4882a593Smuzhiyun #define A_SIZE_LVL2(x) ((struct aper_size_info_lvl2 *) x)
166*4882a593Smuzhiyun #define A_SIZE_FIX(x) ((struct aper_size_info_fixed *) x)
167*4882a593Smuzhiyun #define A_IDX8(bridge) (A_SIZE_8((bridge)->driver->aperture_sizes) + i)
168*4882a593Smuzhiyun #define A_IDX16(bridge) (A_SIZE_16((bridge)->driver->aperture_sizes) + i)
169*4882a593Smuzhiyun #define A_IDX32(bridge) (A_SIZE_32((bridge)->driver->aperture_sizes) + i)
170*4882a593Smuzhiyun #define MAXKEY (4096 * 32)
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun #define PGE_EMPTY(b, p) (!(p) || (p) == (unsigned long) (b)->scratch_page)
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun struct agp_device_ids {
176*4882a593Smuzhiyun unsigned short device_id; /* first, to make table easier to read */
177*4882a593Smuzhiyun enum chipset_type chipset;
178*4882a593Smuzhiyun const char *chipset_name;
179*4882a593Smuzhiyun int (*chipset_setup) (struct pci_dev *pdev); /* used to override generic */
180*4882a593Smuzhiyun };
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun /* Driver registration */
183*4882a593Smuzhiyun struct agp_bridge_data *agp_alloc_bridge(void);
184*4882a593Smuzhiyun void agp_put_bridge(struct agp_bridge_data *bridge);
185*4882a593Smuzhiyun int agp_add_bridge(struct agp_bridge_data *bridge);
186*4882a593Smuzhiyun void agp_remove_bridge(struct agp_bridge_data *bridge);
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun /* Frontend routines. */
189*4882a593Smuzhiyun int agp_frontend_initialize(void);
190*4882a593Smuzhiyun void agp_frontend_cleanup(void);
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun /* Generic routines. */
193*4882a593Smuzhiyun void agp_generic_enable(struct agp_bridge_data *bridge, u32 mode);
194*4882a593Smuzhiyun int agp_generic_create_gatt_table(struct agp_bridge_data *bridge);
195*4882a593Smuzhiyun int agp_generic_free_gatt_table(struct agp_bridge_data *bridge);
196*4882a593Smuzhiyun struct agp_memory *agp_create_memory(int scratch_pages);
197*4882a593Smuzhiyun int agp_generic_insert_memory(struct agp_memory *mem, off_t pg_start, int type);
198*4882a593Smuzhiyun int agp_generic_remove_memory(struct agp_memory *mem, off_t pg_start, int type);
199*4882a593Smuzhiyun struct agp_memory *agp_generic_alloc_by_type(size_t page_count, int type);
200*4882a593Smuzhiyun void agp_generic_free_by_type(struct agp_memory *curr);
201*4882a593Smuzhiyun struct page *agp_generic_alloc_page(struct agp_bridge_data *bridge);
202*4882a593Smuzhiyun int agp_generic_alloc_pages(struct agp_bridge_data *agp_bridge,
203*4882a593Smuzhiyun struct agp_memory *memory, size_t page_count);
204*4882a593Smuzhiyun void agp_generic_destroy_page(struct page *page, int flags);
205*4882a593Smuzhiyun void agp_generic_destroy_pages(struct agp_memory *memory);
206*4882a593Smuzhiyun void agp_free_key(int key);
207*4882a593Smuzhiyun int agp_num_entries(void);
208*4882a593Smuzhiyun u32 agp_collect_device_status(struct agp_bridge_data *bridge, u32 mode, u32 command);
209*4882a593Smuzhiyun void agp_device_command(u32 command, bool agp_v3);
210*4882a593Smuzhiyun int agp_3_5_enable(struct agp_bridge_data *bridge);
211*4882a593Smuzhiyun void global_cache_flush(void);
212*4882a593Smuzhiyun void get_agp_version(struct agp_bridge_data *bridge);
213*4882a593Smuzhiyun unsigned long agp_generic_mask_memory(struct agp_bridge_data *bridge,
214*4882a593Smuzhiyun dma_addr_t phys, int type);
215*4882a593Smuzhiyun int agp_generic_type_to_mask_type(struct agp_bridge_data *bridge,
216*4882a593Smuzhiyun int type);
217*4882a593Smuzhiyun struct agp_bridge_data *agp_generic_find_bridge(struct pci_dev *pdev);
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun /* generic functions for user-populated AGP memory types */
220*4882a593Smuzhiyun struct agp_memory *agp_generic_alloc_user(size_t page_count, int type);
221*4882a593Smuzhiyun void agp_alloc_page_array(size_t size, struct agp_memory *mem);
agp_free_page_array(struct agp_memory * mem)222*4882a593Smuzhiyun static inline void agp_free_page_array(struct agp_memory *mem)
223*4882a593Smuzhiyun {
224*4882a593Smuzhiyun kvfree(mem->pages);
225*4882a593Smuzhiyun }
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun /* generic routines for agp>=3 */
229*4882a593Smuzhiyun int agp3_generic_fetch_size(void);
230*4882a593Smuzhiyun void agp3_generic_tlbflush(struct agp_memory *mem);
231*4882a593Smuzhiyun int agp3_generic_configure(void);
232*4882a593Smuzhiyun void agp3_generic_cleanup(void);
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun /* aperture sizes have been standardised since v3 */
235*4882a593Smuzhiyun #define AGP_GENERIC_SIZES_ENTRIES 11
236*4882a593Smuzhiyun extern const struct aper_size_info_16 agp3_generic_sizes[];
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun extern int agp_off;
239*4882a593Smuzhiyun extern int agp_try_unsupported_boot;
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun long compat_agp_ioctl(struct file *file, unsigned int cmd, unsigned long arg);
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun /* Chipset independent registers (from AGP Spec) */
244*4882a593Smuzhiyun #define AGP_APBASE 0x10
245*4882a593Smuzhiyun #define AGP_APERTURE_BAR 0
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun #define AGPSTAT 0x4
248*4882a593Smuzhiyun #define AGPCMD 0x8
249*4882a593Smuzhiyun #define AGPNISTAT 0xc
250*4882a593Smuzhiyun #define AGPCTRL 0x10
251*4882a593Smuzhiyun #define AGPAPSIZE 0x14
252*4882a593Smuzhiyun #define AGPNEPG 0x16
253*4882a593Smuzhiyun #define AGPGARTLO 0x18
254*4882a593Smuzhiyun #define AGPGARTHI 0x1c
255*4882a593Smuzhiyun #define AGPNICMD 0x20
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun #define AGP_MAJOR_VERSION_SHIFT (20)
258*4882a593Smuzhiyun #define AGP_MINOR_VERSION_SHIFT (16)
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun #define AGPSTAT_RQ_DEPTH (0xff000000)
261*4882a593Smuzhiyun #define AGPSTAT_RQ_DEPTH_SHIFT 24
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun #define AGPSTAT_CAL_MASK (1<<12|1<<11|1<<10)
264*4882a593Smuzhiyun #define AGPSTAT_ARQSZ (1<<15|1<<14|1<<13)
265*4882a593Smuzhiyun #define AGPSTAT_ARQSZ_SHIFT 13
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun #define AGPSTAT_SBA (1<<9)
268*4882a593Smuzhiyun #define AGPSTAT_AGP_ENABLE (1<<8)
269*4882a593Smuzhiyun #define AGPSTAT_FW (1<<4)
270*4882a593Smuzhiyun #define AGPSTAT_MODE_3_0 (1<<3)
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun #define AGPSTAT2_1X (1<<0)
273*4882a593Smuzhiyun #define AGPSTAT2_2X (1<<1)
274*4882a593Smuzhiyun #define AGPSTAT2_4X (1<<2)
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun #define AGPSTAT3_RSVD (1<<2)
277*4882a593Smuzhiyun #define AGPSTAT3_8X (1<<1)
278*4882a593Smuzhiyun #define AGPSTAT3_4X (1)
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun #define AGPCTRL_APERENB (1<<8)
281*4882a593Smuzhiyun #define AGPCTRL_GTLBEN (1<<7)
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun #define AGP2_RESERVED_MASK 0x00fffcc8
284*4882a593Smuzhiyun #define AGP3_RESERVED_MASK 0x00ff00c4
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun #define AGP_ERRATA_FASTWRITES 1<<0
287*4882a593Smuzhiyun #define AGP_ERRATA_SBA 1<<1
288*4882a593Smuzhiyun #define AGP_ERRATA_1X 1<<2
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun #endif /* _AGP_BACKEND_PRIV_H */
291