1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Turris Mox module configuration bus driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2019 Marek Behun <marek.behun@nic.cz>
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <dt-bindings/bus/moxtet.h>
9*4882a593Smuzhiyun #include <linux/bitops.h>
10*4882a593Smuzhiyun #include <linux/debugfs.h>
11*4882a593Smuzhiyun #include <linux/interrupt.h>
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/moxtet.h>
14*4882a593Smuzhiyun #include <linux/mutex.h>
15*4882a593Smuzhiyun #include <linux/of_device.h>
16*4882a593Smuzhiyun #include <linux/of_irq.h>
17*4882a593Smuzhiyun #include <linux/spi/spi.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun /*
20*4882a593Smuzhiyun * @name: module name for sysfs
21*4882a593Smuzhiyun * @hwirq_base: base index for IRQ for this module (-1 if no IRQs)
22*4882a593Smuzhiyun * @nirqs: how many interrupts does the shift register provide
23*4882a593Smuzhiyun * @desc: module description for kernel log
24*4882a593Smuzhiyun */
25*4882a593Smuzhiyun static const struct {
26*4882a593Smuzhiyun const char *name;
27*4882a593Smuzhiyun int hwirq_base;
28*4882a593Smuzhiyun int nirqs;
29*4882a593Smuzhiyun const char *desc;
30*4882a593Smuzhiyun } mox_module_table[] = {
31*4882a593Smuzhiyun /* do not change order of this array! */
32*4882a593Smuzhiyun { NULL, 0, 0, NULL },
33*4882a593Smuzhiyun { "sfp", -1, 0, "MOX D (SFP cage)" },
34*4882a593Smuzhiyun { "pci", MOXTET_IRQ_PCI, 1, "MOX B (Mini-PCIe)" },
35*4882a593Smuzhiyun { "topaz", MOXTET_IRQ_TOPAZ, 1, "MOX C (4 port switch)" },
36*4882a593Smuzhiyun { "peridot", MOXTET_IRQ_PERIDOT(0), 1, "MOX E (8 port switch)" },
37*4882a593Smuzhiyun { "usb3", MOXTET_IRQ_USB3, 2, "MOX F (USB 3.0)" },
38*4882a593Smuzhiyun { "pci-bridge", -1, 0, "MOX G (Mini-PCIe bridge)" },
39*4882a593Smuzhiyun };
40*4882a593Smuzhiyun
mox_module_known(unsigned int id)41*4882a593Smuzhiyun static inline bool mox_module_known(unsigned int id)
42*4882a593Smuzhiyun {
43*4882a593Smuzhiyun return id >= TURRIS_MOX_MODULE_FIRST && id <= TURRIS_MOX_MODULE_LAST;
44*4882a593Smuzhiyun }
45*4882a593Smuzhiyun
mox_module_name(unsigned int id)46*4882a593Smuzhiyun static inline const char *mox_module_name(unsigned int id)
47*4882a593Smuzhiyun {
48*4882a593Smuzhiyun if (mox_module_known(id))
49*4882a593Smuzhiyun return mox_module_table[id].name;
50*4882a593Smuzhiyun else
51*4882a593Smuzhiyun return "unknown";
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun #define DEF_MODULE_ATTR(name, fmt, ...) \
55*4882a593Smuzhiyun static ssize_t \
56*4882a593Smuzhiyun module_##name##_show(struct device *dev, struct device_attribute *a, \
57*4882a593Smuzhiyun char *buf) \
58*4882a593Smuzhiyun { \
59*4882a593Smuzhiyun struct moxtet_device *mdev = to_moxtet_device(dev); \
60*4882a593Smuzhiyun return sprintf(buf, (fmt), __VA_ARGS__); \
61*4882a593Smuzhiyun } \
62*4882a593Smuzhiyun static DEVICE_ATTR_RO(module_##name)
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun DEF_MODULE_ATTR(id, "0x%x\n", mdev->id);
65*4882a593Smuzhiyun DEF_MODULE_ATTR(name, "%s\n", mox_module_name(mdev->id));
66*4882a593Smuzhiyun DEF_MODULE_ATTR(description, "%s\n",
67*4882a593Smuzhiyun mox_module_known(mdev->id) ? mox_module_table[mdev->id].desc
68*4882a593Smuzhiyun : "");
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun static struct attribute *moxtet_dev_attrs[] = {
71*4882a593Smuzhiyun &dev_attr_module_id.attr,
72*4882a593Smuzhiyun &dev_attr_module_name.attr,
73*4882a593Smuzhiyun &dev_attr_module_description.attr,
74*4882a593Smuzhiyun NULL,
75*4882a593Smuzhiyun };
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun static const struct attribute_group moxtet_dev_group = {
78*4882a593Smuzhiyun .attrs = moxtet_dev_attrs,
79*4882a593Smuzhiyun };
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun static const struct attribute_group *moxtet_dev_groups[] = {
82*4882a593Smuzhiyun &moxtet_dev_group,
83*4882a593Smuzhiyun NULL,
84*4882a593Smuzhiyun };
85*4882a593Smuzhiyun
moxtet_match(struct device * dev,struct device_driver * drv)86*4882a593Smuzhiyun static int moxtet_match(struct device *dev, struct device_driver *drv)
87*4882a593Smuzhiyun {
88*4882a593Smuzhiyun struct moxtet_device *mdev = to_moxtet_device(dev);
89*4882a593Smuzhiyun struct moxtet_driver *tdrv = to_moxtet_driver(drv);
90*4882a593Smuzhiyun const enum turris_mox_module_id *t;
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun if (of_driver_match_device(dev, drv))
93*4882a593Smuzhiyun return 1;
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun if (!tdrv->id_table)
96*4882a593Smuzhiyun return 0;
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun for (t = tdrv->id_table; *t; ++t)
99*4882a593Smuzhiyun if (*t == mdev->id)
100*4882a593Smuzhiyun return 1;
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun return 0;
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun static struct bus_type moxtet_bus_type = {
106*4882a593Smuzhiyun .name = "moxtet",
107*4882a593Smuzhiyun .dev_groups = moxtet_dev_groups,
108*4882a593Smuzhiyun .match = moxtet_match,
109*4882a593Smuzhiyun };
110*4882a593Smuzhiyun
__moxtet_register_driver(struct module * owner,struct moxtet_driver * mdrv)111*4882a593Smuzhiyun int __moxtet_register_driver(struct module *owner,
112*4882a593Smuzhiyun struct moxtet_driver *mdrv)
113*4882a593Smuzhiyun {
114*4882a593Smuzhiyun mdrv->driver.owner = owner;
115*4882a593Smuzhiyun mdrv->driver.bus = &moxtet_bus_type;
116*4882a593Smuzhiyun return driver_register(&mdrv->driver);
117*4882a593Smuzhiyun }
118*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(__moxtet_register_driver);
119*4882a593Smuzhiyun
moxtet_dev_check(struct device * dev,void * data)120*4882a593Smuzhiyun static int moxtet_dev_check(struct device *dev, void *data)
121*4882a593Smuzhiyun {
122*4882a593Smuzhiyun struct moxtet_device *mdev = to_moxtet_device(dev);
123*4882a593Smuzhiyun struct moxtet_device *new_dev = data;
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun if (mdev->moxtet == new_dev->moxtet && mdev->id == new_dev->id &&
126*4882a593Smuzhiyun mdev->idx == new_dev->idx)
127*4882a593Smuzhiyun return -EBUSY;
128*4882a593Smuzhiyun return 0;
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun
moxtet_dev_release(struct device * dev)131*4882a593Smuzhiyun static void moxtet_dev_release(struct device *dev)
132*4882a593Smuzhiyun {
133*4882a593Smuzhiyun struct moxtet_device *mdev = to_moxtet_device(dev);
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun put_device(mdev->moxtet->dev);
136*4882a593Smuzhiyun kfree(mdev);
137*4882a593Smuzhiyun }
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun static struct moxtet_device *
moxtet_alloc_device(struct moxtet * moxtet)140*4882a593Smuzhiyun moxtet_alloc_device(struct moxtet *moxtet)
141*4882a593Smuzhiyun {
142*4882a593Smuzhiyun struct moxtet_device *dev;
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun if (!get_device(moxtet->dev))
145*4882a593Smuzhiyun return NULL;
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun dev = kzalloc(sizeof(*dev), GFP_KERNEL);
148*4882a593Smuzhiyun if (!dev) {
149*4882a593Smuzhiyun put_device(moxtet->dev);
150*4882a593Smuzhiyun return NULL;
151*4882a593Smuzhiyun }
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun dev->moxtet = moxtet;
154*4882a593Smuzhiyun dev->dev.parent = moxtet->dev;
155*4882a593Smuzhiyun dev->dev.bus = &moxtet_bus_type;
156*4882a593Smuzhiyun dev->dev.release = moxtet_dev_release;
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun device_initialize(&dev->dev);
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun return dev;
161*4882a593Smuzhiyun }
162*4882a593Smuzhiyun
moxtet_add_device(struct moxtet_device * dev)163*4882a593Smuzhiyun static int moxtet_add_device(struct moxtet_device *dev)
164*4882a593Smuzhiyun {
165*4882a593Smuzhiyun static DEFINE_MUTEX(add_mutex);
166*4882a593Smuzhiyun int ret;
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun if (dev->idx >= TURRIS_MOX_MAX_MODULES || dev->id > 0xf)
169*4882a593Smuzhiyun return -EINVAL;
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun dev_set_name(&dev->dev, "moxtet-%s.%u", mox_module_name(dev->id),
172*4882a593Smuzhiyun dev->idx);
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun mutex_lock(&add_mutex);
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun ret = bus_for_each_dev(&moxtet_bus_type, NULL, dev,
177*4882a593Smuzhiyun moxtet_dev_check);
178*4882a593Smuzhiyun if (ret)
179*4882a593Smuzhiyun goto done;
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun ret = device_add(&dev->dev);
182*4882a593Smuzhiyun if (ret < 0)
183*4882a593Smuzhiyun dev_err(dev->moxtet->dev, "can't add %s, status %d\n",
184*4882a593Smuzhiyun dev_name(dev->moxtet->dev), ret);
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun done:
187*4882a593Smuzhiyun mutex_unlock(&add_mutex);
188*4882a593Smuzhiyun return ret;
189*4882a593Smuzhiyun }
190*4882a593Smuzhiyun
__unregister(struct device * dev,void * null)191*4882a593Smuzhiyun static int __unregister(struct device *dev, void *null)
192*4882a593Smuzhiyun {
193*4882a593Smuzhiyun if (dev->of_node) {
194*4882a593Smuzhiyun of_node_clear_flag(dev->of_node, OF_POPULATED);
195*4882a593Smuzhiyun of_node_put(dev->of_node);
196*4882a593Smuzhiyun }
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun device_unregister(dev);
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun return 0;
201*4882a593Smuzhiyun }
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun static struct moxtet_device *
of_register_moxtet_device(struct moxtet * moxtet,struct device_node * nc)204*4882a593Smuzhiyun of_register_moxtet_device(struct moxtet *moxtet, struct device_node *nc)
205*4882a593Smuzhiyun {
206*4882a593Smuzhiyun struct moxtet_device *dev;
207*4882a593Smuzhiyun u32 val;
208*4882a593Smuzhiyun int ret;
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun dev = moxtet_alloc_device(moxtet);
211*4882a593Smuzhiyun if (!dev) {
212*4882a593Smuzhiyun dev_err(moxtet->dev,
213*4882a593Smuzhiyun "Moxtet device alloc error for %pOF\n", nc);
214*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
215*4882a593Smuzhiyun }
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun ret = of_property_read_u32(nc, "reg", &val);
218*4882a593Smuzhiyun if (ret) {
219*4882a593Smuzhiyun dev_err(moxtet->dev, "%pOF has no valid 'reg' property (%d)\n",
220*4882a593Smuzhiyun nc, ret);
221*4882a593Smuzhiyun goto err_put;
222*4882a593Smuzhiyun }
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun dev->idx = val;
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun if (dev->idx >= TURRIS_MOX_MAX_MODULES) {
227*4882a593Smuzhiyun dev_err(moxtet->dev, "%pOF Moxtet address 0x%x out of range\n",
228*4882a593Smuzhiyun nc, dev->idx);
229*4882a593Smuzhiyun ret = -EINVAL;
230*4882a593Smuzhiyun goto err_put;
231*4882a593Smuzhiyun }
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun dev->id = moxtet->modules[dev->idx];
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun if (!dev->id) {
236*4882a593Smuzhiyun dev_err(moxtet->dev, "%pOF Moxtet address 0x%x is empty\n", nc,
237*4882a593Smuzhiyun dev->idx);
238*4882a593Smuzhiyun ret = -ENODEV;
239*4882a593Smuzhiyun goto err_put;
240*4882a593Smuzhiyun }
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun of_node_get(nc);
243*4882a593Smuzhiyun dev->dev.of_node = nc;
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun ret = moxtet_add_device(dev);
246*4882a593Smuzhiyun if (ret) {
247*4882a593Smuzhiyun dev_err(moxtet->dev,
248*4882a593Smuzhiyun "Moxtet device register error for %pOF\n", nc);
249*4882a593Smuzhiyun of_node_put(nc);
250*4882a593Smuzhiyun goto err_put;
251*4882a593Smuzhiyun }
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun return dev;
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun err_put:
256*4882a593Smuzhiyun put_device(&dev->dev);
257*4882a593Smuzhiyun return ERR_PTR(ret);
258*4882a593Smuzhiyun }
259*4882a593Smuzhiyun
of_register_moxtet_devices(struct moxtet * moxtet)260*4882a593Smuzhiyun static void of_register_moxtet_devices(struct moxtet *moxtet)
261*4882a593Smuzhiyun {
262*4882a593Smuzhiyun struct moxtet_device *dev;
263*4882a593Smuzhiyun struct device_node *nc;
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun if (!moxtet->dev->of_node)
266*4882a593Smuzhiyun return;
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun for_each_available_child_of_node(moxtet->dev->of_node, nc) {
269*4882a593Smuzhiyun if (of_node_test_and_set_flag(nc, OF_POPULATED))
270*4882a593Smuzhiyun continue;
271*4882a593Smuzhiyun dev = of_register_moxtet_device(moxtet, nc);
272*4882a593Smuzhiyun if (IS_ERR(dev)) {
273*4882a593Smuzhiyun dev_warn(moxtet->dev,
274*4882a593Smuzhiyun "Failed to create Moxtet device for %pOF\n",
275*4882a593Smuzhiyun nc);
276*4882a593Smuzhiyun of_node_clear_flag(nc, OF_POPULATED);
277*4882a593Smuzhiyun }
278*4882a593Smuzhiyun }
279*4882a593Smuzhiyun }
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun static void
moxtet_register_devices_from_topology(struct moxtet * moxtet)282*4882a593Smuzhiyun moxtet_register_devices_from_topology(struct moxtet *moxtet)
283*4882a593Smuzhiyun {
284*4882a593Smuzhiyun struct moxtet_device *dev;
285*4882a593Smuzhiyun int i, ret;
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun for (i = 0; i < moxtet->count; ++i) {
288*4882a593Smuzhiyun dev = moxtet_alloc_device(moxtet);
289*4882a593Smuzhiyun if (!dev) {
290*4882a593Smuzhiyun dev_err(moxtet->dev, "Moxtet device %u alloc error\n",
291*4882a593Smuzhiyun i);
292*4882a593Smuzhiyun continue;
293*4882a593Smuzhiyun }
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun dev->idx = i;
296*4882a593Smuzhiyun dev->id = moxtet->modules[i];
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun ret = moxtet_add_device(dev);
299*4882a593Smuzhiyun if (ret && ret != -EBUSY) {
300*4882a593Smuzhiyun put_device(&dev->dev);
301*4882a593Smuzhiyun dev_err(moxtet->dev,
302*4882a593Smuzhiyun "Moxtet device %u register error: %i\n", i,
303*4882a593Smuzhiyun ret);
304*4882a593Smuzhiyun }
305*4882a593Smuzhiyun }
306*4882a593Smuzhiyun }
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun /*
309*4882a593Smuzhiyun * @nsame: how many modules with same id are already in moxtet->modules
310*4882a593Smuzhiyun */
moxtet_set_irq(struct moxtet * moxtet,int idx,int id,int nsame)311*4882a593Smuzhiyun static int moxtet_set_irq(struct moxtet *moxtet, int idx, int id, int nsame)
312*4882a593Smuzhiyun {
313*4882a593Smuzhiyun int i, first;
314*4882a593Smuzhiyun struct moxtet_irqpos *pos;
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun first = mox_module_table[id].hwirq_base +
317*4882a593Smuzhiyun nsame * mox_module_table[id].nirqs;
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun if (first + mox_module_table[id].nirqs > MOXTET_NIRQS)
320*4882a593Smuzhiyun return -EINVAL;
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun for (i = 0; i < mox_module_table[id].nirqs; ++i) {
323*4882a593Smuzhiyun pos = &moxtet->irq.position[first + i];
324*4882a593Smuzhiyun pos->idx = idx;
325*4882a593Smuzhiyun pos->bit = i;
326*4882a593Smuzhiyun moxtet->irq.exists |= BIT(first + i);
327*4882a593Smuzhiyun }
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun return 0;
330*4882a593Smuzhiyun }
331*4882a593Smuzhiyun
moxtet_find_topology(struct moxtet * moxtet)332*4882a593Smuzhiyun static int moxtet_find_topology(struct moxtet *moxtet)
333*4882a593Smuzhiyun {
334*4882a593Smuzhiyun u8 buf[TURRIS_MOX_MAX_MODULES];
335*4882a593Smuzhiyun int cnts[TURRIS_MOX_MODULE_LAST];
336*4882a593Smuzhiyun int i, ret;
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun memset(cnts, 0, sizeof(cnts));
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun ret = spi_read(to_spi_device(moxtet->dev), buf, TURRIS_MOX_MAX_MODULES);
341*4882a593Smuzhiyun if (ret < 0)
342*4882a593Smuzhiyun return ret;
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun if (buf[0] == TURRIS_MOX_CPU_ID_EMMC) {
345*4882a593Smuzhiyun dev_info(moxtet->dev, "Found MOX A (eMMC CPU) module\n");
346*4882a593Smuzhiyun } else if (buf[0] == TURRIS_MOX_CPU_ID_SD) {
347*4882a593Smuzhiyun dev_info(moxtet->dev, "Found MOX A (CPU) module\n");
348*4882a593Smuzhiyun } else {
349*4882a593Smuzhiyun dev_err(moxtet->dev, "Invalid Turris MOX A CPU module 0x%02x\n",
350*4882a593Smuzhiyun buf[0]);
351*4882a593Smuzhiyun return -ENODEV;
352*4882a593Smuzhiyun }
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun moxtet->count = 0;
355*4882a593Smuzhiyun
356*4882a593Smuzhiyun for (i = 1; i < TURRIS_MOX_MAX_MODULES; ++i) {
357*4882a593Smuzhiyun int id;
358*4882a593Smuzhiyun
359*4882a593Smuzhiyun if (buf[i] == 0xff)
360*4882a593Smuzhiyun break;
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun id = buf[i] & 0xf;
363*4882a593Smuzhiyun
364*4882a593Smuzhiyun moxtet->modules[i-1] = id;
365*4882a593Smuzhiyun ++moxtet->count;
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun if (mox_module_known(id)) {
368*4882a593Smuzhiyun dev_info(moxtet->dev, "Found %s module\n",
369*4882a593Smuzhiyun mox_module_table[id].desc);
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun if (moxtet_set_irq(moxtet, i-1, id, cnts[id]++) < 0)
372*4882a593Smuzhiyun dev_err(moxtet->dev,
373*4882a593Smuzhiyun " Cannot set IRQ for module %s\n",
374*4882a593Smuzhiyun mox_module_table[id].desc);
375*4882a593Smuzhiyun } else {
376*4882a593Smuzhiyun dev_warn(moxtet->dev,
377*4882a593Smuzhiyun "Unknown Moxtet module found (ID 0x%02x)\n",
378*4882a593Smuzhiyun id);
379*4882a593Smuzhiyun }
380*4882a593Smuzhiyun }
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun return 0;
383*4882a593Smuzhiyun }
384*4882a593Smuzhiyun
moxtet_spi_read(struct moxtet * moxtet,u8 * buf)385*4882a593Smuzhiyun static int moxtet_spi_read(struct moxtet *moxtet, u8 *buf)
386*4882a593Smuzhiyun {
387*4882a593Smuzhiyun struct spi_transfer xfer = {
388*4882a593Smuzhiyun .rx_buf = buf,
389*4882a593Smuzhiyun .tx_buf = moxtet->tx,
390*4882a593Smuzhiyun .len = moxtet->count + 1
391*4882a593Smuzhiyun };
392*4882a593Smuzhiyun int ret;
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun mutex_lock(&moxtet->lock);
395*4882a593Smuzhiyun
396*4882a593Smuzhiyun ret = spi_sync_transfer(to_spi_device(moxtet->dev), &xfer, 1);
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun mutex_unlock(&moxtet->lock);
399*4882a593Smuzhiyun
400*4882a593Smuzhiyun return ret;
401*4882a593Smuzhiyun }
402*4882a593Smuzhiyun
moxtet_device_read(struct device * dev)403*4882a593Smuzhiyun int moxtet_device_read(struct device *dev)
404*4882a593Smuzhiyun {
405*4882a593Smuzhiyun struct moxtet_device *mdev = to_moxtet_device(dev);
406*4882a593Smuzhiyun struct moxtet *moxtet = mdev->moxtet;
407*4882a593Smuzhiyun u8 buf[TURRIS_MOX_MAX_MODULES];
408*4882a593Smuzhiyun int ret;
409*4882a593Smuzhiyun
410*4882a593Smuzhiyun if (mdev->idx >= moxtet->count)
411*4882a593Smuzhiyun return -EINVAL;
412*4882a593Smuzhiyun
413*4882a593Smuzhiyun ret = moxtet_spi_read(moxtet, buf);
414*4882a593Smuzhiyun if (ret < 0)
415*4882a593Smuzhiyun return ret;
416*4882a593Smuzhiyun
417*4882a593Smuzhiyun return buf[mdev->idx + 1] >> 4;
418*4882a593Smuzhiyun }
419*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(moxtet_device_read);
420*4882a593Smuzhiyun
moxtet_device_write(struct device * dev,u8 val)421*4882a593Smuzhiyun int moxtet_device_write(struct device *dev, u8 val)
422*4882a593Smuzhiyun {
423*4882a593Smuzhiyun struct moxtet_device *mdev = to_moxtet_device(dev);
424*4882a593Smuzhiyun struct moxtet *moxtet = mdev->moxtet;
425*4882a593Smuzhiyun int ret;
426*4882a593Smuzhiyun
427*4882a593Smuzhiyun if (mdev->idx >= moxtet->count)
428*4882a593Smuzhiyun return -EINVAL;
429*4882a593Smuzhiyun
430*4882a593Smuzhiyun mutex_lock(&moxtet->lock);
431*4882a593Smuzhiyun
432*4882a593Smuzhiyun moxtet->tx[moxtet->count - mdev->idx] = val;
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun ret = spi_write(to_spi_device(moxtet->dev), moxtet->tx,
435*4882a593Smuzhiyun moxtet->count + 1);
436*4882a593Smuzhiyun
437*4882a593Smuzhiyun mutex_unlock(&moxtet->lock);
438*4882a593Smuzhiyun
439*4882a593Smuzhiyun return ret;
440*4882a593Smuzhiyun }
441*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(moxtet_device_write);
442*4882a593Smuzhiyun
moxtet_device_written(struct device * dev)443*4882a593Smuzhiyun int moxtet_device_written(struct device *dev)
444*4882a593Smuzhiyun {
445*4882a593Smuzhiyun struct moxtet_device *mdev = to_moxtet_device(dev);
446*4882a593Smuzhiyun struct moxtet *moxtet = mdev->moxtet;
447*4882a593Smuzhiyun
448*4882a593Smuzhiyun if (mdev->idx >= moxtet->count)
449*4882a593Smuzhiyun return -EINVAL;
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun return moxtet->tx[moxtet->count - mdev->idx];
452*4882a593Smuzhiyun }
453*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(moxtet_device_written);
454*4882a593Smuzhiyun
455*4882a593Smuzhiyun #ifdef CONFIG_DEBUG_FS
moxtet_debug_open(struct inode * inode,struct file * file)456*4882a593Smuzhiyun static int moxtet_debug_open(struct inode *inode, struct file *file)
457*4882a593Smuzhiyun {
458*4882a593Smuzhiyun file->private_data = inode->i_private;
459*4882a593Smuzhiyun
460*4882a593Smuzhiyun return nonseekable_open(inode, file);
461*4882a593Smuzhiyun }
462*4882a593Smuzhiyun
input_read(struct file * file,char __user * buf,size_t len,loff_t * ppos)463*4882a593Smuzhiyun static ssize_t input_read(struct file *file, char __user *buf, size_t len,
464*4882a593Smuzhiyun loff_t *ppos)
465*4882a593Smuzhiyun {
466*4882a593Smuzhiyun struct moxtet *moxtet = file->private_data;
467*4882a593Smuzhiyun u8 bin[TURRIS_MOX_MAX_MODULES];
468*4882a593Smuzhiyun u8 hex[sizeof(bin) * 2 + 1];
469*4882a593Smuzhiyun int ret, n;
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun ret = moxtet_spi_read(moxtet, bin);
472*4882a593Smuzhiyun if (ret < 0)
473*4882a593Smuzhiyun return ret;
474*4882a593Smuzhiyun
475*4882a593Smuzhiyun n = moxtet->count + 1;
476*4882a593Smuzhiyun bin2hex(hex, bin, n);
477*4882a593Smuzhiyun
478*4882a593Smuzhiyun hex[2*n] = '\n';
479*4882a593Smuzhiyun
480*4882a593Smuzhiyun return simple_read_from_buffer(buf, len, ppos, hex, 2*n + 1);
481*4882a593Smuzhiyun }
482*4882a593Smuzhiyun
483*4882a593Smuzhiyun static const struct file_operations input_fops = {
484*4882a593Smuzhiyun .owner = THIS_MODULE,
485*4882a593Smuzhiyun .open = moxtet_debug_open,
486*4882a593Smuzhiyun .read = input_read,
487*4882a593Smuzhiyun .llseek = no_llseek,
488*4882a593Smuzhiyun };
489*4882a593Smuzhiyun
output_read(struct file * file,char __user * buf,size_t len,loff_t * ppos)490*4882a593Smuzhiyun static ssize_t output_read(struct file *file, char __user *buf, size_t len,
491*4882a593Smuzhiyun loff_t *ppos)
492*4882a593Smuzhiyun {
493*4882a593Smuzhiyun struct moxtet *moxtet = file->private_data;
494*4882a593Smuzhiyun u8 hex[TURRIS_MOX_MAX_MODULES * 2 + 1];
495*4882a593Smuzhiyun u8 *p = hex;
496*4882a593Smuzhiyun int i;
497*4882a593Smuzhiyun
498*4882a593Smuzhiyun mutex_lock(&moxtet->lock);
499*4882a593Smuzhiyun
500*4882a593Smuzhiyun for (i = 0; i < moxtet->count; ++i)
501*4882a593Smuzhiyun p = hex_byte_pack(p, moxtet->tx[moxtet->count - i]);
502*4882a593Smuzhiyun
503*4882a593Smuzhiyun mutex_unlock(&moxtet->lock);
504*4882a593Smuzhiyun
505*4882a593Smuzhiyun *p++ = '\n';
506*4882a593Smuzhiyun
507*4882a593Smuzhiyun return simple_read_from_buffer(buf, len, ppos, hex, p - hex);
508*4882a593Smuzhiyun }
509*4882a593Smuzhiyun
output_write(struct file * file,const char __user * buf,size_t len,loff_t * ppos)510*4882a593Smuzhiyun static ssize_t output_write(struct file *file, const char __user *buf,
511*4882a593Smuzhiyun size_t len, loff_t *ppos)
512*4882a593Smuzhiyun {
513*4882a593Smuzhiyun struct moxtet *moxtet = file->private_data;
514*4882a593Smuzhiyun u8 bin[TURRIS_MOX_MAX_MODULES];
515*4882a593Smuzhiyun u8 hex[sizeof(bin) * 2 + 1];
516*4882a593Smuzhiyun ssize_t res;
517*4882a593Smuzhiyun loff_t dummy = 0;
518*4882a593Smuzhiyun int err, i;
519*4882a593Smuzhiyun
520*4882a593Smuzhiyun if (len > 2 * moxtet->count + 1 || len < 2 * moxtet->count)
521*4882a593Smuzhiyun return -EINVAL;
522*4882a593Smuzhiyun
523*4882a593Smuzhiyun res = simple_write_to_buffer(hex, sizeof(hex), &dummy, buf, len);
524*4882a593Smuzhiyun if (res < 0)
525*4882a593Smuzhiyun return res;
526*4882a593Smuzhiyun
527*4882a593Smuzhiyun if (len % 2 == 1 && hex[len - 1] != '\n')
528*4882a593Smuzhiyun return -EINVAL;
529*4882a593Smuzhiyun
530*4882a593Smuzhiyun err = hex2bin(bin, hex, moxtet->count);
531*4882a593Smuzhiyun if (err < 0)
532*4882a593Smuzhiyun return -EINVAL;
533*4882a593Smuzhiyun
534*4882a593Smuzhiyun mutex_lock(&moxtet->lock);
535*4882a593Smuzhiyun
536*4882a593Smuzhiyun for (i = 0; i < moxtet->count; ++i)
537*4882a593Smuzhiyun moxtet->tx[moxtet->count - i] = bin[i];
538*4882a593Smuzhiyun
539*4882a593Smuzhiyun err = spi_write(to_spi_device(moxtet->dev), moxtet->tx,
540*4882a593Smuzhiyun moxtet->count + 1);
541*4882a593Smuzhiyun
542*4882a593Smuzhiyun mutex_unlock(&moxtet->lock);
543*4882a593Smuzhiyun
544*4882a593Smuzhiyun return err < 0 ? err : len;
545*4882a593Smuzhiyun }
546*4882a593Smuzhiyun
547*4882a593Smuzhiyun static const struct file_operations output_fops = {
548*4882a593Smuzhiyun .owner = THIS_MODULE,
549*4882a593Smuzhiyun .open = moxtet_debug_open,
550*4882a593Smuzhiyun .read = output_read,
551*4882a593Smuzhiyun .write = output_write,
552*4882a593Smuzhiyun .llseek = no_llseek,
553*4882a593Smuzhiyun };
554*4882a593Smuzhiyun
moxtet_register_debugfs(struct moxtet * moxtet)555*4882a593Smuzhiyun static int moxtet_register_debugfs(struct moxtet *moxtet)
556*4882a593Smuzhiyun {
557*4882a593Smuzhiyun struct dentry *root, *entry;
558*4882a593Smuzhiyun
559*4882a593Smuzhiyun root = debugfs_create_dir("moxtet", NULL);
560*4882a593Smuzhiyun
561*4882a593Smuzhiyun if (IS_ERR(root))
562*4882a593Smuzhiyun return PTR_ERR(root);
563*4882a593Smuzhiyun
564*4882a593Smuzhiyun entry = debugfs_create_file_unsafe("input", 0444, root, moxtet,
565*4882a593Smuzhiyun &input_fops);
566*4882a593Smuzhiyun if (IS_ERR(entry))
567*4882a593Smuzhiyun goto err_remove;
568*4882a593Smuzhiyun
569*4882a593Smuzhiyun entry = debugfs_create_file_unsafe("output", 0644, root, moxtet,
570*4882a593Smuzhiyun &output_fops);
571*4882a593Smuzhiyun if (IS_ERR(entry))
572*4882a593Smuzhiyun goto err_remove;
573*4882a593Smuzhiyun
574*4882a593Smuzhiyun moxtet->debugfs_root = root;
575*4882a593Smuzhiyun
576*4882a593Smuzhiyun return 0;
577*4882a593Smuzhiyun err_remove:
578*4882a593Smuzhiyun debugfs_remove_recursive(root);
579*4882a593Smuzhiyun return PTR_ERR(entry);
580*4882a593Smuzhiyun }
581*4882a593Smuzhiyun
moxtet_unregister_debugfs(struct moxtet * moxtet)582*4882a593Smuzhiyun static void moxtet_unregister_debugfs(struct moxtet *moxtet)
583*4882a593Smuzhiyun {
584*4882a593Smuzhiyun debugfs_remove_recursive(moxtet->debugfs_root);
585*4882a593Smuzhiyun }
586*4882a593Smuzhiyun #else
moxtet_register_debugfs(struct moxtet * moxtet)587*4882a593Smuzhiyun static inline int moxtet_register_debugfs(struct moxtet *moxtet)
588*4882a593Smuzhiyun {
589*4882a593Smuzhiyun return 0;
590*4882a593Smuzhiyun }
591*4882a593Smuzhiyun
moxtet_unregister_debugfs(struct moxtet * moxtet)592*4882a593Smuzhiyun static inline void moxtet_unregister_debugfs(struct moxtet *moxtet)
593*4882a593Smuzhiyun {
594*4882a593Smuzhiyun }
595*4882a593Smuzhiyun #endif
596*4882a593Smuzhiyun
moxtet_irq_domain_map(struct irq_domain * d,unsigned int irq,irq_hw_number_t hw)597*4882a593Smuzhiyun static int moxtet_irq_domain_map(struct irq_domain *d, unsigned int irq,
598*4882a593Smuzhiyun irq_hw_number_t hw)
599*4882a593Smuzhiyun {
600*4882a593Smuzhiyun struct moxtet *moxtet = d->host_data;
601*4882a593Smuzhiyun
602*4882a593Smuzhiyun if (hw >= MOXTET_NIRQS || !(moxtet->irq.exists & BIT(hw))) {
603*4882a593Smuzhiyun dev_err(moxtet->dev, "Invalid hw irq number\n");
604*4882a593Smuzhiyun return -EINVAL;
605*4882a593Smuzhiyun }
606*4882a593Smuzhiyun
607*4882a593Smuzhiyun irq_set_chip_data(irq, d->host_data);
608*4882a593Smuzhiyun irq_set_chip_and_handler(irq, &moxtet->irq.chip, handle_level_irq);
609*4882a593Smuzhiyun
610*4882a593Smuzhiyun return 0;
611*4882a593Smuzhiyun }
612*4882a593Smuzhiyun
moxtet_irq_domain_xlate(struct irq_domain * d,struct device_node * ctrlr,const u32 * intspec,unsigned int intsize,unsigned long * out_hwirq,unsigned int * out_type)613*4882a593Smuzhiyun static int moxtet_irq_domain_xlate(struct irq_domain *d,
614*4882a593Smuzhiyun struct device_node *ctrlr,
615*4882a593Smuzhiyun const u32 *intspec, unsigned int intsize,
616*4882a593Smuzhiyun unsigned long *out_hwirq,
617*4882a593Smuzhiyun unsigned int *out_type)
618*4882a593Smuzhiyun {
619*4882a593Smuzhiyun struct moxtet *moxtet = d->host_data;
620*4882a593Smuzhiyun int irq;
621*4882a593Smuzhiyun
622*4882a593Smuzhiyun if (WARN_ON(intsize < 1))
623*4882a593Smuzhiyun return -EINVAL;
624*4882a593Smuzhiyun
625*4882a593Smuzhiyun irq = intspec[0];
626*4882a593Smuzhiyun
627*4882a593Smuzhiyun if (irq >= MOXTET_NIRQS || !(moxtet->irq.exists & BIT(irq)))
628*4882a593Smuzhiyun return -EINVAL;
629*4882a593Smuzhiyun
630*4882a593Smuzhiyun *out_hwirq = irq;
631*4882a593Smuzhiyun *out_type = IRQ_TYPE_NONE;
632*4882a593Smuzhiyun return 0;
633*4882a593Smuzhiyun }
634*4882a593Smuzhiyun
635*4882a593Smuzhiyun static const struct irq_domain_ops moxtet_irq_domain = {
636*4882a593Smuzhiyun .map = moxtet_irq_domain_map,
637*4882a593Smuzhiyun .xlate = moxtet_irq_domain_xlate,
638*4882a593Smuzhiyun };
639*4882a593Smuzhiyun
moxtet_irq_mask(struct irq_data * d)640*4882a593Smuzhiyun static void moxtet_irq_mask(struct irq_data *d)
641*4882a593Smuzhiyun {
642*4882a593Smuzhiyun struct moxtet *moxtet = irq_data_get_irq_chip_data(d);
643*4882a593Smuzhiyun
644*4882a593Smuzhiyun moxtet->irq.masked |= BIT(d->hwirq);
645*4882a593Smuzhiyun }
646*4882a593Smuzhiyun
moxtet_irq_unmask(struct irq_data * d)647*4882a593Smuzhiyun static void moxtet_irq_unmask(struct irq_data *d)
648*4882a593Smuzhiyun {
649*4882a593Smuzhiyun struct moxtet *moxtet = irq_data_get_irq_chip_data(d);
650*4882a593Smuzhiyun
651*4882a593Smuzhiyun moxtet->irq.masked &= ~BIT(d->hwirq);
652*4882a593Smuzhiyun }
653*4882a593Smuzhiyun
moxtet_irq_print_chip(struct irq_data * d,struct seq_file * p)654*4882a593Smuzhiyun static void moxtet_irq_print_chip(struct irq_data *d, struct seq_file *p)
655*4882a593Smuzhiyun {
656*4882a593Smuzhiyun struct moxtet *moxtet = irq_data_get_irq_chip_data(d);
657*4882a593Smuzhiyun struct moxtet_irqpos *pos = &moxtet->irq.position[d->hwirq];
658*4882a593Smuzhiyun int id;
659*4882a593Smuzhiyun
660*4882a593Smuzhiyun id = moxtet->modules[pos->idx];
661*4882a593Smuzhiyun
662*4882a593Smuzhiyun seq_printf(p, " moxtet-%s.%i#%i", mox_module_name(id), pos->idx,
663*4882a593Smuzhiyun pos->bit);
664*4882a593Smuzhiyun }
665*4882a593Smuzhiyun
666*4882a593Smuzhiyun static const struct irq_chip moxtet_irq_chip = {
667*4882a593Smuzhiyun .name = "moxtet",
668*4882a593Smuzhiyun .irq_mask = moxtet_irq_mask,
669*4882a593Smuzhiyun .irq_unmask = moxtet_irq_unmask,
670*4882a593Smuzhiyun .irq_print_chip = moxtet_irq_print_chip,
671*4882a593Smuzhiyun };
672*4882a593Smuzhiyun
moxtet_irq_read(struct moxtet * moxtet,unsigned long * map)673*4882a593Smuzhiyun static int moxtet_irq_read(struct moxtet *moxtet, unsigned long *map)
674*4882a593Smuzhiyun {
675*4882a593Smuzhiyun struct moxtet_irqpos *pos = moxtet->irq.position;
676*4882a593Smuzhiyun u8 buf[TURRIS_MOX_MAX_MODULES];
677*4882a593Smuzhiyun int i, ret;
678*4882a593Smuzhiyun
679*4882a593Smuzhiyun ret = moxtet_spi_read(moxtet, buf);
680*4882a593Smuzhiyun if (ret < 0)
681*4882a593Smuzhiyun return ret;
682*4882a593Smuzhiyun
683*4882a593Smuzhiyun *map = 0;
684*4882a593Smuzhiyun
685*4882a593Smuzhiyun for_each_set_bit(i, &moxtet->irq.exists, MOXTET_NIRQS) {
686*4882a593Smuzhiyun if (!(buf[pos[i].idx + 1] & BIT(4 + pos[i].bit)))
687*4882a593Smuzhiyun set_bit(i, map);
688*4882a593Smuzhiyun }
689*4882a593Smuzhiyun
690*4882a593Smuzhiyun return 0;
691*4882a593Smuzhiyun }
692*4882a593Smuzhiyun
moxtet_irq_thread_fn(int irq,void * data)693*4882a593Smuzhiyun static irqreturn_t moxtet_irq_thread_fn(int irq, void *data)
694*4882a593Smuzhiyun {
695*4882a593Smuzhiyun struct moxtet *moxtet = data;
696*4882a593Smuzhiyun unsigned long set;
697*4882a593Smuzhiyun int nhandled = 0, i, sub_irq, ret;
698*4882a593Smuzhiyun
699*4882a593Smuzhiyun ret = moxtet_irq_read(moxtet, &set);
700*4882a593Smuzhiyun if (ret < 0)
701*4882a593Smuzhiyun goto out;
702*4882a593Smuzhiyun
703*4882a593Smuzhiyun set &= ~moxtet->irq.masked;
704*4882a593Smuzhiyun
705*4882a593Smuzhiyun do {
706*4882a593Smuzhiyun for_each_set_bit(i, &set, MOXTET_NIRQS) {
707*4882a593Smuzhiyun sub_irq = irq_find_mapping(moxtet->irq.domain, i);
708*4882a593Smuzhiyun handle_nested_irq(sub_irq);
709*4882a593Smuzhiyun dev_dbg(moxtet->dev, "%i irq\n", i);
710*4882a593Smuzhiyun ++nhandled;
711*4882a593Smuzhiyun }
712*4882a593Smuzhiyun
713*4882a593Smuzhiyun ret = moxtet_irq_read(moxtet, &set);
714*4882a593Smuzhiyun if (ret < 0)
715*4882a593Smuzhiyun goto out;
716*4882a593Smuzhiyun
717*4882a593Smuzhiyun set &= ~moxtet->irq.masked;
718*4882a593Smuzhiyun } while (set);
719*4882a593Smuzhiyun
720*4882a593Smuzhiyun out:
721*4882a593Smuzhiyun return (nhandled > 0 ? IRQ_HANDLED : IRQ_NONE);
722*4882a593Smuzhiyun }
723*4882a593Smuzhiyun
moxtet_irq_free(struct moxtet * moxtet)724*4882a593Smuzhiyun static void moxtet_irq_free(struct moxtet *moxtet)
725*4882a593Smuzhiyun {
726*4882a593Smuzhiyun int i, irq;
727*4882a593Smuzhiyun
728*4882a593Smuzhiyun for (i = 0; i < MOXTET_NIRQS; ++i) {
729*4882a593Smuzhiyun if (moxtet->irq.exists & BIT(i)) {
730*4882a593Smuzhiyun irq = irq_find_mapping(moxtet->irq.domain, i);
731*4882a593Smuzhiyun irq_dispose_mapping(irq);
732*4882a593Smuzhiyun }
733*4882a593Smuzhiyun }
734*4882a593Smuzhiyun
735*4882a593Smuzhiyun irq_domain_remove(moxtet->irq.domain);
736*4882a593Smuzhiyun }
737*4882a593Smuzhiyun
moxtet_irq_setup(struct moxtet * moxtet)738*4882a593Smuzhiyun static int moxtet_irq_setup(struct moxtet *moxtet)
739*4882a593Smuzhiyun {
740*4882a593Smuzhiyun int i, ret;
741*4882a593Smuzhiyun
742*4882a593Smuzhiyun moxtet->irq.domain = irq_domain_add_simple(moxtet->dev->of_node,
743*4882a593Smuzhiyun MOXTET_NIRQS, 0,
744*4882a593Smuzhiyun &moxtet_irq_domain, moxtet);
745*4882a593Smuzhiyun if (moxtet->irq.domain == NULL) {
746*4882a593Smuzhiyun dev_err(moxtet->dev, "Could not add IRQ domain\n");
747*4882a593Smuzhiyun return -ENOMEM;
748*4882a593Smuzhiyun }
749*4882a593Smuzhiyun
750*4882a593Smuzhiyun for (i = 0; i < MOXTET_NIRQS; ++i)
751*4882a593Smuzhiyun if (moxtet->irq.exists & BIT(i))
752*4882a593Smuzhiyun irq_create_mapping(moxtet->irq.domain, i);
753*4882a593Smuzhiyun
754*4882a593Smuzhiyun moxtet->irq.chip = moxtet_irq_chip;
755*4882a593Smuzhiyun moxtet->irq.masked = ~0;
756*4882a593Smuzhiyun
757*4882a593Smuzhiyun ret = request_threaded_irq(moxtet->dev_irq, NULL, moxtet_irq_thread_fn,
758*4882a593Smuzhiyun IRQF_ONESHOT, "moxtet", moxtet);
759*4882a593Smuzhiyun if (ret < 0)
760*4882a593Smuzhiyun goto err_free;
761*4882a593Smuzhiyun
762*4882a593Smuzhiyun return 0;
763*4882a593Smuzhiyun
764*4882a593Smuzhiyun err_free:
765*4882a593Smuzhiyun moxtet_irq_free(moxtet);
766*4882a593Smuzhiyun return ret;
767*4882a593Smuzhiyun }
768*4882a593Smuzhiyun
moxtet_probe(struct spi_device * spi)769*4882a593Smuzhiyun static int moxtet_probe(struct spi_device *spi)
770*4882a593Smuzhiyun {
771*4882a593Smuzhiyun struct moxtet *moxtet;
772*4882a593Smuzhiyun int ret;
773*4882a593Smuzhiyun
774*4882a593Smuzhiyun ret = spi_setup(spi);
775*4882a593Smuzhiyun if (ret < 0)
776*4882a593Smuzhiyun return ret;
777*4882a593Smuzhiyun
778*4882a593Smuzhiyun moxtet = devm_kzalloc(&spi->dev, sizeof(struct moxtet),
779*4882a593Smuzhiyun GFP_KERNEL);
780*4882a593Smuzhiyun if (!moxtet)
781*4882a593Smuzhiyun return -ENOMEM;
782*4882a593Smuzhiyun
783*4882a593Smuzhiyun moxtet->dev = &spi->dev;
784*4882a593Smuzhiyun spi_set_drvdata(spi, moxtet);
785*4882a593Smuzhiyun
786*4882a593Smuzhiyun mutex_init(&moxtet->lock);
787*4882a593Smuzhiyun
788*4882a593Smuzhiyun moxtet->dev_irq = of_irq_get(moxtet->dev->of_node, 0);
789*4882a593Smuzhiyun if (moxtet->dev_irq == -EPROBE_DEFER)
790*4882a593Smuzhiyun return -EPROBE_DEFER;
791*4882a593Smuzhiyun
792*4882a593Smuzhiyun if (moxtet->dev_irq <= 0) {
793*4882a593Smuzhiyun dev_err(moxtet->dev, "No IRQ resource found\n");
794*4882a593Smuzhiyun return -ENXIO;
795*4882a593Smuzhiyun }
796*4882a593Smuzhiyun
797*4882a593Smuzhiyun ret = moxtet_find_topology(moxtet);
798*4882a593Smuzhiyun if (ret < 0)
799*4882a593Smuzhiyun return ret;
800*4882a593Smuzhiyun
801*4882a593Smuzhiyun if (moxtet->irq.exists) {
802*4882a593Smuzhiyun ret = moxtet_irq_setup(moxtet);
803*4882a593Smuzhiyun if (ret < 0)
804*4882a593Smuzhiyun return ret;
805*4882a593Smuzhiyun }
806*4882a593Smuzhiyun
807*4882a593Smuzhiyun of_register_moxtet_devices(moxtet);
808*4882a593Smuzhiyun moxtet_register_devices_from_topology(moxtet);
809*4882a593Smuzhiyun
810*4882a593Smuzhiyun ret = moxtet_register_debugfs(moxtet);
811*4882a593Smuzhiyun if (ret < 0)
812*4882a593Smuzhiyun dev_warn(moxtet->dev, "Failed creating debugfs entries: %i\n",
813*4882a593Smuzhiyun ret);
814*4882a593Smuzhiyun
815*4882a593Smuzhiyun return 0;
816*4882a593Smuzhiyun }
817*4882a593Smuzhiyun
moxtet_remove(struct spi_device * spi)818*4882a593Smuzhiyun static int moxtet_remove(struct spi_device *spi)
819*4882a593Smuzhiyun {
820*4882a593Smuzhiyun struct moxtet *moxtet = spi_get_drvdata(spi);
821*4882a593Smuzhiyun
822*4882a593Smuzhiyun free_irq(moxtet->dev_irq, moxtet);
823*4882a593Smuzhiyun
824*4882a593Smuzhiyun moxtet_irq_free(moxtet);
825*4882a593Smuzhiyun
826*4882a593Smuzhiyun moxtet_unregister_debugfs(moxtet);
827*4882a593Smuzhiyun
828*4882a593Smuzhiyun device_for_each_child(moxtet->dev, NULL, __unregister);
829*4882a593Smuzhiyun
830*4882a593Smuzhiyun mutex_destroy(&moxtet->lock);
831*4882a593Smuzhiyun
832*4882a593Smuzhiyun return 0;
833*4882a593Smuzhiyun }
834*4882a593Smuzhiyun
835*4882a593Smuzhiyun static const struct of_device_id moxtet_dt_ids[] = {
836*4882a593Smuzhiyun { .compatible = "cznic,moxtet" },
837*4882a593Smuzhiyun {},
838*4882a593Smuzhiyun };
839*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, moxtet_dt_ids);
840*4882a593Smuzhiyun
841*4882a593Smuzhiyun static struct spi_driver moxtet_spi_driver = {
842*4882a593Smuzhiyun .driver = {
843*4882a593Smuzhiyun .name = "moxtet",
844*4882a593Smuzhiyun .of_match_table = moxtet_dt_ids,
845*4882a593Smuzhiyun },
846*4882a593Smuzhiyun .probe = moxtet_probe,
847*4882a593Smuzhiyun .remove = moxtet_remove,
848*4882a593Smuzhiyun };
849*4882a593Smuzhiyun
moxtet_init(void)850*4882a593Smuzhiyun static int __init moxtet_init(void)
851*4882a593Smuzhiyun {
852*4882a593Smuzhiyun int ret;
853*4882a593Smuzhiyun
854*4882a593Smuzhiyun ret = bus_register(&moxtet_bus_type);
855*4882a593Smuzhiyun if (ret < 0) {
856*4882a593Smuzhiyun pr_err("moxtet bus registration failed: %d\n", ret);
857*4882a593Smuzhiyun goto error;
858*4882a593Smuzhiyun }
859*4882a593Smuzhiyun
860*4882a593Smuzhiyun ret = spi_register_driver(&moxtet_spi_driver);
861*4882a593Smuzhiyun if (ret < 0) {
862*4882a593Smuzhiyun pr_err("moxtet spi driver registration failed: %d\n", ret);
863*4882a593Smuzhiyun goto error_bus;
864*4882a593Smuzhiyun }
865*4882a593Smuzhiyun
866*4882a593Smuzhiyun return 0;
867*4882a593Smuzhiyun
868*4882a593Smuzhiyun error_bus:
869*4882a593Smuzhiyun bus_unregister(&moxtet_bus_type);
870*4882a593Smuzhiyun error:
871*4882a593Smuzhiyun return ret;
872*4882a593Smuzhiyun }
873*4882a593Smuzhiyun postcore_initcall_sync(moxtet_init);
874*4882a593Smuzhiyun
moxtet_exit(void)875*4882a593Smuzhiyun static void __exit moxtet_exit(void)
876*4882a593Smuzhiyun {
877*4882a593Smuzhiyun spi_unregister_driver(&moxtet_spi_driver);
878*4882a593Smuzhiyun bus_unregister(&moxtet_bus_type);
879*4882a593Smuzhiyun }
880*4882a593Smuzhiyun module_exit(moxtet_exit);
881*4882a593Smuzhiyun
882*4882a593Smuzhiyun MODULE_AUTHOR("Marek Behun <marek.behun@nic.cz>");
883*4882a593Smuzhiyun MODULE_DESCRIPTION("CZ.NIC's Turris Mox module configuration bus");
884*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
885