1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2017 Hisilicon Limited, All Rights Reserved.
4*4882a593Smuzhiyun * Author: Zhichang Yuan <yuanzhichang@hisilicon.com>
5*4882a593Smuzhiyun * Author: Zou Rongrong <zourongrong@huawei.com>
6*4882a593Smuzhiyun * Author: John Garry <john.garry@huawei.com>
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <linux/acpi.h>
10*4882a593Smuzhiyun #include <linux/console.h>
11*4882a593Smuzhiyun #include <linux/delay.h>
12*4882a593Smuzhiyun #include <linux/io.h>
13*4882a593Smuzhiyun #include <linux/logic_pio.h>
14*4882a593Smuzhiyun #include <linux/module.h>
15*4882a593Smuzhiyun #include <linux/of.h>
16*4882a593Smuzhiyun #include <linux/of_address.h>
17*4882a593Smuzhiyun #include <linux/of_platform.h>
18*4882a593Smuzhiyun #include <linux/pci.h>
19*4882a593Smuzhiyun #include <linux/serial_8250.h>
20*4882a593Smuzhiyun #include <linux/slab.h>
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #define DRV_NAME "hisi-lpc"
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun /*
25*4882a593Smuzhiyun * Setting this bit means each IO operation will target a different port
26*4882a593Smuzhiyun * address; 0 means repeated IO operations will use the same port,
27*4882a593Smuzhiyun * such as BT.
28*4882a593Smuzhiyun */
29*4882a593Smuzhiyun #define FG_INCRADDR_LPC 0x02
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun struct lpc_cycle_para {
32*4882a593Smuzhiyun unsigned int opflags;
33*4882a593Smuzhiyun unsigned int csize; /* data length of each operation */
34*4882a593Smuzhiyun };
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun struct hisi_lpc_dev {
37*4882a593Smuzhiyun spinlock_t cycle_lock;
38*4882a593Smuzhiyun void __iomem *membase;
39*4882a593Smuzhiyun struct logic_pio_hwaddr *io_host;
40*4882a593Smuzhiyun };
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun /* The max IO cycle counts supported is four per operation at maximum */
43*4882a593Smuzhiyun #define LPC_MAX_DWIDTH 4
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun #define LPC_REG_STARTUP_SIGNAL 0x00
46*4882a593Smuzhiyun #define LPC_REG_STARTUP_SIGNAL_START BIT(0)
47*4882a593Smuzhiyun #define LPC_REG_OP_STATUS 0x04
48*4882a593Smuzhiyun #define LPC_REG_OP_STATUS_IDLE BIT(0)
49*4882a593Smuzhiyun #define LPC_REG_OP_STATUS_FINISHED BIT(1)
50*4882a593Smuzhiyun #define LPC_REG_OP_LEN 0x10 /* LPC cycles count per start */
51*4882a593Smuzhiyun #define LPC_REG_CMD 0x14
52*4882a593Smuzhiyun #define LPC_REG_CMD_OP BIT(0) /* 0: read, 1: write */
53*4882a593Smuzhiyun #define LPC_REG_CMD_SAMEADDR BIT(3)
54*4882a593Smuzhiyun #define LPC_REG_ADDR 0x20 /* target address */
55*4882a593Smuzhiyun #define LPC_REG_WDATA 0x24 /* write FIFO */
56*4882a593Smuzhiyun #define LPC_REG_RDATA 0x28 /* read FIFO */
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun /* The minimal nanosecond interval for each query on LPC cycle status */
59*4882a593Smuzhiyun #define LPC_NSEC_PERWAIT 100
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun /*
62*4882a593Smuzhiyun * The maximum waiting time is about 128us. It is specific for stream I/O,
63*4882a593Smuzhiyun * such as ins.
64*4882a593Smuzhiyun *
65*4882a593Smuzhiyun * The fastest IO cycle time is about 390ns, but the worst case will wait
66*4882a593Smuzhiyun * for extra 256 lpc clocks, so (256 + 13) * 30ns = 8 us. The maximum burst
67*4882a593Smuzhiyun * cycles is 16. So, the maximum waiting time is about 128us under worst
68*4882a593Smuzhiyun * case.
69*4882a593Smuzhiyun *
70*4882a593Smuzhiyun * Choose 1300 as the maximum.
71*4882a593Smuzhiyun */
72*4882a593Smuzhiyun #define LPC_MAX_WAITCNT 1300
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun /* About 10us. This is specific for single IO operations, such as inb */
75*4882a593Smuzhiyun #define LPC_PEROP_WAITCNT 100
76*4882a593Smuzhiyun
wait_lpc_idle(void __iomem * mbase,unsigned int waitcnt)77*4882a593Smuzhiyun static int wait_lpc_idle(void __iomem *mbase, unsigned int waitcnt)
78*4882a593Smuzhiyun {
79*4882a593Smuzhiyun u32 status;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun do {
82*4882a593Smuzhiyun status = readl(mbase + LPC_REG_OP_STATUS);
83*4882a593Smuzhiyun if (status & LPC_REG_OP_STATUS_IDLE)
84*4882a593Smuzhiyun return (status & LPC_REG_OP_STATUS_FINISHED) ? 0 : -EIO;
85*4882a593Smuzhiyun ndelay(LPC_NSEC_PERWAIT);
86*4882a593Smuzhiyun } while (--waitcnt);
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun return -ETIME;
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun /*
92*4882a593Smuzhiyun * hisi_lpc_target_in - trigger a series of LPC cycles for read operation
93*4882a593Smuzhiyun * @lpcdev: pointer to hisi lpc device
94*4882a593Smuzhiyun * @para: some parameters used to control the lpc I/O operations
95*4882a593Smuzhiyun * @addr: the lpc I/O target port address
96*4882a593Smuzhiyun * @buf: where the read back data is stored
97*4882a593Smuzhiyun * @opcnt: how many I/O operations required, i.e. data width
98*4882a593Smuzhiyun *
99*4882a593Smuzhiyun * Returns 0 on success, non-zero on fail.
100*4882a593Smuzhiyun */
hisi_lpc_target_in(struct hisi_lpc_dev * lpcdev,struct lpc_cycle_para * para,unsigned long addr,unsigned char * buf,unsigned long opcnt)101*4882a593Smuzhiyun static int hisi_lpc_target_in(struct hisi_lpc_dev *lpcdev,
102*4882a593Smuzhiyun struct lpc_cycle_para *para, unsigned long addr,
103*4882a593Smuzhiyun unsigned char *buf, unsigned long opcnt)
104*4882a593Smuzhiyun {
105*4882a593Smuzhiyun unsigned int cmd_word;
106*4882a593Smuzhiyun unsigned int waitcnt;
107*4882a593Smuzhiyun unsigned long flags;
108*4882a593Smuzhiyun int ret;
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun if (!buf || !opcnt || !para || !para->csize || !lpcdev)
111*4882a593Smuzhiyun return -EINVAL;
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun cmd_word = 0; /* IO mode, Read */
114*4882a593Smuzhiyun waitcnt = LPC_PEROP_WAITCNT;
115*4882a593Smuzhiyun if (!(para->opflags & FG_INCRADDR_LPC)) {
116*4882a593Smuzhiyun cmd_word |= LPC_REG_CMD_SAMEADDR;
117*4882a593Smuzhiyun waitcnt = LPC_MAX_WAITCNT;
118*4882a593Smuzhiyun }
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun /* whole operation must be atomic */
121*4882a593Smuzhiyun spin_lock_irqsave(&lpcdev->cycle_lock, flags);
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun writel_relaxed(opcnt, lpcdev->membase + LPC_REG_OP_LEN);
124*4882a593Smuzhiyun writel_relaxed(cmd_word, lpcdev->membase + LPC_REG_CMD);
125*4882a593Smuzhiyun writel_relaxed(addr, lpcdev->membase + LPC_REG_ADDR);
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun writel(LPC_REG_STARTUP_SIGNAL_START,
128*4882a593Smuzhiyun lpcdev->membase + LPC_REG_STARTUP_SIGNAL);
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun /* whether the operation is finished */
131*4882a593Smuzhiyun ret = wait_lpc_idle(lpcdev->membase, waitcnt);
132*4882a593Smuzhiyun if (ret) {
133*4882a593Smuzhiyun spin_unlock_irqrestore(&lpcdev->cycle_lock, flags);
134*4882a593Smuzhiyun return ret;
135*4882a593Smuzhiyun }
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun readsb(lpcdev->membase + LPC_REG_RDATA, buf, opcnt);
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun spin_unlock_irqrestore(&lpcdev->cycle_lock, flags);
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun return 0;
142*4882a593Smuzhiyun }
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun /*
145*4882a593Smuzhiyun * hisi_lpc_target_out - trigger a series of LPC cycles for write operation
146*4882a593Smuzhiyun * @lpcdev: pointer to hisi lpc device
147*4882a593Smuzhiyun * @para: some parameters used to control the lpc I/O operations
148*4882a593Smuzhiyun * @addr: the lpc I/O target port address
149*4882a593Smuzhiyun * @buf: where the data to be written is stored
150*4882a593Smuzhiyun * @opcnt: how many I/O operations required, i.e. data width
151*4882a593Smuzhiyun *
152*4882a593Smuzhiyun * Returns 0 on success, non-zero on fail.
153*4882a593Smuzhiyun */
hisi_lpc_target_out(struct hisi_lpc_dev * lpcdev,struct lpc_cycle_para * para,unsigned long addr,const unsigned char * buf,unsigned long opcnt)154*4882a593Smuzhiyun static int hisi_lpc_target_out(struct hisi_lpc_dev *lpcdev,
155*4882a593Smuzhiyun struct lpc_cycle_para *para, unsigned long addr,
156*4882a593Smuzhiyun const unsigned char *buf, unsigned long opcnt)
157*4882a593Smuzhiyun {
158*4882a593Smuzhiyun unsigned int waitcnt;
159*4882a593Smuzhiyun unsigned long flags;
160*4882a593Smuzhiyun u32 cmd_word;
161*4882a593Smuzhiyun int ret;
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun if (!buf || !opcnt || !para || !lpcdev)
164*4882a593Smuzhiyun return -EINVAL;
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun /* default is increasing address */
167*4882a593Smuzhiyun cmd_word = LPC_REG_CMD_OP; /* IO mode, write */
168*4882a593Smuzhiyun waitcnt = LPC_PEROP_WAITCNT;
169*4882a593Smuzhiyun if (!(para->opflags & FG_INCRADDR_LPC)) {
170*4882a593Smuzhiyun cmd_word |= LPC_REG_CMD_SAMEADDR;
171*4882a593Smuzhiyun waitcnt = LPC_MAX_WAITCNT;
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun spin_lock_irqsave(&lpcdev->cycle_lock, flags);
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun writel_relaxed(opcnt, lpcdev->membase + LPC_REG_OP_LEN);
177*4882a593Smuzhiyun writel_relaxed(cmd_word, lpcdev->membase + LPC_REG_CMD);
178*4882a593Smuzhiyun writel_relaxed(addr, lpcdev->membase + LPC_REG_ADDR);
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun writesb(lpcdev->membase + LPC_REG_WDATA, buf, opcnt);
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun writel(LPC_REG_STARTUP_SIGNAL_START,
183*4882a593Smuzhiyun lpcdev->membase + LPC_REG_STARTUP_SIGNAL);
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun /* whether the operation is finished */
186*4882a593Smuzhiyun ret = wait_lpc_idle(lpcdev->membase, waitcnt);
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun spin_unlock_irqrestore(&lpcdev->cycle_lock, flags);
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun return ret;
191*4882a593Smuzhiyun }
192*4882a593Smuzhiyun
hisi_lpc_pio_to_addr(struct hisi_lpc_dev * lpcdev,unsigned long pio)193*4882a593Smuzhiyun static unsigned long hisi_lpc_pio_to_addr(struct hisi_lpc_dev *lpcdev,
194*4882a593Smuzhiyun unsigned long pio)
195*4882a593Smuzhiyun {
196*4882a593Smuzhiyun return pio - lpcdev->io_host->io_start + lpcdev->io_host->hw_start;
197*4882a593Smuzhiyun }
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun /*
200*4882a593Smuzhiyun * hisi_lpc_comm_in - input the data in a single operation
201*4882a593Smuzhiyun * @hostdata: pointer to the device information relevant to LPC controller
202*4882a593Smuzhiyun * @pio: the target I/O port address
203*4882a593Smuzhiyun * @dwidth: the data length required to read from the target I/O port
204*4882a593Smuzhiyun *
205*4882a593Smuzhiyun * When success, data is returned. Otherwise, ~0 is returned.
206*4882a593Smuzhiyun */
hisi_lpc_comm_in(void * hostdata,unsigned long pio,size_t dwidth)207*4882a593Smuzhiyun static u32 hisi_lpc_comm_in(void *hostdata, unsigned long pio, size_t dwidth)
208*4882a593Smuzhiyun {
209*4882a593Smuzhiyun struct hisi_lpc_dev *lpcdev = hostdata;
210*4882a593Smuzhiyun struct lpc_cycle_para iopara;
211*4882a593Smuzhiyun unsigned long addr;
212*4882a593Smuzhiyun __le32 rd_data = 0;
213*4882a593Smuzhiyun int ret;
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun if (!lpcdev || !dwidth || dwidth > LPC_MAX_DWIDTH)
216*4882a593Smuzhiyun return ~0;
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun addr = hisi_lpc_pio_to_addr(lpcdev, pio);
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun iopara.opflags = FG_INCRADDR_LPC;
221*4882a593Smuzhiyun iopara.csize = dwidth;
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun ret = hisi_lpc_target_in(lpcdev, &iopara, addr,
224*4882a593Smuzhiyun (unsigned char *)&rd_data, dwidth);
225*4882a593Smuzhiyun if (ret)
226*4882a593Smuzhiyun return ~0;
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun return le32_to_cpu(rd_data);
229*4882a593Smuzhiyun }
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun /*
232*4882a593Smuzhiyun * hisi_lpc_comm_out - output the data in a single operation
233*4882a593Smuzhiyun * @hostdata: pointer to the device information relevant to LPC controller
234*4882a593Smuzhiyun * @pio: the target I/O port address
235*4882a593Smuzhiyun * @val: a value to be output from caller, maximum is four bytes
236*4882a593Smuzhiyun * @dwidth: the data width required writing to the target I/O port
237*4882a593Smuzhiyun *
238*4882a593Smuzhiyun * This function corresponds to out(b,w,l) only.
239*4882a593Smuzhiyun */
hisi_lpc_comm_out(void * hostdata,unsigned long pio,u32 val,size_t dwidth)240*4882a593Smuzhiyun static void hisi_lpc_comm_out(void *hostdata, unsigned long pio,
241*4882a593Smuzhiyun u32 val, size_t dwidth)
242*4882a593Smuzhiyun {
243*4882a593Smuzhiyun struct hisi_lpc_dev *lpcdev = hostdata;
244*4882a593Smuzhiyun struct lpc_cycle_para iopara;
245*4882a593Smuzhiyun const unsigned char *buf;
246*4882a593Smuzhiyun unsigned long addr;
247*4882a593Smuzhiyun __le32 _val = cpu_to_le32(val);
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun if (!lpcdev || !dwidth || dwidth > LPC_MAX_DWIDTH)
250*4882a593Smuzhiyun return;
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun buf = (const unsigned char *)&_val;
253*4882a593Smuzhiyun addr = hisi_lpc_pio_to_addr(lpcdev, pio);
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun iopara.opflags = FG_INCRADDR_LPC;
256*4882a593Smuzhiyun iopara.csize = dwidth;
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun hisi_lpc_target_out(lpcdev, &iopara, addr, buf, dwidth);
259*4882a593Smuzhiyun }
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun /*
262*4882a593Smuzhiyun * hisi_lpc_comm_ins - input the data in the buffer in multiple operations
263*4882a593Smuzhiyun * @hostdata: pointer to the device information relevant to LPC controller
264*4882a593Smuzhiyun * @pio: the target I/O port address
265*4882a593Smuzhiyun * @buffer: a buffer where read/input data bytes are stored
266*4882a593Smuzhiyun * @dwidth: the data width required writing to the target I/O port
267*4882a593Smuzhiyun * @count: how many data units whose length is dwidth will be read
268*4882a593Smuzhiyun *
269*4882a593Smuzhiyun * When success, the data read back is stored in buffer pointed by buffer.
270*4882a593Smuzhiyun * Returns 0 on success, -errno otherwise.
271*4882a593Smuzhiyun */
hisi_lpc_comm_ins(void * hostdata,unsigned long pio,void * buffer,size_t dwidth,unsigned int count)272*4882a593Smuzhiyun static u32 hisi_lpc_comm_ins(void *hostdata, unsigned long pio, void *buffer,
273*4882a593Smuzhiyun size_t dwidth, unsigned int count)
274*4882a593Smuzhiyun {
275*4882a593Smuzhiyun struct hisi_lpc_dev *lpcdev = hostdata;
276*4882a593Smuzhiyun unsigned char *buf = buffer;
277*4882a593Smuzhiyun struct lpc_cycle_para iopara;
278*4882a593Smuzhiyun unsigned long addr;
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun if (!lpcdev || !buf || !count || !dwidth || dwidth > LPC_MAX_DWIDTH)
281*4882a593Smuzhiyun return -EINVAL;
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun iopara.opflags = 0;
284*4882a593Smuzhiyun if (dwidth > 1)
285*4882a593Smuzhiyun iopara.opflags |= FG_INCRADDR_LPC;
286*4882a593Smuzhiyun iopara.csize = dwidth;
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun addr = hisi_lpc_pio_to_addr(lpcdev, pio);
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun do {
291*4882a593Smuzhiyun int ret;
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun ret = hisi_lpc_target_in(lpcdev, &iopara, addr, buf, dwidth);
294*4882a593Smuzhiyun if (ret)
295*4882a593Smuzhiyun return ret;
296*4882a593Smuzhiyun buf += dwidth;
297*4882a593Smuzhiyun } while (--count);
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun return 0;
300*4882a593Smuzhiyun }
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun /*
303*4882a593Smuzhiyun * hisi_lpc_comm_outs - output the data in the buffer in multiple operations
304*4882a593Smuzhiyun * @hostdata: pointer to the device information relevant to LPC controller
305*4882a593Smuzhiyun * @pio: the target I/O port address
306*4882a593Smuzhiyun * @buffer: a buffer where write/output data bytes are stored
307*4882a593Smuzhiyun * @dwidth: the data width required writing to the target I/O port
308*4882a593Smuzhiyun * @count: how many data units whose length is dwidth will be written
309*4882a593Smuzhiyun */
hisi_lpc_comm_outs(void * hostdata,unsigned long pio,const void * buffer,size_t dwidth,unsigned int count)310*4882a593Smuzhiyun static void hisi_lpc_comm_outs(void *hostdata, unsigned long pio,
311*4882a593Smuzhiyun const void *buffer, size_t dwidth,
312*4882a593Smuzhiyun unsigned int count)
313*4882a593Smuzhiyun {
314*4882a593Smuzhiyun struct hisi_lpc_dev *lpcdev = hostdata;
315*4882a593Smuzhiyun struct lpc_cycle_para iopara;
316*4882a593Smuzhiyun const unsigned char *buf = buffer;
317*4882a593Smuzhiyun unsigned long addr;
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun if (!lpcdev || !buf || !count || !dwidth || dwidth > LPC_MAX_DWIDTH)
320*4882a593Smuzhiyun return;
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun iopara.opflags = 0;
323*4882a593Smuzhiyun if (dwidth > 1)
324*4882a593Smuzhiyun iopara.opflags |= FG_INCRADDR_LPC;
325*4882a593Smuzhiyun iopara.csize = dwidth;
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun addr = hisi_lpc_pio_to_addr(lpcdev, pio);
328*4882a593Smuzhiyun do {
329*4882a593Smuzhiyun if (hisi_lpc_target_out(lpcdev, &iopara, addr, buf, dwidth))
330*4882a593Smuzhiyun break;
331*4882a593Smuzhiyun buf += dwidth;
332*4882a593Smuzhiyun } while (--count);
333*4882a593Smuzhiyun }
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun static const struct logic_pio_host_ops hisi_lpc_ops = {
336*4882a593Smuzhiyun .in = hisi_lpc_comm_in,
337*4882a593Smuzhiyun .out = hisi_lpc_comm_out,
338*4882a593Smuzhiyun .ins = hisi_lpc_comm_ins,
339*4882a593Smuzhiyun .outs = hisi_lpc_comm_outs,
340*4882a593Smuzhiyun };
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun #ifdef CONFIG_ACPI
hisi_lpc_acpi_xlat_io_res(struct acpi_device * adev,struct acpi_device * host,struct resource * res)343*4882a593Smuzhiyun static int hisi_lpc_acpi_xlat_io_res(struct acpi_device *adev,
344*4882a593Smuzhiyun struct acpi_device *host,
345*4882a593Smuzhiyun struct resource *res)
346*4882a593Smuzhiyun {
347*4882a593Smuzhiyun unsigned long sys_port;
348*4882a593Smuzhiyun resource_size_t len = resource_size(res);
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun sys_port = logic_pio_trans_hwaddr(&host->fwnode, res->start, len);
351*4882a593Smuzhiyun if (sys_port == ~0UL)
352*4882a593Smuzhiyun return -EFAULT;
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun res->start = sys_port;
355*4882a593Smuzhiyun res->end = sys_port + len;
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun return 0;
358*4882a593Smuzhiyun }
359*4882a593Smuzhiyun
360*4882a593Smuzhiyun /*
361*4882a593Smuzhiyun * Released firmware describes the IO port max address as 0x3fff, which is
362*4882a593Smuzhiyun * the max host bus address. Fixup to a proper range. This will probably
363*4882a593Smuzhiyun * never be fixed in firmware.
364*4882a593Smuzhiyun */
hisi_lpc_acpi_fixup_child_resource(struct device * hostdev,struct resource * r)365*4882a593Smuzhiyun static void hisi_lpc_acpi_fixup_child_resource(struct device *hostdev,
366*4882a593Smuzhiyun struct resource *r)
367*4882a593Smuzhiyun {
368*4882a593Smuzhiyun if (r->end != 0x3fff)
369*4882a593Smuzhiyun return;
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun if (r->start == 0xe4)
372*4882a593Smuzhiyun r->end = 0xe4 + 0x04 - 1;
373*4882a593Smuzhiyun else if (r->start == 0x2f8)
374*4882a593Smuzhiyun r->end = 0x2f8 + 0x08 - 1;
375*4882a593Smuzhiyun else
376*4882a593Smuzhiyun dev_warn(hostdev, "unrecognised resource %pR to fixup, ignoring\n",
377*4882a593Smuzhiyun r);
378*4882a593Smuzhiyun }
379*4882a593Smuzhiyun
380*4882a593Smuzhiyun /*
381*4882a593Smuzhiyun * hisi_lpc_acpi_set_io_res - set the resources for a child
382*4882a593Smuzhiyun * @child: the device node to be updated the I/O resource
383*4882a593Smuzhiyun * @hostdev: the device node associated with host controller
384*4882a593Smuzhiyun * @res: double pointer to be set to the address of translated resources
385*4882a593Smuzhiyun * @num_res: pointer to variable to hold the number of translated resources
386*4882a593Smuzhiyun *
387*4882a593Smuzhiyun * Returns 0 when successful, and a negative value for failure.
388*4882a593Smuzhiyun *
389*4882a593Smuzhiyun * For a given host controller, each child device will have an associated
390*4882a593Smuzhiyun * host-relative address resource. This function will return the translated
391*4882a593Smuzhiyun * logical PIO addresses for each child devices resources.
392*4882a593Smuzhiyun */
hisi_lpc_acpi_set_io_res(struct device * child,struct device * hostdev,const struct resource ** res,int * num_res)393*4882a593Smuzhiyun static int hisi_lpc_acpi_set_io_res(struct device *child,
394*4882a593Smuzhiyun struct device *hostdev,
395*4882a593Smuzhiyun const struct resource **res, int *num_res)
396*4882a593Smuzhiyun {
397*4882a593Smuzhiyun struct acpi_device *adev;
398*4882a593Smuzhiyun struct acpi_device *host;
399*4882a593Smuzhiyun struct resource_entry *rentry;
400*4882a593Smuzhiyun LIST_HEAD(resource_list);
401*4882a593Smuzhiyun struct resource *resources;
402*4882a593Smuzhiyun int count;
403*4882a593Smuzhiyun int i;
404*4882a593Smuzhiyun
405*4882a593Smuzhiyun if (!child || !hostdev)
406*4882a593Smuzhiyun return -EINVAL;
407*4882a593Smuzhiyun
408*4882a593Smuzhiyun host = to_acpi_device(hostdev);
409*4882a593Smuzhiyun adev = to_acpi_device(child);
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun if (!adev->status.present) {
412*4882a593Smuzhiyun dev_dbg(child, "device is not present\n");
413*4882a593Smuzhiyun return -EIO;
414*4882a593Smuzhiyun }
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun if (acpi_device_enumerated(adev)) {
417*4882a593Smuzhiyun dev_dbg(child, "has been enumerated\n");
418*4882a593Smuzhiyun return -EIO;
419*4882a593Smuzhiyun }
420*4882a593Smuzhiyun
421*4882a593Smuzhiyun /*
422*4882a593Smuzhiyun * The following code segment to retrieve the resources is common to
423*4882a593Smuzhiyun * acpi_create_platform_device(), so consider a common helper function
424*4882a593Smuzhiyun * in future.
425*4882a593Smuzhiyun */
426*4882a593Smuzhiyun count = acpi_dev_get_resources(adev, &resource_list, NULL, NULL);
427*4882a593Smuzhiyun if (count <= 0) {
428*4882a593Smuzhiyun dev_dbg(child, "failed to get resources\n");
429*4882a593Smuzhiyun return count ? count : -EIO;
430*4882a593Smuzhiyun }
431*4882a593Smuzhiyun
432*4882a593Smuzhiyun resources = devm_kcalloc(hostdev, count, sizeof(*resources),
433*4882a593Smuzhiyun GFP_KERNEL);
434*4882a593Smuzhiyun if (!resources) {
435*4882a593Smuzhiyun dev_warn(hostdev, "could not allocate memory for %d resources\n",
436*4882a593Smuzhiyun count);
437*4882a593Smuzhiyun acpi_dev_free_resource_list(&resource_list);
438*4882a593Smuzhiyun return -ENOMEM;
439*4882a593Smuzhiyun }
440*4882a593Smuzhiyun count = 0;
441*4882a593Smuzhiyun list_for_each_entry(rentry, &resource_list, node) {
442*4882a593Smuzhiyun resources[count] = *rentry->res;
443*4882a593Smuzhiyun hisi_lpc_acpi_fixup_child_resource(hostdev, &resources[count]);
444*4882a593Smuzhiyun count++;
445*4882a593Smuzhiyun }
446*4882a593Smuzhiyun
447*4882a593Smuzhiyun acpi_dev_free_resource_list(&resource_list);
448*4882a593Smuzhiyun
449*4882a593Smuzhiyun /* translate the I/O resources */
450*4882a593Smuzhiyun for (i = 0; i < count; i++) {
451*4882a593Smuzhiyun int ret;
452*4882a593Smuzhiyun
453*4882a593Smuzhiyun if (!(resources[i].flags & IORESOURCE_IO))
454*4882a593Smuzhiyun continue;
455*4882a593Smuzhiyun ret = hisi_lpc_acpi_xlat_io_res(adev, host, &resources[i]);
456*4882a593Smuzhiyun if (ret) {
457*4882a593Smuzhiyun dev_err(child, "translate IO range %pR failed (%d)\n",
458*4882a593Smuzhiyun &resources[i], ret);
459*4882a593Smuzhiyun return ret;
460*4882a593Smuzhiyun }
461*4882a593Smuzhiyun }
462*4882a593Smuzhiyun *res = resources;
463*4882a593Smuzhiyun *num_res = count;
464*4882a593Smuzhiyun
465*4882a593Smuzhiyun return 0;
466*4882a593Smuzhiyun }
467*4882a593Smuzhiyun
hisi_lpc_acpi_remove_subdev(struct device * dev,void * unused)468*4882a593Smuzhiyun static int hisi_lpc_acpi_remove_subdev(struct device *dev, void *unused)
469*4882a593Smuzhiyun {
470*4882a593Smuzhiyun platform_device_unregister(to_platform_device(dev));
471*4882a593Smuzhiyun return 0;
472*4882a593Smuzhiyun }
473*4882a593Smuzhiyun
474*4882a593Smuzhiyun struct hisi_lpc_acpi_cell {
475*4882a593Smuzhiyun const char *hid;
476*4882a593Smuzhiyun const char *name;
477*4882a593Smuzhiyun void *pdata;
478*4882a593Smuzhiyun size_t pdata_size;
479*4882a593Smuzhiyun };
480*4882a593Smuzhiyun
hisi_lpc_acpi_remove(struct device * hostdev)481*4882a593Smuzhiyun static void hisi_lpc_acpi_remove(struct device *hostdev)
482*4882a593Smuzhiyun {
483*4882a593Smuzhiyun struct acpi_device *adev = ACPI_COMPANION(hostdev);
484*4882a593Smuzhiyun struct acpi_device *child;
485*4882a593Smuzhiyun
486*4882a593Smuzhiyun device_for_each_child(hostdev, NULL, hisi_lpc_acpi_remove_subdev);
487*4882a593Smuzhiyun
488*4882a593Smuzhiyun list_for_each_entry(child, &adev->children, node)
489*4882a593Smuzhiyun acpi_device_clear_enumerated(child);
490*4882a593Smuzhiyun }
491*4882a593Smuzhiyun
492*4882a593Smuzhiyun /*
493*4882a593Smuzhiyun * hisi_lpc_acpi_probe - probe children for ACPI FW
494*4882a593Smuzhiyun * @hostdev: LPC host device pointer
495*4882a593Smuzhiyun *
496*4882a593Smuzhiyun * Returns 0 when successful, and a negative value for failure.
497*4882a593Smuzhiyun *
498*4882a593Smuzhiyun * Create a platform device per child, fixing up the resources
499*4882a593Smuzhiyun * from bus addresses to Logical PIO addresses.
500*4882a593Smuzhiyun *
501*4882a593Smuzhiyun */
hisi_lpc_acpi_probe(struct device * hostdev)502*4882a593Smuzhiyun static int hisi_lpc_acpi_probe(struct device *hostdev)
503*4882a593Smuzhiyun {
504*4882a593Smuzhiyun struct acpi_device *adev = ACPI_COMPANION(hostdev);
505*4882a593Smuzhiyun struct acpi_device *child;
506*4882a593Smuzhiyun struct platform_device *pdev;
507*4882a593Smuzhiyun int ret;
508*4882a593Smuzhiyun
509*4882a593Smuzhiyun /* Only consider the children of the host */
510*4882a593Smuzhiyun list_for_each_entry(child, &adev->children, node) {
511*4882a593Smuzhiyun const char *hid = acpi_device_hid(child);
512*4882a593Smuzhiyun const struct hisi_lpc_acpi_cell *cell;
513*4882a593Smuzhiyun const struct resource *res;
514*4882a593Smuzhiyun bool found = false;
515*4882a593Smuzhiyun int num_res;
516*4882a593Smuzhiyun
517*4882a593Smuzhiyun ret = hisi_lpc_acpi_set_io_res(&child->dev, &adev->dev, &res,
518*4882a593Smuzhiyun &num_res);
519*4882a593Smuzhiyun if (ret) {
520*4882a593Smuzhiyun dev_warn(hostdev, "set resource fail (%d)\n", ret);
521*4882a593Smuzhiyun goto fail;
522*4882a593Smuzhiyun }
523*4882a593Smuzhiyun
524*4882a593Smuzhiyun cell = (struct hisi_lpc_acpi_cell []){
525*4882a593Smuzhiyun /* ipmi */
526*4882a593Smuzhiyun {
527*4882a593Smuzhiyun .hid = "IPI0001",
528*4882a593Smuzhiyun .name = "hisi-lpc-ipmi",
529*4882a593Smuzhiyun },
530*4882a593Smuzhiyun /* 8250-compatible uart */
531*4882a593Smuzhiyun {
532*4882a593Smuzhiyun .hid = "HISI1031",
533*4882a593Smuzhiyun .name = "serial8250",
534*4882a593Smuzhiyun .pdata = (struct plat_serial8250_port []) {
535*4882a593Smuzhiyun {
536*4882a593Smuzhiyun .iobase = res->start,
537*4882a593Smuzhiyun .uartclk = 1843200,
538*4882a593Smuzhiyun .iotype = UPIO_PORT,
539*4882a593Smuzhiyun .flags = UPF_BOOT_AUTOCONF,
540*4882a593Smuzhiyun },
541*4882a593Smuzhiyun {}
542*4882a593Smuzhiyun },
543*4882a593Smuzhiyun .pdata_size = 2 *
544*4882a593Smuzhiyun sizeof(struct plat_serial8250_port),
545*4882a593Smuzhiyun },
546*4882a593Smuzhiyun {}
547*4882a593Smuzhiyun };
548*4882a593Smuzhiyun
549*4882a593Smuzhiyun for (; cell && cell->name; cell++) {
550*4882a593Smuzhiyun if (!strcmp(cell->hid, hid)) {
551*4882a593Smuzhiyun found = true;
552*4882a593Smuzhiyun break;
553*4882a593Smuzhiyun }
554*4882a593Smuzhiyun }
555*4882a593Smuzhiyun
556*4882a593Smuzhiyun if (!found) {
557*4882a593Smuzhiyun dev_warn(hostdev,
558*4882a593Smuzhiyun "could not find cell for child device (%s), discarding\n",
559*4882a593Smuzhiyun hid);
560*4882a593Smuzhiyun continue;
561*4882a593Smuzhiyun }
562*4882a593Smuzhiyun
563*4882a593Smuzhiyun pdev = platform_device_alloc(cell->name, PLATFORM_DEVID_AUTO);
564*4882a593Smuzhiyun if (!pdev) {
565*4882a593Smuzhiyun ret = -ENOMEM;
566*4882a593Smuzhiyun goto fail;
567*4882a593Smuzhiyun }
568*4882a593Smuzhiyun
569*4882a593Smuzhiyun pdev->dev.parent = hostdev;
570*4882a593Smuzhiyun ACPI_COMPANION_SET(&pdev->dev, child);
571*4882a593Smuzhiyun
572*4882a593Smuzhiyun ret = platform_device_add_resources(pdev, res, num_res);
573*4882a593Smuzhiyun if (ret)
574*4882a593Smuzhiyun goto fail_put_device;
575*4882a593Smuzhiyun
576*4882a593Smuzhiyun ret = platform_device_add_data(pdev, cell->pdata,
577*4882a593Smuzhiyun cell->pdata_size);
578*4882a593Smuzhiyun if (ret)
579*4882a593Smuzhiyun goto fail_put_device;
580*4882a593Smuzhiyun
581*4882a593Smuzhiyun ret = platform_device_add(pdev);
582*4882a593Smuzhiyun if (ret)
583*4882a593Smuzhiyun goto fail_put_device;
584*4882a593Smuzhiyun
585*4882a593Smuzhiyun acpi_device_set_enumerated(child);
586*4882a593Smuzhiyun }
587*4882a593Smuzhiyun
588*4882a593Smuzhiyun return 0;
589*4882a593Smuzhiyun
590*4882a593Smuzhiyun fail_put_device:
591*4882a593Smuzhiyun platform_device_put(pdev);
592*4882a593Smuzhiyun fail:
593*4882a593Smuzhiyun hisi_lpc_acpi_remove(hostdev);
594*4882a593Smuzhiyun return ret;
595*4882a593Smuzhiyun }
596*4882a593Smuzhiyun
597*4882a593Smuzhiyun static const struct acpi_device_id hisi_lpc_acpi_match[] = {
598*4882a593Smuzhiyun {"HISI0191"},
599*4882a593Smuzhiyun {}
600*4882a593Smuzhiyun };
601*4882a593Smuzhiyun #else
hisi_lpc_acpi_probe(struct device * dev)602*4882a593Smuzhiyun static int hisi_lpc_acpi_probe(struct device *dev)
603*4882a593Smuzhiyun {
604*4882a593Smuzhiyun return -ENODEV;
605*4882a593Smuzhiyun }
606*4882a593Smuzhiyun
hisi_lpc_acpi_remove(struct device * hostdev)607*4882a593Smuzhiyun static void hisi_lpc_acpi_remove(struct device *hostdev)
608*4882a593Smuzhiyun {
609*4882a593Smuzhiyun }
610*4882a593Smuzhiyun #endif // CONFIG_ACPI
611*4882a593Smuzhiyun
612*4882a593Smuzhiyun /*
613*4882a593Smuzhiyun * hisi_lpc_probe - the probe callback function for hisi lpc host,
614*4882a593Smuzhiyun * will finish all the initialization.
615*4882a593Smuzhiyun * @pdev: the platform device corresponding to hisi lpc host
616*4882a593Smuzhiyun *
617*4882a593Smuzhiyun * Returns 0 on success, non-zero on fail.
618*4882a593Smuzhiyun */
hisi_lpc_probe(struct platform_device * pdev)619*4882a593Smuzhiyun static int hisi_lpc_probe(struct platform_device *pdev)
620*4882a593Smuzhiyun {
621*4882a593Smuzhiyun struct device *dev = &pdev->dev;
622*4882a593Smuzhiyun struct acpi_device *acpi_device = ACPI_COMPANION(dev);
623*4882a593Smuzhiyun struct logic_pio_hwaddr *range;
624*4882a593Smuzhiyun struct hisi_lpc_dev *lpcdev;
625*4882a593Smuzhiyun resource_size_t io_end;
626*4882a593Smuzhiyun struct resource *res;
627*4882a593Smuzhiyun int ret;
628*4882a593Smuzhiyun
629*4882a593Smuzhiyun lpcdev = devm_kzalloc(dev, sizeof(*lpcdev), GFP_KERNEL);
630*4882a593Smuzhiyun if (!lpcdev)
631*4882a593Smuzhiyun return -ENOMEM;
632*4882a593Smuzhiyun
633*4882a593Smuzhiyun spin_lock_init(&lpcdev->cycle_lock);
634*4882a593Smuzhiyun
635*4882a593Smuzhiyun res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
636*4882a593Smuzhiyun lpcdev->membase = devm_ioremap_resource(dev, res);
637*4882a593Smuzhiyun if (IS_ERR(lpcdev->membase))
638*4882a593Smuzhiyun return PTR_ERR(lpcdev->membase);
639*4882a593Smuzhiyun
640*4882a593Smuzhiyun range = devm_kzalloc(dev, sizeof(*range), GFP_KERNEL);
641*4882a593Smuzhiyun if (!range)
642*4882a593Smuzhiyun return -ENOMEM;
643*4882a593Smuzhiyun
644*4882a593Smuzhiyun range->fwnode = dev->fwnode;
645*4882a593Smuzhiyun range->flags = LOGIC_PIO_INDIRECT;
646*4882a593Smuzhiyun range->size = PIO_INDIRECT_SIZE;
647*4882a593Smuzhiyun range->hostdata = lpcdev;
648*4882a593Smuzhiyun range->ops = &hisi_lpc_ops;
649*4882a593Smuzhiyun lpcdev->io_host = range;
650*4882a593Smuzhiyun
651*4882a593Smuzhiyun ret = logic_pio_register_range(range);
652*4882a593Smuzhiyun if (ret) {
653*4882a593Smuzhiyun dev_err(dev, "register IO range failed (%d)!\n", ret);
654*4882a593Smuzhiyun return ret;
655*4882a593Smuzhiyun }
656*4882a593Smuzhiyun
657*4882a593Smuzhiyun /* register the LPC host PIO resources */
658*4882a593Smuzhiyun if (acpi_device)
659*4882a593Smuzhiyun ret = hisi_lpc_acpi_probe(dev);
660*4882a593Smuzhiyun else
661*4882a593Smuzhiyun ret = of_platform_populate(dev->of_node, NULL, NULL, dev);
662*4882a593Smuzhiyun if (ret) {
663*4882a593Smuzhiyun logic_pio_unregister_range(range);
664*4882a593Smuzhiyun return ret;
665*4882a593Smuzhiyun }
666*4882a593Smuzhiyun
667*4882a593Smuzhiyun dev_set_drvdata(dev, lpcdev);
668*4882a593Smuzhiyun
669*4882a593Smuzhiyun io_end = lpcdev->io_host->io_start + lpcdev->io_host->size;
670*4882a593Smuzhiyun dev_info(dev, "registered range [%pa - %pa]\n",
671*4882a593Smuzhiyun &lpcdev->io_host->io_start, &io_end);
672*4882a593Smuzhiyun
673*4882a593Smuzhiyun return ret;
674*4882a593Smuzhiyun }
675*4882a593Smuzhiyun
hisi_lpc_remove(struct platform_device * pdev)676*4882a593Smuzhiyun static int hisi_lpc_remove(struct platform_device *pdev)
677*4882a593Smuzhiyun {
678*4882a593Smuzhiyun struct device *dev = &pdev->dev;
679*4882a593Smuzhiyun struct acpi_device *acpi_device = ACPI_COMPANION(dev);
680*4882a593Smuzhiyun struct hisi_lpc_dev *lpcdev = dev_get_drvdata(dev);
681*4882a593Smuzhiyun struct logic_pio_hwaddr *range = lpcdev->io_host;
682*4882a593Smuzhiyun
683*4882a593Smuzhiyun if (acpi_device)
684*4882a593Smuzhiyun hisi_lpc_acpi_remove(dev);
685*4882a593Smuzhiyun else
686*4882a593Smuzhiyun of_platform_depopulate(dev);
687*4882a593Smuzhiyun
688*4882a593Smuzhiyun logic_pio_unregister_range(range);
689*4882a593Smuzhiyun
690*4882a593Smuzhiyun return 0;
691*4882a593Smuzhiyun }
692*4882a593Smuzhiyun
693*4882a593Smuzhiyun static const struct of_device_id hisi_lpc_of_match[] = {
694*4882a593Smuzhiyun { .compatible = "hisilicon,hip06-lpc", },
695*4882a593Smuzhiyun { .compatible = "hisilicon,hip07-lpc", },
696*4882a593Smuzhiyun {}
697*4882a593Smuzhiyun };
698*4882a593Smuzhiyun
699*4882a593Smuzhiyun static struct platform_driver hisi_lpc_driver = {
700*4882a593Smuzhiyun .driver = {
701*4882a593Smuzhiyun .name = DRV_NAME,
702*4882a593Smuzhiyun .of_match_table = hisi_lpc_of_match,
703*4882a593Smuzhiyun .acpi_match_table = ACPI_PTR(hisi_lpc_acpi_match),
704*4882a593Smuzhiyun },
705*4882a593Smuzhiyun .probe = hisi_lpc_probe,
706*4882a593Smuzhiyun .remove = hisi_lpc_remove,
707*4882a593Smuzhiyun };
708*4882a593Smuzhiyun builtin_platform_driver(hisi_lpc_driver);
709